summaryrefslogtreecommitdiffstats
path: root/include/linux/acpi_iort.h
diff options
context:
space:
mode:
authorShameer Kolothum <shameerali.kolothum.thodi@huawei.com>2019-03-26 15:17:53 +0000
committerWill Deacon <will.deacon@arm.com>2019-04-04 16:49:22 +0100
commit24062fe85860debfdae0eeaa495f27c9971ec163 (patch)
tree95df5553d96f619adbcb5728ec711a8dbf5aa1cf /include/linux/acpi_iort.h
parentf202cdab3b48d8c2c1846c938ea69cb8aa897699 (diff)
downloadlinux-24062fe85860debfdae0eeaa495f27c9971ec163.tar.gz
linux-24062fe85860debfdae0eeaa495f27c9971ec163.tar.bz2
linux-24062fe85860debfdae0eeaa495f27c9971ec163.zip
perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk
HiSilicon erratum 162001800 describes the limitation of SMMUv3 PMCG implementation on HiSilicon Hip08 platforms. On these platforms, the PMCG event counter registers (SMMU_PMCG_EVCNTRn) are read only and as a result it is not possible to set the initial counter period value on event monitor start. To work around this, the current value of the counter is read and used for delta calculations. OEM information from ACPI header is used to identify the affected hardware platforms. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [will: update silicon-errata.txt and add reason string to acpi match] Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/acpi_iort.h')
-rw-r--r--include/linux/acpi_iort.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
index 052ef7b9f985..723e4dfa1c14 100644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -32,6 +32,7 @@
* do with hardware or with IORT specification.
*/
#define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */
+#define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */
int iort_register_domain_token(int trans_id, phys_addr_t base,
struct fwnode_handle *fw_node);