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authorClaudiu Beznea <claudiu.beznea@microchip.com>2022-01-13 16:48:54 +0200
committerNicolas Ferre <nicolas.ferre@microchip.com>2022-02-25 12:36:25 +0100
commit9584e7263e9ebcd94b184dc3efc847355a624220 (patch)
tree9c1c07f2a65d6329d072f7fcfe0965b865f282d6 /include/linux/clk
parent9a0775c9cd3d89d1fe957a137131681a33f5736b (diff)
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ARM: at91: PM: add cpu idle support for sama7g5
Add CPU idle support for SAMA7G5. Support will make use of PMC_CPU_RATIO register to divide the CPU clock by 16 before switching it to idle and use automatic self-refresh option of DDR controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220113144900.906370-5-claudiu.beznea@microchip.com
Diffstat (limited to 'include/linux/clk')
-rw-r--r--include/linux/clk/at91_pmc.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index ccb3f034bfa9..3484309b59bf 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -78,6 +78,10 @@
#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
+
+#define AT91_PMC_RATIO 0x2c /* Processor clock ratio register [SAMA7G5 only] */
+#define AT91_PMC_RATIO_RATIO (0xf) /* CPU clock ratio. */
+
#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
#define AT91_PMC_DIV (0xff << 0) /* Divider */
#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */