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author | James Bottomley <James.Bottomley@HansenPartnership.com> | 2016-04-05 06:56:47 -0400 |
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committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2016-04-05 06:56:47 -0400 |
commit | 6ea7e3873e52902af9ee8c0837450fdb69d54140 (patch) | |
tree | b291dad174446387a166763cfbf3dd351148ecbe /include/linux/coresight-pmu.h | |
parent | 5ddfe0858ea7848c5d4efe3f4319e7543522e0ee (diff) | |
parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) | |
download | linux-6ea7e3873e52902af9ee8c0837450fdb69d54140.tar.gz linux-6ea7e3873e52902af9ee8c0837450fdb69d54140.tar.bz2 linux-6ea7e3873e52902af9ee8c0837450fdb69d54140.zip |
Merge branch 'fixes-base' into fixes
Diffstat (limited to 'include/linux/coresight-pmu.h')
-rw-r--r-- | include/linux/coresight-pmu.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h new file mode 100644 index 000000000000..7d410260661b --- /dev/null +++ b/include/linux/coresight-pmu.h @@ -0,0 +1,39 @@ +/* + * Copyright(C) 2015 Linaro Limited. All rights reserved. + * Author: Mathieu Poirier <mathieu.poirier@linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _LINUX_CORESIGHT_PMU_H +#define _LINUX_CORESIGHT_PMU_H + +#define CORESIGHT_ETM_PMU_NAME "cs_etm" +#define CORESIGHT_ETM_PMU_SEED 0x10 + +/* ETMv3.5/PTM's ETMCR config bit */ +#define ETM_OPT_CYCACC 12 +#define ETM_OPT_TS 28 + +static inline int coresight_get_trace_id(int cpu) +{ + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and go from there. Since + * the common convention is to have data trace IDs be I(N) + 1, + * set instruction trace IDs as a function of the CPU number. + */ + return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); +} + +#endif |