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| author | Thor Thayer <thor.thayer@linux.intel.com> | 2019-04-02 17:40:56 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2019-04-02 17:42:15 +0200 |
| commit | fad9fab975cb9fae651854c811cb07a30bc2b98a (patch) | |
| tree | 334036063ff4db7f6a3bccb6f7fe256480a2c095 /include/linux/firmware | |
| parent | 788586efd116d6d7d05985881eda503333e702b4 (diff) | |
| download | linux-fad9fab975cb9fae651854c811cb07a30bc2b98a.tar.gz linux-fad9fab975cb9fae651854c811cb07a30bc2b98a.tar.bz2 linux-fad9fab975cb9fae651854c811cb07a30bc2b98a.zip | |
EDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC call
Reserve ECC Double Bit Error SMC call to alert U-Boot that a DBE has
occurred. Move the call from local EDAC header file to a common header.
[ bp: Merge the two patches. ]
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Richard Gong <richard.gong@intel.com>
Reviewed-by: Alan Tull <atull@kernel.org> # firmware
Cc: Greg KH <greg@kroah.com>
Cc: James Morse <james.morse@arm.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@kernel.org
Link: https://lkml.kernel.org/r/1553870639-23895-1-git-send-email-thor.thayer@linux.intel.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'include/linux/firmware')
| -rw-r--r-- | include/linux/firmware/intel/stratix10-smc.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index 5be5dab50b13..01684d935580 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -309,4 +309,23 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12 #define INTEL_SIP_SMC_RSU_UPDATE \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE) + +/* + * Request INTEL_SIP_SMC_ECC_DBE + * + * Sync call used by service driver at EL1 to alert EL3 that a Double + * Bit ECC error has occurred. + * + * Call register usage: + * a0 INTEL_SIP_SMC_ECC_DBE + * a1 SysManager Double Bit Error value + * a2-7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK + */ +#define INTEL_SIP_SMC_FUNCID_ECC_DBE 13 +#define INTEL_SIP_SMC_ECC_DBE \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE) + #endif |