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authorWeidong Han <weidong.han@intel.com>2008-12-08 15:34:06 +0800
committerJoerg Roedel <joerg.roedel@amd.com>2009-01-03 14:02:18 +0100
commit1b5736839ae13dadc5947940144f95dd0f4a4a8c (patch)
tree2b6ce6b68850d905e4ce5d38b6872b82f6328208 /include/linux/intel-iommu.h
parent8c11e798eee2ce4475134eaf61302b28ea4f205d (diff)
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calculate agaw for each iommu
"SAGAW" capability may be different across iommus. Use a default agaw, but if default agaw is not supported in some iommus, choose a less supported agaw. Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include/linux/intel-iommu.h')
-rw-r--r--include/linux/intel-iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 1bff7bf1bc2c..06349fd5871b 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -290,6 +290,7 @@ struct intel_iommu {
u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */
spinlock_t register_lock; /* protect register handling */
int seq_id; /* sequence id of the iommu */
+ int agaw; /* agaw of this iommu */
#ifdef CONFIG_DMAR
unsigned long *domain_ids; /* bitmap of domains */