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authorThomas Gleixner <tglx@linutronix.de>2019-02-23 10:53:31 +0100
committerThomas Gleixner <tglx@linutronix.de>2019-02-23 10:53:31 +0100
commita324ca9cad4736252c33c1e28cffe1d87f262d03 (patch)
treeda64e14dd8432602634773b52073928c50dfb85c /include/linux/irqdesc.h
parent4e6b26d23dc1faee318796d5c7f91b5692b1e6be (diff)
parent28528fca4908142bd1a3247956cba56c9c667d71 (diff)
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Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier - Core pseudo-NMI handling code - Allow the default irq domain to be retrieved - A new interrupt controller for the Loongson LS1X platform - Affinity support for the SiFive PLIC - Better support for the iMX irqsteer driver - NUMA aware memory allocations for GICv3 - A handful of other fixes (i8259, GICv3, PLIC)
Diffstat (limited to 'include/linux/irqdesc.h')
-rw-r--r--include/linux/irqdesc.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 1d679feff3f6..d6e2ab538ef2 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -173,6 +173,11 @@ static inline int handle_domain_irq(struct irq_domain *domain,
{
return __handle_domain_irq(domain, hwirq, true, regs);
}
+
+#ifdef CONFIG_IRQ_DOMAIN
+int handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq,
+ struct pt_regs *regs);
+#endif
#endif
/* Test to see if a driver has successfully requested an irq */