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authorUlf Hansson <ulf.hansson@linaro.org>2013-12-18 11:59:17 +0100
committerChris Ball <chris@printf.net>2014-02-13 22:58:49 -0500
commit7536d3f83aa42ba1a3b1c6b30c2b6d94a820cbb2 (patch)
tree7d7e0d1e730528f2ca7fd8e987d305274e019a46 /include/linux/mmc/host.h
parent10e5d9652499a8bc0a99ffc2a96a3030fee576cb (diff)
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mmc: core: Enable MMC_CAP2_CACHE_CTRL as default
There are no reason to why the use of a non-volatile internal eMMC cache should be controlled by a host cap. Instead let's just enable it if the eMMC card supports it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'include/linux/mmc/host.h')
-rw-r--r--include/linux/mmc/host.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f69bd70b1046..719db89ef134 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -264,7 +264,6 @@ struct mmc_host {
u32 caps2; /* More host capabilities */
#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
-#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */