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| author | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-10 14:23:15 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-10 14:23:15 -0700 |
| commit | 96702be560374ee7e7139a34cab03554129abbb4 (patch) | |
| tree | ede7f763c471fad6d268a2e6a1d17d029b3eaf31 /include/linux/pci.h | |
| parent | 04f982beb900f37bc216d63c9dbc5bdddb4a3d3a (diff) | |
| parent | d56dbf5bab8ce44c5407bb099f71987f58d18bb4 (diff) | |
| download | linux-96702be560374ee7e7139a34cab03554129abbb4.tar.gz linux-96702be560374ee7e7139a34cab03554129abbb4.tar.bz2 linux-96702be560374ee7e7139a34cab03554129abbb4.zip | |
Merge branch 'pci/resource' into next
* pci/resource:
PCI: Allocate 64-bit BARs above 4G when possible
PCI: Enforce bus address limits in resource allocation
PCI: Split out bridge window override of minimum allocation address
agp/ati: Use PCI_COMMAND instead of hard-coded 4
agp/intel: Use CPU physical address, not bus address, for ioremap()
agp/intel: Use pci_bus_address() to get GTTADR bus address
agp/intel: Use pci_bus_address() to get MMADR bus address
agp/intel: Support 64-bit GMADR
agp/intel: Rename gtt_bus_addr to gtt_phys_addr
drm/i915: Rename gtt_bus_addr to gtt_phys_addr
agp: Use pci_resource_start() to get CPU physical address for BAR
agp: Support 64-bit APBASE
PCI: Add pci_bus_address() to get bus address of a BAR
PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev
PCI: Change pci_bus_region addresses to dma_addr_t
Diffstat (limited to 'include/linux/pci.h')
| -rw-r--r-- | include/linux/pci.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index b89069839020..f7d1dcc002fa 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -552,8 +552,8 @@ int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 val); struct pci_bus_region { - resource_size_t start; - resource_size_t end; + dma_addr_t start; + dma_addr_t end; }; struct pci_dynids { @@ -737,9 +737,9 @@ void pci_fixup_cardbus(struct pci_bus *); /* Generic PCI functions used internally */ -void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, +void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, struct resource *res); -void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, +void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, struct pci_bus_region *region); void pcibios_scan_specific_bus(int busn); struct pci_bus *pci_find_bus(int domain, int busnr); @@ -1089,6 +1089,14 @@ int __must_check pci_bus_alloc_resource(struct pci_bus *bus, resource_size_t), void *alignf_data); +static inline dma_addr_t pci_bus_address(struct pci_dev *pdev, int bar) +{ + struct pci_bus_region region; + + pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]); + return region.start; +} + /* Proper probing supporting hot-pluggable devices */ int __must_check __pci_register_driver(struct pci_driver *, struct module *, const char *mod_name); @@ -1510,10 +1518,6 @@ static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) #include <asm/pci.h> -#ifndef PCIBIOS_MAX_MEM_32 -#define PCIBIOS_MAX_MEM_32 (-1) -#endif - /* these helpers provide future and backwards compatibility * for accessing popular PCI BAR info */ #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) |