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| author | Martin Sperl <kernel@martin.sperl.org> | 2019-02-23 08:49:48 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-05-08 18:28:51 +0900 |
| commit | 0ff2de8bb163551ec4230a5a6f3c40c1f6adec4f (patch) | |
| tree | e144d1f35586e40c4048cf982a63eeff126186ba /include/linux/spi | |
| parent | 154f7da56f1ecba42021d550c9e8432ac8d32c26 (diff) | |
| download | linux-0ff2de8bb163551ec4230a5a6f3c40c1f6adec4f.tar.gz linux-0ff2de8bb163551ec4230a5a6f3c40c1f6adec4f.tar.bz2 linux-0ff2de8bb163551ec4230a5a6f3c40c1f6adec4f.zip | |
spi: core: allow defining time that cs is deasserted
For some SPI devices that support speed_hz > 1MHz the default 10 us delay
when cs_change = 1 is typically way to long and may result in poor spi bus
utilization.
This patch makes it possible to control the delay at micro or nano second
resolution on a per spi_transfer basis. It even allows an "as fast as
possible" mode with:
xfer.cs_change_delay_unit = SPI_DELAY_UNIT_NSECS;
xfer.cs_change_delay = 0;
The delay code is shared between delay_usecs and cs_change_delay for
consistency and reuse, so in the future this change_delay_unit could also
apply to delay_usec as well.
Note that on slower SOCs/CPU actually reaching ns deasserts on cs is not
realistic as the gpio overhead alone (without any delays added ) may
already leave cs deasserted for more than 1us - at least on a raspberry pi.
But at the very least this way we can keep it as short as possible.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/spi')
| -rw-r--r-- | include/linux/spi/spi.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 053abd22ad31..023beb9e9e4b 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -735,6 +735,9 @@ extern void spi_res_release(struct spi_controller *ctlr, * @bits_per_word: select a bits_per_word other than the device default * for this transfer. If 0 the default (from @spi_device) is used. * @cs_change: affects chipselect after this transfer completes + * @cs_change_delay: delay between cs deassert and assert when + * @cs_change is set and @spi_transfer is not the last in @spi_message + * @cs_change_delay_unit: unit of cs_change_delay * @delay_usecs: microseconds to delay after this transfer before * (optionally) changing the chipselect status, then starting * the next transfer or completing this @spi_message. @@ -824,6 +827,10 @@ struct spi_transfer { u8 bits_per_word; u8 word_delay_usecs; u16 delay_usecs; + u16 cs_change_delay; + u8 cs_change_delay_unit; +#define SPI_DELAY_UNIT_USECS 0 +#define SPI_DELAY_UNIT_NSECS 1 u32 speed_hz; u16 word_delay; |