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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-02 05:48:50 +0900 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-02 05:48:50 +0900 |
| commit | f0f52a9463839c52a63c05d6e7d4a330d94a9794 (patch) | |
| tree | d964f65aa37dd46b457bc615f2f37e75390c6df8 /include/linux | |
| parent | 0f48f2600911d5de6393829e4a9986d4075558b3 (diff) | |
| parent | 70e535d1e5d1e4317e894d6228b762cf9c3fbc6a (diff) | |
| download | linux-f0f52a9463839c52a63c05d6e7d4a330d94a9794.tar.gz linux-f0f52a9463839c52a63c05d6e7d4a330d94a9794.tar.bz2 linux-f0f52a9463839c52a63c05d6e7d4a330d94a9794.zip | |
Merge git://git.infradead.org/iommu-2.6
* git://git.infradead.org/iommu-2.6:
intel-iommu: Fix off-by-one in RMRR setup
intel-iommu: Add domain check in domain_remove_one_dev_info
intel-iommu: Remove Host Bridge devices from identity mapping
intel-iommu: Use coherent DMA mask when requested
intel-iommu: Dont cache iova above 32bit
intel-iommu: Speed up processing of the identity_mapping function
intel-iommu: Check for identity mapping candidate using system dma mask
intel-iommu: Only unlink device domains from iommu
intel-iommu: Enable super page (2MiB, 1GiB, etc.) support
intel-iommu: Flush unmaps at domain_exit
intel-iommu: Remove obsolete comment from detect_intel_iommu
intel-iommu: fix VT-d PMR disable for TXT on S3 resume
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/dma_remapping.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h index 5619f8522738..bbd8661b3473 100644 --- a/include/linux/dma_remapping.h +++ b/include/linux/dma_remapping.h @@ -9,8 +9,12 @@ #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) +#define VTD_STRIDE_SHIFT (9) +#define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT) + #define DMA_PTE_READ (1) #define DMA_PTE_WRITE (2) +#define DMA_PTE_LARGE_PAGE (1 << 7) #define DMA_PTE_SNP (1 << 11) #define CONTEXT_TT_MULTI_LEVEL 0 |