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| author | Tyler Baicar <tbaicar@codeaurora.org> | 2017-06-21 12:17:13 -0600 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2017-06-22 18:22:05 +0100 |
| commit | e9279e83ad1f4b5af541a522a81888f828210b40 (patch) | |
| tree | a6ef3e7defd8a432b9df29877400084e2a4243b1 /include/ras/ras_event.h | |
| parent | 297b64c74385fc7ea5dfff66105ab6465f2df49a (diff) | |
| download | linux-e9279e83ad1f4b5af541a522a81888f828210b40.tar.gz linux-e9279e83ad1f4b5af541a522a81888f828210b40.tar.bz2 linux-e9279e83ad1f4b5af541a522a81888f828210b40.zip | |
trace, ras: add ARM processor error trace event
Currently there are trace events for the various RAS
errors with the exception of ARM processor type errors.
Add a new trace event for such errors so that the user
will know when they occur. These trace events are
consistent with the ARM processor error section type
defined in UEFI 2.6 spec section N.2.4.4.
Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Reviewed-by: Xie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/ras/ras_event.h')
| -rw-r--r-- | include/ras/ras_event.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 4f79ba94fa6b..429f46fb61e4 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -162,6 +162,51 @@ TRACE_EVENT(mc_event, ); /* + * ARM Processor Events Report + * + * This event is generated when hardware detects an ARM processor error + * has occurred. UEFI 2.6 spec section N.2.4.4. + */ +TRACE_EVENT(arm_event, + + TP_PROTO(const struct cper_sec_proc_arm *proc), + + TP_ARGS(proc), + + TP_STRUCT__entry( + __field(u64, mpidr) + __field(u64, midr) + __field(u32, running_state) + __field(u32, psci_state) + __field(u8, affinity) + ), + + TP_fast_assign( + if (proc->validation_bits & CPER_ARM_VALID_AFFINITY_LEVEL) + __entry->affinity = proc->affinity_level; + else + __entry->affinity = ~0; + if (proc->validation_bits & CPER_ARM_VALID_MPIDR) + __entry->mpidr = proc->mpidr; + else + __entry->mpidr = 0ULL; + __entry->midr = proc->midr; + if (proc->validation_bits & CPER_ARM_VALID_RUNNING_STATE) { + __entry->running_state = proc->running_state; + __entry->psci_state = proc->psci_state; + } else { + __entry->running_state = ~0; + __entry->psci_state = ~0; + } + ), + + TP_printk("affinity level: %d; MPIDR: %016llx; MIDR: %016llx; " + "running state: %d; PSCI state: %d", + __entry->affinity, __entry->mpidr, __entry->midr, + __entry->running_state, __entry->psci_state) +); + +/* * Non-Standard Section Report * * This event is generated when hardware detected a hardware |