diff options
| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2022-02-16 16:30:11 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-02-17 14:06:51 +0000 |
| commit | 9d75b8818537fe64e6eae033765b9dc1b3107c15 (patch) | |
| tree | c645b2164c6f2f39d9a73b624b9507e8c725b584 /include/soc | |
| parent | e42bd4ed09aaf57949f199ae02d20a7108ccf73b (diff) | |
| download | linux-9d75b8818537fe64e6eae033765b9dc1b3107c15.tar.gz linux-9d75b8818537fe64e6eae033765b9dc1b3107c15.tar.bz2 linux-9d75b8818537fe64e6eae033765b9dc1b3107c15.zip | |
net: mscc: ocelot: annotate which traps need PTP timestamping
The ocelot switch library does not need this information, but the felix
DSA driver does.
As a reminder, the VSC9959 switch in LS1028A doesn't have an IRQ line
for packet extraction, so to be notified that a PTP packet needs to be
dequeued, it receives that packet also over Ethernet, by setting up a
packet trap. The Felix driver needs to install special kinds of traps
for packets in need of RX timestamps, such that the packets are
replicated both over Ethernet and over the CPU port module.
But the Ocelot switch library sets up more than one trap for PTP event
messages; it also traps PTP general messages, MRP control messages etc.
Those packets don't need PTP timestamps, so there's no reason for the
Felix driver to send them to the CPU port module.
By knowing which traps need PTP timestamps, the Felix driver can
adjust the traps installed using ocelot_trap_add() such that only those
will actually get delivered to the CPU port module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/mscc/ocelot_vcap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/soc/mscc/ocelot_vcap.h b/include/soc/mscc/ocelot_vcap.h index 69b3d880302d..50af64e2ca3c 100644 --- a/include/soc/mscc/ocelot_vcap.h +++ b/include/soc/mscc/ocelot_vcap.h @@ -695,6 +695,7 @@ struct ocelot_vcap_filter { struct ocelot_vcap_action action; struct ocelot_vcap_stats stats; /* For VCAP IS1 and IS2 */ + bool take_ts; unsigned long ingress_port_mask; /* For VCAP ES0 */ struct ocelot_vcap_port ingress_port; |