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| author | Rob Herring <robh@kernel.org> | 2014-05-20 14:22:54 -0500 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2014-05-20 14:22:54 -0500 |
| commit | 6e87b7030e3ef2c7ad01fcaa1b46d3ebe6c261e7 (patch) | |
| tree | e01eaf5fcfed6767da9fcfd8f5120ef667c81bb8 /include/uapi | |
| parent | eafd370dfe487facfdef499057f4eac9aa0b4bf5 (diff) | |
| parent | e26f1db9b8d74617519e50b41749900d0a257406 (diff) | |
| download | linux-6e87b7030e3ef2c7ad01fcaa1b46d3ebe6c261e7.tar.gz linux-6e87b7030e3ef2c7ad01fcaa1b46d3ebe6c261e7.tar.bz2 linux-6e87b7030e3ef2c7ad01fcaa1b46d3ebe6c261e7.zip | |
Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty into for-next
Conflicts:
arch/arm64/kernel/early_printk.c
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/linux/serial_core.h | 8 | ||||
| -rw-r--r-- | include/uapi/linux/serial_reg.h | 2 |
2 files changed, 8 insertions, 2 deletions
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index b47dba2c1e6f..5820269aa132 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -211,7 +211,7 @@ /* VIA VT8500 SoC */ #define PORT_VT8500 97 -/* Xilinx PSS UART */ +/* Cadence (Xilinx Zynq) UART */ #define PORT_XUARTPS 98 /* Atheros AR933X SoC */ @@ -238,4 +238,10 @@ /* Tilera TILE-Gx UART */ #define PORT_TILEGX 106 +/* MEN 16z135 UART */ +#define PORT_MEN_Z135 107 + +/* SC16IS74xx */ +#define PORT_SC16IS7XX 108 + #endif /* _UAPILINUX_SERIAL_CORE_H */ diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h index e6322605b138..99b47058816a 100644 --- a/include/uapi/linux/serial_reg.h +++ b/include/uapi/linux/serial_reg.h @@ -32,7 +32,7 @@ #define UART_IIR 2 /* In: Interrupt ID Register */ #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ +#define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ #define UART_IIR_MSI 0x00 /* Modem status interrupt */ #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ |