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author | Linus Torvalds <torvalds@merom.osdl.org> | 2006-11-08 10:23:03 -0800 |
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committer | Linus Torvalds <torvalds@merom.osdl.org> | 2006-11-08 10:23:03 -0800 |
commit | 6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a (patch) | |
tree | ae135f5fcc6ab29f3fc0d057f4a9c10e5be58cbf /include | |
parent | 464908d7e2a9f77cb50ee905cda8a59e5b4e50e4 (diff) | |
download | linux-6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a.tar.gz linux-6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a.tar.bz2 linux-6c0ffb9d2fd987c79c6cbb81c3f3011c63749b1a.zip |
x86-64: clean up io-apic accesses
This is just commit 130fe05dbc0114609cfef9815c0c5580b42decfa ported to
x86-64, for all the same reasons. It cleans up the IO-APIC accesses in
order to then fix the ordering issues.
We move the accessor functions (that were only used by io_apic.c) out of
a header file, and use proper memory-mapped accesses rather than making
up our own "volatile" pointers.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-x86_64/io_apic.h | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h index 171ec2dc8c04..561ecbfd4cb5 100644 --- a/include/asm-x86_64/io_apic.h +++ b/include/asm-x86_64/io_apic.h @@ -12,10 +12,6 @@ #define APIC_MISMATCH_DEBUG -#define IO_APIC_BASE(idx) \ - ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \ - + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK))) - /* * The structure of the IO-APIC: */ @@ -119,36 +115,6 @@ extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* non-0 if default (table-less) MP configuration */ extern int mpc_default_type; -static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) -{ - *IO_APIC_BASE(apic) = reg; - return *(IO_APIC_BASE(apic)+4); -} - -static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) -{ - *IO_APIC_BASE(apic) = reg; - *(IO_APIC_BASE(apic)+4) = value; -} - -/* - * Re-write a value: to be used for read-modify-write - * cycles where the read already set up the index register. - */ -static inline void io_apic_modify(unsigned int apic, unsigned int value) -{ - *(IO_APIC_BASE(apic)+4) = value; -} - -/* - * Synchronize the IO-APIC and the CPU by doing - * a dummy read from the IO-APIC - */ -static inline void io_apic_sync(unsigned int apic) -{ - (void) *(IO_APIC_BASE(apic)+4); -} - /* 1 if "noapic" boot option passed */ extern int skip_ioapic_setup; |