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authorLinus Walleij <linus.walleij@stericsson.com>2010-11-29 13:52:27 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-12-03 16:35:40 +0000
commitb5602e86432aaf0cc90dd207bf74e3a2bfb5078b (patch)
treed6c1a8c931bf299a1eaf57ebbe59af6c690e1c5a /include
parent593cd8711221c9661dbf9beb2fb42fecca03e693 (diff)
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mtd: FSMC NAND fix obvious speling errors
Fix spelling in the interface file. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/fsmc.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index 96e8e67a053e..6987995ad3cf 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -28,7 +28,7 @@
/*
* The placement of the Command Latch Enable (CLE) and
- * Address Latch Enable (ALE) is twised around in the
+ * Address Latch Enable (ALE) is twisted around in the
* SPEAR310 implementation.
*/
#if defined(CONFIG_MACH_SPEAR310)
@@ -63,7 +63,7 @@ struct fsmc_nor_bank_regs {
/* ctrl_tim register definitions */
-struct fsms_nand_bank_regs {
+struct fsmc_nand_bank_regs {
uint32_t pc;
uint32_t sts;
uint32_t comm;
@@ -79,7 +79,7 @@ struct fsms_nand_bank_regs {
struct fsmc_regs {
struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
uint8_t reserved_1[0x40 - 0x20];
- struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
+ struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
uint8_t reserved_2[0xfe0 - 0xc0];
uint32_t peripid0; /* 0xfe0 */
uint32_t peripid1; /* 0xfe4 */