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authorMatan Barak <matanb@mellanox.com>2018-03-28 09:27:55 +0300
committerJason Gunthorpe <jgg@mellanox.com>2018-04-04 12:06:28 -0600
commit2d93fc856959bb940b3cf1e7cbad38721d6bea75 (patch)
tree78cbf6275d037224778eb6ee6256e52bd30982e1 /include
parentc03faa562d0279e463900c92d4a54c0dc3c806b0 (diff)
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IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR
When a Raw Ethernet QP is created, we actually create a few objects. One of these objects is a TIR. Currently, a TIR could hash (and spread the traffic) by IP or port only. Adding a hashing by IPSec SPI to TIR creation with the required UAPI bit. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Diffstat (limited to 'include')
-rw-r--r--include/uapi/rdma/mlx5-abi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/rdma/mlx5-abi.h b/include/uapi/rdma/mlx5-abi.h
index f60d2659cdb7..d86a65b993f8 100644
--- a/include/uapi/rdma/mlx5-abi.h
+++ b/include/uapi/rdma/mlx5-abi.h
@@ -327,6 +327,7 @@ enum mlx5_rx_hash_fields {
MLX5_RX_HASH_DST_PORT_TCP = 1 << 5,
MLX5_RX_HASH_SRC_PORT_UDP = 1 << 6,
MLX5_RX_HASH_DST_PORT_UDP = 1 << 7,
+ MLX5_RX_HASH_IPSEC_SPI = 1 << 8,
/* Save bits for future fields */
MLX5_RX_HASH_INNER = (1UL << 31),
};