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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2015-11-11 22:30:30 +0100 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-04-19 22:05:38 +0200 |
| commit | 5abcd95d8c69008c72d54d7763e0ee2b5df84ac4 (patch) | |
| tree | 5eb62927cb19084d9b14071a54c2b24e55736634 /include | |
| parent | 2d43457f79e48ee427666fdbfe9a53f35d3a1672 (diff) | |
| download | linux-5abcd95d8c69008c72d54d7763e0ee2b5df84ac4.tar.gz linux-5abcd95d8c69008c72d54d7763e0ee2b5df84ac4.tar.bz2 linux-5abcd95d8c69008c72d54d7763e0ee2b5df84ac4.zip | |
mtd: nand: sunxi: adapt clk_rate to tWB, tADL, tWHR and tRHW timings
Adapt the NAND controller clk rate to the tWB, tADL, tWHR and tRHW
timings instead of returning an error when the maximum clk divisor is
not big enough to provide an appropriate timing.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions