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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-26 17:01:18 -0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-12-26 17:01:18 -0800 |
commit | daf273350d96241752b00020940c07dc2cff2e0a (patch) | |
tree | c0a0557da09404455b6b4672fb9bd6f1147a8d16 /ipc | |
parent | f7dbd84fd49e487df68b3a95780c275d7da1891c (diff) | |
parent | 9955a7835bf376e12482583958b2661f501b868b (diff) | |
download | linux-daf273350d96241752b00020940c07dc2cff2e0a.tar.gz linux-daf273350d96241752b00020940c07dc2cff2e0a.tar.bz2 linux-daf273350d96241752b00020940c07dc2cff2e0a.zip |
Merge tag 'phy-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.5
*) new PHY driver for hi6220 usb and rcar gen3 usb2
*) deprecate phy-omap-control driver. phy-omap-control driver was added
when there was no proper infrastructure for doing control module
initialization. The phy-omap-control driver is not an 'actual' PHY
driver and it was just a hack to do PHY related control module
initialization. Now with SYSCON framework in the kernel, control
module setttings can be done using APIs provided by syscon.
*) usbphy-internal pll creates the needed 480MHz and is also a
supply-clock back to the core clock-controller in Rockchip SoCs.
This is now modeled as a real clock.
*) calibrate mt65xx usb3 PHY for better eye diagram and receiver
sensitivity.
*) Miscellaneous cleanups.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'ipc')
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