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authorHiroshi DOYU <hdoyu@nvidia.com>2012-05-10 10:45:32 +0300
committerJoerg Roedel <joerg.roedel@amd.com>2012-05-11 11:42:05 +0200
commit774dfc9bb7f2ab1950a790a8f13eca3d5c580033 (patch)
treec93680af050fcef7f5aff981ecfd3cf60abaf570 /kernel/pid.c
parent7cffae421e3cd29410ef4d75f2244655fdde3b60 (diff)
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iommu/tegra: gart: Fix register offset correctly
DT passes the exact GART register ranges without any overlapping with MC register ranges. GART register offset needs to be adjusted by one passed by DT correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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