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| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-02 14:48:50 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-29 02:42:28 +0200 |
| commit | 516db1c61f3fd4328361699a2c74781ab1dbf84c (patch) | |
| tree | d7081b6226e45a468823885d998b1434a4c1cc3e /mm/interval_tree.c | |
| parent | 9b03d8abe06d92195712fd489b2e8983de27fa68 (diff) | |
| download | linux-516db1c61f3fd4328361699a2c74781ab1dbf84c.tar.gz linux-516db1c61f3fd4328361699a2c74781ab1dbf84c.tar.bz2 linux-516db1c61f3fd4328361699a2c74781ab1dbf84c.zip | |
MIPS: CM: Avoid per-core locking with CM3 & higher
CM3 provides a GCR_CL_OTHER register per VP, rather than only per core.
This means that we don't need to prevent other VPs within a core from
racing with code that makes use of the core-other register region.
Reduce locking overhead by demoting the per-core spinlock providing
protection for CM2.5 & lower to a per-CPU/per-VP spinlock for CM3 &
higher.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16193/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'mm/interval_tree.c')
0 files changed, 0 insertions, 0 deletions