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author | Cyrille Pitchen <cyrille.pitchen@atmel.com> | 2016-03-24 15:40:04 +0100 |
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committer | David S. Miller <davem@davemloft.net> | 2016-03-24 14:50:31 -0400 |
commit | ba5049945421b8d2f3e2af786a15d13b82316503 (patch) | |
tree | 281c0cc217be65eec83d5ef3af82b514322288f6 /net/switchdev | |
parent | 7629d9c1a28bbaac601091e5bb78273d95835caf (diff) | |
download | linux-ba5049945421b8d2f3e2af786a15d13b82316503.tar.gz linux-ba5049945421b8d2f3e2af786a15d13b82316503.tar.bz2 linux-ba5049945421b8d2f3e2af786a15d13b82316503.zip |
net: macb: replace macb_writel() call by queue_writel() to update queue ISR
macb_interrupt() should not use macb_writel(bp, ISR, <value>) but only
queue_writel(queue, ISR, <value>).
There is one IRQ and one set of {ISR, IER, IDR, IMR} [1] registers per
queue on gem hardware, though only queue0 is actually used for now to
receive frames: other queues can already be used to transmit frames.
The queue_readl() and queue_writel() helper macros are designed to access
the relevant IRQ registers.
[1]
ISR: Interrupt Status Register
IER: Interrupt Enable Register
IDR: Interrupt Disable Register
IMR: Interrupt Mask Register
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Fixes: bfbb92c44670 ("net: macb: Handle the RXUBR interrupt on all devices")
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/switchdev')
0 files changed, 0 insertions, 0 deletions