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| author | Thierry Reding <treding@nvidia.com> | 2015-05-04 16:45:25 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:38:31 +0200 |
| commit | 1dad36cdd5d20b4d7ceca5026553e86b3315b022 (patch) | |
| tree | a8ce7779c763c7cf65db77d0a5c90628d09866d0 /samples/bpf | |
| parent | 82df0e5e78d956ea3552f7315a4d559f657047da (diff) | |
| download | linux-1dad36cdd5d20b4d7ceca5026553e86b3315b022.tar.gz linux-1dad36cdd5d20b4d7ceca5026553e86b3315b022.tar.bz2 linux-1dad36cdd5d20b4d7ceca5026553e86b3315b022.zip | |
soc/tegra: fuse: Add spare bit offset for Tegra210
The offset of the first spare bit register on Tegra210 is 0x380, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'samples/bpf')
0 files changed, 0 insertions, 0 deletions