diff options
| author | Jason Gunthorpe <jgunthorpe@obsidianresearch.com> | 2016-11-21 22:26:45 +0000 |
|---|---|---|
| committer | Alan Tull <atull@opensource.altera.com> | 2016-11-29 15:51:48 -0600 |
| commit | 340c0c53ea3073107d5bb7a61f3158e50bf189e0 (patch) | |
| tree | bdabfcaac67ee4ab224aa5993010ddefbf8ba4db /samples | |
| parent | 80baf649c2778bb8900cb9011bc712b89faddbdb (diff) | |
| download | linux-340c0c53ea3073107d5bb7a61f3158e50bf189e0.tar.gz linux-340c0c53ea3073107d5bb7a61f3158e50bf189e0.tar.bz2 linux-340c0c53ea3073107d5bb7a61f3158e50bf189e0.zip | |
fpga zynq: Fix incorrect ISR state on bootup
It is best practice to clear and mask all interrupts before
associating the IRQ, and this should be done after the clock
is enabled.
This corrects a bad result from zynq_fpga_ops_state on bootup
where left over latched values in INT_STS_OFFSET caused it to
report an unconfigured FPGA as configured.
After this change the boot up operating state for an unconfigured
FPGA reports 'unknown'.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions