diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-21 01:27:39 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-08-14 01:10:42 +0900 |
commit | 6ba7dc6616ce69ef667204df29597767c1c9ebcf (patch) | |
tree | 728b95152c9dbd98b45f4562c9aa2ddd35e57793 /scripts/Makefile.lib | |
parent | 49d5089d926c2bf0c76410bf32e5c48b296ec6f6 (diff) | |
download | linux-6ba7dc6616ce69ef667204df29597767c1c9ebcf.tar.gz linux-6ba7dc6616ce69ef667204df29597767c1c9ebcf.tar.bz2 linux-6ba7dc6616ce69ef667204df29597767c1c9ebcf.zip |
kbuild: make bison create C file and header in a single pattern rule
We generally expect bison to create not only a C file, but also a
header, which will be included from the lexer.
Currently, Kbuild generates them in separate rules. So, for instance,
when building Kconfig, you will notice bison is invoked twice:
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.h
HOSTCC scripts/kconfig/lexer.lex.o
YACC scripts/kconfig/parser.tab.c
HOSTCC scripts/kconfig/parser.tab.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTLD scripts/kconfig/conf
Make handles such cases nicely in pattern rules [1]. Merge the two
rules so that one invokcation of bison can generate both of them.
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTLD scripts/kconfig/conf
[1] Pattern rule
GNU Make manual says:
"Pattern rules may have more than one target. Unlike normal rules,
this does not act as many different rules with the same prerequisites
and recipe. If a pattern rule has multiple targets, make knows that
the rule's recipe is responsible for making all of the targets. The
recipe is executed only once to make all the targets. When searching
for a pattern rule to match a target, the target patterns of a rule
other than the one that matches the target in need of a rule are
incidental: make worries only about giving a recipe and prerequisites
to the file presently in question. However, when this file's recipe is
run, the other targets are marked as having been updated themselves."
https://www.gnu.org/software/make/manual/html_node/Pattern-Intro.html
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'scripts/Makefile.lib')
-rw-r--r-- | scripts/Makefile.lib | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 41c50f9461e5..67d1165ab2ab 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -197,18 +197,12 @@ $(obj)/%.lex.c: $(src)/%.l FORCE # YACC # --------------------------------------------------------------------------- -quiet_cmd_bison = YACC $@ - cmd_bison = $(YACC) -o$@ -t -l $< +quiet_cmd_bison = YACC $(basename $@).[ch] + cmd_bison = $(YACC) -o $(basename $@).c --defines=$(basename $@).h -t -l $< -$(obj)/%.tab.c: $(src)/%.y FORCE +$(obj)/%.tab.c $(obj)/%.tab.h: $(src)/%.y FORCE $(call if_changed,bison) -quiet_cmd_bison_h = YACC $@ - cmd_bison_h = $(YACC) -o/dev/null --defines=$@ -t -l $< - -$(obj)/%.tab.h: $(src)/%.y FORCE - $(call if_changed,bison_h) - # Shipped files # =========================================================================== |