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| author | Joerg Roedel <joro@8bytes.org> | 2013-04-18 17:55:04 +0200 |
|---|---|---|
| committer | Joerg Roedel <joro@8bytes.org> | 2013-04-19 20:53:26 +0200 |
| commit | d3263bc29706e42f74d8800807c2dedf320d77f1 (patch) | |
| tree | 7a1208b29e81c620265899b2b9a940e5a7328ed9 /security | |
| parent | 7d8bfa26f236bc9528415402dda6b498a0682e42 (diff) | |
| download | linux-d3263bc29706e42f74d8800807c2dedf320d77f1.tar.gz linux-d3263bc29706e42f74d8800807c2dedf320d77f1.tar.bz2 linux-d3263bc29706e42f74d8800807c2dedf320d77f1.zip | |
iommu/amd: Workaround for ERBT1312
Work around an IOMMU hardware bug where clearing the
EVT_INT or PPR_INT bit in the status register may race with
the hardware trying to set it again. When not handled the
bit might not be cleared and we lose all future event or ppr
interrupts.
Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions