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| author | Takashi Iwai <tiwai@suse.de> | 2011-10-27 10:43:40 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2011-10-27 10:43:40 +0200 |
| commit | bb14eb0da72afb69be261b28ec858cbd5a35e089 (patch) | |
| tree | fa72a87d21e506c990b63657d782936311cfa7cf /sound/soc/codecs/sta32x.c | |
| parent | 9430148d800dd929ad73da4c6afb67f793f8af43 (diff) | |
| parent | 5927f94700e860ae27ff24e7f3bc9e4f7b9922eb (diff) | |
| download | linux-bb14eb0da72afb69be261b28ec858cbd5a35e089.tar.gz linux-bb14eb0da72afb69be261b28ec858cbd5a35e089.tar.bz2 linux-bb14eb0da72afb69be261b28ec858cbd5a35e089.zip | |
Merge branch 'topic/asoc' into for-linus
Diffstat (limited to 'sound/soc/codecs/sta32x.c')
| -rw-r--r-- | sound/soc/codecs/sta32x.c | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c index 5c7def3979c0..bb82408ab8e1 100644 --- a/sound/soc/codecs/sta32x.c +++ b/sound/soc/codecs/sta32x.c @@ -756,25 +756,19 @@ static int sta32x_probe(struct snd_soc_codec *codec) return ret; } - /* read reg reset values into cache */ - for (i = 0; i < STA32X_REGISTER_COUNT; i++) - snd_soc_cache_write(codec, i, sta32x_regs[i]); - - /* preserve reset values of reserved register bits */ - snd_soc_cache_write(codec, STA32X_CONFC, - codec->hw_read(codec, STA32X_CONFC)); - snd_soc_cache_write(codec, STA32X_CONFE, - codec->hw_read(codec, STA32X_CONFE)); - snd_soc_cache_write(codec, STA32X_CONFF, - codec->hw_read(codec, STA32X_CONFF)); - snd_soc_cache_write(codec, STA32X_MMUTE, - codec->hw_read(codec, STA32X_MMUTE)); - snd_soc_cache_write(codec, STA32X_AUTO1, - codec->hw_read(codec, STA32X_AUTO1)); - snd_soc_cache_write(codec, STA32X_AUTO3, - codec->hw_read(codec, STA32X_AUTO3)); - snd_soc_cache_write(codec, STA32X_C3CFG, - codec->hw_read(codec, STA32X_C3CFG)); + /* Chip documentation explicitly requires that the reset values + * of reserved register bits are left untouched. + * Write the register default value to cache for reserved registers, + * so the write to the these registers are suppressed by the cache + * restore code when it skips writes of default registers. + */ + snd_soc_cache_write(codec, STA32X_CONFC, 0xc2); + snd_soc_cache_write(codec, STA32X_CONFE, 0xc2); + snd_soc_cache_write(codec, STA32X_CONFF, 0x5c); + snd_soc_cache_write(codec, STA32X_MMUTE, 0x10); + snd_soc_cache_write(codec, STA32X_AUTO1, 0x60); + snd_soc_cache_write(codec, STA32X_AUTO3, 0x00); + snd_soc_cache_write(codec, STA32X_C3CFG, 0x40); /* FIXME enable thermal warning adjustment and recovery */ snd_soc_update_bits(codec, STA32X_CONFA, @@ -837,6 +831,7 @@ static const struct snd_soc_codec_driver sta32x_codec = { .resume = sta32x_resume, .reg_cache_size = STA32X_REGISTER_COUNT, .reg_word_size = sizeof(u8), + .reg_cache_default = sta32x_regs, .volatile_register = sta32x_reg_is_volatile, .set_bias_level = sta32x_set_bias_level, .controls = sta32x_snd_controls, |