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| author | Thomas Niederprüm <niederp@physik.uni-kl.de> | 2015-02-21 18:11:29 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-02-26 11:48:49 +0900 |
| commit | 8af4baa7087a0ae74c6ee29d4d979a60e14b119e (patch) | |
| tree | 1e76ae6b4873c8593c6214e91860a0e7d17cace9 /sound/soc/omap | |
| parent | fb5ab7296a2bea17c38fae48af2808a07049ac90 (diff) | |
| download | linux-8af4baa7087a0ae74c6ee29d4d979a60e14b119e.tar.gz linux-8af4baa7087a0ae74c6ee29d4d979a60e14b119e.tar.bz2 linux-8af4baa7087a0ae74c6ee29d4d979a60e14b119e.zip | |
ASoC: OMAP: mcbsp: Fix CLKX and CLKR pinmux when used as inputs
This patch fixes faulty behaviour in a setup where the input clock for the
SRG is fed through the CLKR/CLKX pin but the McBSP is configured to be
master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR/CLKX must
not be configured as output pin. Otherwise the input clock is messed up
horribly.
This patch makes it possible to use the CLKR/CLKX pin rather than CLKS to
inject a reference clock in setups where McBSP is master and not both
rx and tx are used. However for this to work it has to be ensured that
set_dai_sysclk() is called after set_dai_fmt().
This was tested on a beagleboard-xm using McBSP1 to drive a i2s DAC through
the tx lines (CLKX,FSX,DX). Using this patch the CLKR pin is used to inject
an external reference clock.
Signed-off-by: Thomas Niederprüm <niederp@physik.uni-kl.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/omap')
| -rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index c7eb9dd67f60..fd99d89de6a8 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -530,8 +530,19 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, case OMAP_MCBSP_SYSCLK_CLKX_EXT: regs->srgr2 |= CLKSM; + regs->pcr0 |= SCLKME; + /* + * If McBSP is master but yet the CLKX/CLKR pin drives the SRG, + * disable output on those pins. This enables to inject the + * reference clock through CLKX/CLKR. For this to work + * set_dai_sysclk() _needs_ to be called after set_dai_fmt(). + */ + regs->pcr0 &= ~CLKXM; + break; case OMAP_MCBSP_SYSCLK_CLKR_EXT: regs->pcr0 |= SCLKME; + /* Disable ouput on CLKR pin in master mode */ + regs->pcr0 &= ~CLKRM; break; default: err = -ENODEV; |