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authorVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>2017-07-07 05:09:33 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-07-10 10:28:07 +0200
commit2752660a37aed65b1e00fd4563d9f152eefb8200 (patch)
tree87884428eea2eaa8e6aacd309aff820a00e3cefa /sound
parent5e2feac330953fe75197aecb20c781400e2bf606 (diff)
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arm64: dts: renesas: ulcb: sound clock-frequency needs descending order
Correct order of sound clock frequencies for ULCB boards used with r8a7795 and r8a7796 SoCs. These sounds clock frequencies are used as the ADG clock (output clocks for audio module) initial setting and sound codec's initial system clock which needs the maximum clock frequency. Thus, descending order is required. Fixes: 9f22774c214ada7b ("arm64: dts: ulcb: add 12288000 for sound ADG") Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: rewrote changelog] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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