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authorMarcin Nowakowski <marcin.nowakowski@imgtec.com>2017-04-19 14:07:43 +0200
committerRalf Baechle <ralf@linux-mips.org>2017-06-08 14:51:58 +0200
commitf7a31b5e7874f77464a4eae0a8ba84b9ae0b3a54 (patch)
tree2958e54b187b6b3a3f1d0fce00c0a261940fbfd0 /tools/arch/frv
parent3c2993b8c6143d8a5793746a54eba8f86f95240f (diff)
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MIPS: perf: Remove incorrect odd/even counter handling for I6400
All performance counters on I6400 (odd and even) are capable of counting any of the available events, so drop current logic of using the extra bit to determine which counter to use. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Fixes: 4e88a8621301 ("MIPS: Add cases for CPU_I6400") Fixes: fd716fca10fc ("MIPS: perf: Fix I6400 event numbers") Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15991/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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