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| author | Athira Rajeev <atrajeev@linux.vnet.ibm.com> | 2021-02-03 01:55:37 -0500 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2021-02-08 16:25:00 -0300 |
| commit | 068aeea3773a6f4c90303fdbb9318dd56aae8ac7 (patch) | |
| tree | 4bd92b84b828d5a668928c9040574c6adf3bbe67 /tools/perf/arch/powerpc/util/perf_regs.c | |
| parent | 900547dd0fd273f03fd10cf5f48824056ddb4fdb (diff) | |
| download | linux-068aeea3773a6f4c90303fdbb9318dd56aae8ac7.tar.gz linux-068aeea3773a6f4c90303fdbb9318dd56aae8ac7.tar.bz2 linux-068aeea3773a6f4c90303fdbb9318dd56aae8ac7.zip | |
perf powerpc: Support exposing Performance Monitor Counter SPRs as part of extended regs
To enable presenting of Performance Monitor Counter Registers (PMC1 to
PMC6) as part of extended regsiters, this patch adds these to
sample_reg_mask in the tool side (to use with -I? option).
Simplified the PERF_REG_PMU_MASK_300/31 definition. Excluded the
unsupported SPRs (MMCR3, SIER2, SIER3) from extended mask value for
CPU_FTR_ARCH_300.
Signed-off-by: Athira Jajeev <atrajeev@linux.vnet.ibm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/arch/powerpc/util/perf_regs.c')
| -rw-r--r-- | tools/perf/arch/powerpc/util/perf_regs.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c index 2b6d4704e3aa..8116a253f91f 100644 --- a/tools/perf/arch/powerpc/util/perf_regs.c +++ b/tools/perf/arch/powerpc/util/perf_regs.c @@ -68,6 +68,12 @@ const struct sample_reg sample_reg_masks[] = { SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3), SMPL_REG(sier2, PERF_REG_POWERPC_SIER2), SMPL_REG(sier3, PERF_REG_POWERPC_SIER3), + SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1), + SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2), + SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3), + SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4), + SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5), + SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6), SMPL_REG_END }; |