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| author | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2020-05-19 16:28:34 -0700 |
|---|---|---|
| committer | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2020-05-22 11:18:15 -0700 |
| commit | 873e391ff33e742189cd7da5ed4bfd941e83edd7 (patch) | |
| tree | ba494b995052c143f6b8c4956d205fccc0fe4af7 /tools/power/x86 | |
| parent | e16ea66365e43d5e3b338ba8d406dec38c6c3d39 (diff) | |
| download | linux-873e391ff33e742189cd7da5ed4bfd941e83edd7.tar.gz linux-873e391ff33e742189cd7da5ed4bfd941e83edd7.tar.bz2 linux-873e391ff33e742189cd7da5ed4bfd941e83edd7.zip | |
tools/power/x86/intel-speed-select: Fix invalid core mask
The core mask display is wrong in some cases. This is showing more
cpus than the mask has. This is because mask is 64 bit but it used
with BIT() macro to get the presence of CPU which doesn't support
unsigned long long. Added a new macro for BIT_ULL and use that
to get the presence of a CPU.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Diffstat (limited to 'tools/power/x86')
| -rw-r--r-- | tools/power/x86/intel-speed-select/isst-config.c | 2 | ||||
| -rw-r--r-- | tools/power/x86/intel-speed-select/isst.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/tools/power/x86/intel-speed-select/isst-config.c b/tools/power/x86/intel-speed-select/isst-config.c index 8b99e403e68c..9f68f51ca652 100644 --- a/tools/power/x86/intel-speed-select/isst-config.c +++ b/tools/power/x86/intel-speed-select/isst-config.c @@ -653,7 +653,7 @@ void set_cpu_mask_from_punit_coremask(int cpu, unsigned long long core_mask, pkg_id = get_physical_package_id(cpu); for (i = 0; i < 64; ++i) { - if (core_mask & BIT(i)) { + if (core_mask & BIT_ULL(i)) { int j; for (j = 0; j < topo_max_cpus; ++j) { diff --git a/tools/power/x86/intel-speed-select/isst.h b/tools/power/x86/intel-speed-select/isst.h index 2e1afd856a78..094ba4589a9c 100644 --- a/tools/power/x86/intel-speed-select/isst.h +++ b/tools/power/x86/intel-speed-select/isst.h @@ -29,6 +29,7 @@ #include <sys/ioctl.h> #define BIT(x) (1 << (x)) +#define BIT_ULL(nr) (1ULL << (nr)) #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (sizeof(long) * 8 - 1 - (h)))) #define GENMASK_ULL(h, l) \ (((~0ULL) << (l)) & (~0ULL >> (sizeof(long long) * 8 - 1 - (h)))) |