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| author | Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | 2016-04-28 15:01:10 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-05-11 21:54:06 +1000 |
| commit | f47822078dece7189cad0a5f472f148e5e916736 (patch) | |
| tree | 5a8b4aa8b1123d1d1fb28dd7c97fb3edb795ed60 /tools | |
| parent | c4522469e6418fb547fbcd9d3aeb73bea0f6f859 (diff) | |
| download | linux-f47822078dece7189cad0a5f472f148e5e916736.tar.gz linux-f47822078dece7189cad0a5f472f148e5e916736.tar.bz2 linux-f47822078dece7189cad0a5f472f148e5e916736.zip | |
perf tools: Fix perf regs mask generation
On some architectures (powerpc in particular), the number of registers
exceeds what can be represented in an integer bitmask. Ensure we
generate the proper bitmask on such platforms.
Fixes: 71ad0f5e4 ("perf tools: Support for DWARF CFI unwinding on post processing")
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/perf/util/perf_regs.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tools/perf/util/perf_regs.c b/tools/perf/util/perf_regs.c index 6b8eb13e14e4..c4023f22f287 100644 --- a/tools/perf/util/perf_regs.c +++ b/tools/perf/util/perf_regs.c @@ -12,18 +12,18 @@ int perf_reg_value(u64 *valp, struct regs_dump *regs, int id) int i, idx = 0; u64 mask = regs->mask; - if (regs->cache_mask & (1 << id)) + if (regs->cache_mask & (1ULL << id)) goto out; - if (!(mask & (1 << id))) + if (!(mask & (1ULL << id))) return -EINVAL; for (i = 0; i < id; i++) { - if (mask & (1 << i)) + if (mask & (1ULL << i)) idx++; } - regs->cache_mask |= (1 << id); + regs->cache_mask |= (1ULL << id); regs->cache_regs[id] = regs->regs[idx]; out: |