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| author | James Morse <james.morse@arm.com> | 2019-08-27 18:06:46 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-27 18:16:02 +0100 |
| commit | e8688ba3874915b7d1661a57adf15a9c9e877df7 (patch) | |
| tree | 6a74212f5ec43b4c9404df128a9e44a7fdf943b0 /virt | |
| parent | 3109741a8d773b91eec4a1f7764c97a1176ec32d (diff) | |
| download | linux-e8688ba3874915b7d1661a57adf15a9c9e877df7.tar.gz linux-e8688ba3874915b7d1661a57adf15a9c9e877df7.tar.bz2 linux-e8688ba3874915b7d1661a57adf15a9c9e877df7.zip | |
arm64: KVM: Device mappings should be execute-never
Since commit 2f6ea23f63cca ("arm64: KVM: Avoid marking pages as XN in
Stage-2 if CTR_EL0.DIC is set"), KVM has stopped marking normal memory
as execute-never at stage2 when the system supports D->I Coherency at
the PoU. This avoids KVM taking a trap when the page is first executed,
in order to clean it to PoU.
The patch that added this change also wrapped PAGE_S2_DEVICE mappings
up in this too. The upshot is, if your CPU caches support DIC ...
you can execute devices.
Revert the PAGE_S2_DEVICE change so PTE_S2_XN is always used
directly.
Fixes: 2f6ea23f63cca ("arm64: KVM: Avoid marking pages as XN in Stage-2 if CTR_EL0.DIC is set")
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'virt')
0 files changed, 0 insertions, 0 deletions