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author | Marc Zyngier <marc.zyngier@arm.com> | 2017-06-09 12:49:45 +0100 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-06-15 09:45:03 +0100 |
commit | abf55766f7b062234083ff612446ff8d47e2417e (patch) | |
tree | bd1496104c570f281baa206b613ca94be003550b /virt | |
parent | eab0b2dc4f6f34147e3d10da49ab8032e15dbea0 (diff) | |
download | linux-abf55766f7b062234083ff612446ff8d47e2417e.tar.gz linux-abf55766f7b062234083ff612446ff8d47e2417e.tar.bz2 linux-abf55766f7b062234083ff612446ff8d47e2417e.zip |
KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers
In order to be able to trap Group-0 GICv3 system registers, we need to
set ICH_HCR_EL2.TALL0 begore entering the guest. This is conditionnaly
done after having restored the guest's state, and cleared on exit.
Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'virt')
-rw-r--r-- | virt/kvm/arm/vgic/vgic-v3.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c index 4b2b62b73470..39046ee5be25 100644 --- a/virt/kvm/arm/vgic/vgic-v3.c +++ b/virt/kvm/arm/vgic/vgic-v3.c @@ -21,6 +21,7 @@ #include "vgic.h" +static bool group0_trap; static bool group1_trap; void vgic_v3_set_underflow(struct kvm_vcpu *vcpu) @@ -260,6 +261,8 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu) /* Get the show on the road... */ vgic_v3->vgic_hcr = ICH_HCR_EN; + if (group0_trap) + vgic_v3->vgic_hcr |= ICH_HCR_TALL0; if (group1_trap) vgic_v3->vgic_hcr |= ICH_HCR_TALL1; } @@ -492,7 +495,7 @@ int vgic_v3_probe(const struct gic_kvm_info *info) if (kvm_vgic_global_state.vcpu_base == 0) kvm_info("disabling GICv2 emulation\n"); - if (group1_trap) { + if (group0_trap || group1_trap) { kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n"); static_branch_enable(&vgic_v3_cpuif_trap); } |