diff options
| -rw-r--r-- | arch/x86_64/kernel/pmtimer.c | 2 | ||||
| -rw-r--r-- | drivers/clocksource/acpi_pm.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86_64/kernel/pmtimer.c b/arch/x86_64/kernel/pmtimer.c index bf421ed26808..7554458dc9cb 100644 --- a/arch/x86_64/kernel/pmtimer.c +++ b/arch/x86_64/kernel/pmtimer.c @@ -27,7 +27,7 @@ /* The I/O port the PMTMR resides at. * The location is detected during setup_arch(), * in arch/i386/kernel/acpi/boot.c */ -u32 pmtmr_ioport; +u32 pmtmr_ioport __read_mostly; /* value of the Power timer at last timer interrupt */ static u32 offset_delay; diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c index 9217be5048d5..066dc77433d5 100644 --- a/drivers/clocksource/acpi_pm.c +++ b/drivers/clocksource/acpi_pm.c @@ -30,7 +30,7 @@ * The location is detected during setup_arch(), * in arch/i386/acpi/boot.c */ -u32 pmtmr_ioport; +u32 pmtmr_ioport __read_mostly; #define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */ @@ -47,7 +47,7 @@ static cycle_t acpi_pm_read_verified(void) /* * It has been reported that because of various broken * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock - * source is not latched, so you must read it multiple + * source is not latched, you must read it multiple * times to ensure a safe value is read: */ do { |