diff options
768 files changed, 5603 insertions, 10034 deletions
diff --git a/Documentation/DocBook/device-drivers.tmpl b/Documentation/DocBook/device-drivers.tmpl index 2f7fd4360848..9c27e5125dd2 100644 --- a/Documentation/DocBook/device-drivers.tmpl +++ b/Documentation/DocBook/device-drivers.tmpl @@ -102,9 +102,12 @@ X!Iinclude/linux/kobject.h !Iinclude/linux/device.h </sect1> <sect1><title>Device Drivers Base</title> +!Idrivers/base/init.c !Edrivers/base/driver.c !Edrivers/base/core.c +!Edrivers/base/syscore.c !Edrivers/base/class.c +!Idrivers/base/node.c !Edrivers/base/firmware_class.c !Edrivers/base/transport_class.c <!-- Cannot be included, because @@ -113,7 +116,7 @@ X!Iinclude/linux/kobject.h exceed allowed 44 characters maximum X!Edrivers/base/attribute_container.c --> -!Edrivers/base/sys.c +!Edrivers/base/dd.c <!-- X!Edrivers/base/interface.c --> @@ -121,6 +124,11 @@ X!Edrivers/base/interface.c !Edrivers/base/platform.c !Edrivers/base/bus.c </sect1> + <sect1><title>Device Drivers DMA Management</title> +!Edrivers/base/dma-buf.c +!Edrivers/base/dma-coherent.c +!Edrivers/base/dma-mapping.c + </sect1> <sect1><title>Device Drivers Power Management</title> !Edrivers/base/power/main.c </sect1> @@ -219,7 +227,7 @@ X!Isound/sound_firmware.c <chapter id="uart16x50"> <title>16x50 UART Driver</title> !Edrivers/tty/serial/serial_core.c -!Edrivers/tty/serial/8250.c +!Edrivers/tty/serial/8250/8250.c </chapter> <chapter id="fbdev"> diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index a0ffac029a0d..1bea46a54b1c 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -510,17 +510,3 @@ Why: The pci_scan_bus_parented() interface creates a new root bus. The convert to using pci_scan_root_bus() so they can supply a list of bus resources when the bus is created. Who: Bjorn Helgaas <bhelgaas@google.com> - ----------------------------- - -What: The CAP9 SoC family will be removed -When: 3.4 -Files: arch/arm/mach-at91/at91cap9.c - arch/arm/mach-at91/at91cap9_devices.c - arch/arm/mach-at91/include/mach/at91cap9.h - arch/arm/mach-at91/include/mach/at91cap9_matrix.h - arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h - arch/arm/mach-at91/board-cap9adk.c -Why: The code is not actively maintained and platforms are now hard to find. -Who: Nicolas Ferre <nicolas.ferre@atmel.com> - Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> diff --git a/Documentation/input/event-codes.txt b/Documentation/input/event-codes.txt index 23fcb05175be..53305bd08182 100644 --- a/Documentation/input/event-codes.txt +++ b/Documentation/input/event-codes.txt @@ -17,11 +17,11 @@ reports supported by a device are also provided by sysfs in class/input/event*/device/capabilities/, and the properties of a device are provided in class/input/event*/device/properties. -Types: -========== -Types are groupings of codes under a logical input construct. Each type has a -set of applicable codes to be used in generating events. See the Codes section -for details on valid codes for each type. +Event types: +=========== +Event types are groupings of codes under a logical input construct. Each +type has a set of applicable codes to be used in generating events. See the +Codes section for details on valid codes for each type. * EV_SYN: - Used as markers to separate events. Events may be separated in time or in @@ -63,9 +63,9 @@ for details on valid codes for each type. * EV_FF_STATUS: - Used to receive force feedback device status. -Codes: -========== -Codes define the precise type of event. +Event codes: +=========== +Event codes define the precise type of event. EV_SYN: ---------- @@ -220,6 +220,56 @@ EV_PWR: EV_PWR events are a special type of event used specifically for power mangement. Its usage is not well defined. To be addressed later. +Device properties: +================= +Normally, userspace sets up an input device based on the data it emits, +i.e., the event types. In the case of two devices emitting the same event +types, additional information can be provided in the form of device +properties. + +INPUT_PROP_DIRECT + INPUT_PROP_POINTER: +-------------------------------------- +The INPUT_PROP_DIRECT property indicates that device coordinates should be +directly mapped to screen coordinates (not taking into account trivial +transformations, such as scaling, flipping and rotating). Non-direct input +devices require non-trivial transformation, such as absolute to relative +transformation for touchpads. Typical direct input devices: touchscreens, +drawing tablets; non-direct devices: touchpads, mice. + +The INPUT_PROP_POINTER property indicates that the device is not transposed +on the screen and thus requires use of an on-screen pointer to trace user's +movements. Typical pointer devices: touchpads, tablets, mice; non-pointer +device: touchscreen. + +If neither INPUT_PROP_DIRECT or INPUT_PROP_POINTER are set, the property is +considered undefined and the device type should be deduced in the +traditional way, using emitted event types. + +INPUT_PROP_BUTTONPAD: +-------------------- +For touchpads where the button is placed beneath the surface, such that +pressing down on the pad causes a button click, this property should be +set. Common in clickpad notebooks and macbooks from 2009 and onwards. + +Originally, the buttonpad property was coded into the bcm5974 driver +version field under the name integrated button. For backwards +compatibility, both methods need to be checked in userspace. + +INPUT_PROP_SEMI_MT: +------------------ +Some touchpads, most common between 2008 and 2011, can detect the presence +of multiple contacts without resolving the individual positions; only the +number of contacts and a rectangular shape is known. For such +touchpads, the semi-mt property should be set. + +Depending on the device, the rectangle may enclose all touches, like a +bounding box, or just some of them, for instance the two most recent +touches. The diversity makes the rectangle of limited use, but some +gestures can normally be extracted from it. + +If INPUT_PROP_SEMI_MT is not set, the device is assumed to be a true MT +device. + Guidelines: ========== The guidelines below ensure proper single-touch and multi-finger functionality. @@ -240,6 +290,8 @@ used to report when a touch is active on the screen. BTN_{MOUSE,LEFT,MIDDLE,RIGHT} must not be reported as the result of touch contact. BTN_TOOL_<name> events should be reported where possible. +For new hardware, INPUT_PROP_DIRECT should be set. + Trackpads: ---------- Legacy trackpads that only provide relative position information must report @@ -250,6 +302,8 @@ location of the touch. BTN_TOUCH should be used to report when a touch is active on the trackpad. Where multi-finger support is available, BTN_TOOL_<name> should be used to report the number of touches active on the trackpad. +For new hardware, INPUT_PROP_POINTER should be set. + Tablets: ---------- BTN_TOOL_<name> events must be reported when a stylus or other tool is active on @@ -260,3 +314,5 @@ button may be used for buttons on the tablet except BTN_{MOUSE,LEFT}. BTN_{0,1,2,etc} are good generic codes for unlabeled buttons. Do not use meaningful buttons, like BTN_FORWARD, unless the button is labeled for that purpose on the device. + +For new hardware, both INPUT_PROP_DIRECT and INPUT_PROP_POINTER should be set. diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt index 8c20fbd8b42d..6d78841fd416 100644 --- a/Documentation/sysctl/kernel.txt +++ b/Documentation/sysctl/kernel.txt @@ -601,6 +601,8 @@ can be ORed together: instead of using the one provided by the hardware. 512 - A kernel warning has occurred. 1024 - A module from drivers/staging was loaded. +2048 - The system is working around a severe firmware bug. +4096 - An out-of-tree module has been loaded. ============================================================== diff --git a/MAINTAINERS b/MAINTAINERS index a1fce9a3ab20..55ca0bea142c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -159,7 +159,7 @@ S: Maintained F: drivers/net/ethernet/realtek/r8169.c 8250/16?50 (AND CLONE UARTS) SERIAL DRIVER -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: linux-serial@vger.kernel.org W: http://serial.sourceforge.net S: Maintained @@ -789,12 +789,6 @@ F: arch/arm/mach-mx*/ F: arch/arm/mach-imx/ F: arch/arm/plat-mxc/ -ARM/FREESCALE IMX51 -M: Amit Kucheria <amit.kucheria@canonical.com> -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Maintained -F: arch/arm/mach-mx5/ - ARM/FREESCALE IMX6 M: Shawn Guo <shawn.guo@linaro.org> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) @@ -1783,9 +1777,9 @@ X: net/wireless/wext* CHAR and MISC DRIVERS M: Arnd Bergmann <arnd@arndb.de> -M: Greg Kroah-Hartman <greg@kroah.com> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git -S: Maintained +S: Supported F: drivers/char/* F: drivers/misc/* @@ -2287,7 +2281,7 @@ F: drivers/acpi/dock.c DOCUMENTATION M: Randy Dunlap <rdunlap@xenotime.net> L: linux-doc@vger.kernel.org -T: quilt http://userweb.kernel.org/~rdunlap/kernel-doc-patches/current/ +T: quilt http://xenotime.net/kernel-doc-patches/current/ S: Maintained F: Documentation/ @@ -2320,7 +2314,7 @@ F: lib/lru_cache.c F: Documentation/blockdev/drbd/ DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core-2.6.git S: Supported F: Documentation/kobject.txt @@ -3992,11 +3986,11 @@ M: Rusty Russell <rusty@rustcorp.com.au> L: lguest@lists.ozlabs.org W: http://lguest.ozlabs.org/ S: Odd Fixes -F: Documentation/virtual/lguest/ +F: arch/x86/include/asm/lguest*.h F: arch/x86/lguest/ F: drivers/lguest/ F: include/linux/lguest*.h -F: arch/x86/include/asm/lguest*.h +F: tools/lguest/ LINUX FOR IBM pSERIES (RS/6000) M: Paul Mackerras <paulus@au.ibm.com> @@ -4136,7 +4130,7 @@ L: linux-ntfs-dev@lists.sourceforge.net W: http://www.linux-ntfs.org/content/view/19/37/ S: Maintained F: Documentation/ldm.txt -F: fs/partitions/ldm.* +F: block/partitions/ldm.* LogFS M: Joern Engel <joern@logfs.org> @@ -5633,7 +5627,7 @@ W: http://www.ibm.com/developerworks/linux/linux390/ S: Supported F: arch/s390/ F: drivers/s390/ -F: fs/partitions/ibm.c +F: block/partitions/ibm.c F: Documentation/s390/ F: Documentation/DocBook/s390* @@ -6276,15 +6270,15 @@ S: Maintained F: arch/alpha/kernel/srm_env.c STABLE BRANCH -M: Greg Kroah-Hartman <greg@kroah.com> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: stable@vger.kernel.org -S: Maintained +S: Supported STAGING SUBSYSTEM -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git L: devel@driverdev.osuosl.org -S: Maintained +S: Supported F: drivers/staging/ STAGING - AGERE HERMES II and II.5 WIRELESS DRIVERS @@ -6396,11 +6390,6 @@ M: Omar Ramirez Luna <omar.ramirez@ti.com> S: Odd Fixes F: drivers/staging/tidspbridge/ -STAGING - TRIDENT TVMASTER TMxxxx USB VIDEO CAPTURE DRIVERS -L: linux-media@vger.kernel.org -S: Odd Fixes -F: drivers/staging/tm6000/ - STAGING - USB ENE SM/MS CARD READER DRIVER M: Al Cho <acho@novell.com> S: Odd Fixes @@ -6669,8 +6658,8 @@ S: Maintained K: ^Subject:.*(?i)trivial TTY LAYER -M: Greg Kroah-Hartman <gregkh@suse.de> -S: Maintained +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +S: Supported T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6.git F: drivers/tty/ F: drivers/tty/serial/serial_core.c @@ -6958,7 +6947,7 @@ S: Maintained F: drivers/usb/serial/digi_acceleport.c USB SERIAL DRIVER -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: linux-usb@vger.kernel.org S: Supported F: Documentation/usb/usb-serial.txt @@ -6973,9 +6962,8 @@ S: Maintained F: drivers/usb/serial/empeg.c USB SERIAL KEYSPAN DRIVER -M: Greg Kroah-Hartman <greg@kroah.com> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: linux-usb@vger.kernel.org -W: http://www.kroah.com/linux/ S: Maintained F: drivers/usb/serial/*keyspan* @@ -7003,7 +6991,7 @@ F: Documentation/video4linux/sn9c102.txt F: drivers/media/video/sn9c102/ USB SUBSYSTEM -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: linux-usb@vger.kernel.org W: http://www.linux-usb.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6.git @@ -7090,7 +7078,7 @@ F: fs/hppfs/ USERSPACE I/O (UIO) M: "Hans J. Koch" <hjk@hansjkoch.de> -M: Greg Kroah-Hartman <gregkh@suse.de> +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> S: Maintained F: Documentation/DocBook/uio-howto.tmpl F: drivers/uio/ @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 3 SUBLEVEL = 0 -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a48aecc17eac..d3999a5f1c71 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -180,12 +180,18 @@ config ZONE_DMA config NEED_DMA_MAP_STATE def_bool y +config ARCH_HAS_DMA_SET_COHERENT_MASK + bool + config GENERIC_ISA_DMA bool config FIQ bool +config NEED_RET_TO_USER + bool + config ARCH_MTD_XIP bool @@ -214,6 +220,13 @@ config ARM_PATCH_PHYS_VIRT this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. +config NEED_MACH_IO_H + bool + help + Select this when mach/io.h is required to provide special + definitions for this platform. The need for mach/io.h should + be avoided when possible. + config NEED_MACH_MEMORY_H bool help @@ -265,6 +278,7 @@ config ARCH_INTEGRATOR select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help Support for ARM's Integrator platform. @@ -324,7 +338,7 @@ config ARCH_AT91 select CLKDEV_LOOKUP help This enables support for systems based on the Atmel AT91RM9200, - AT91SAM9 and AT91CAP9 processors. + AT91SAM9 processors. config ARCH_BCMRING bool "Broadcom BCMRING" @@ -400,6 +414,7 @@ config ARCH_EBSA110 select ISA select NO_IOPORT select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help This is an evaluation board for the StrongARM processor available @@ -426,6 +441,7 @@ config ARCH_FOOTBRIDGE select FOOTBRIDGE select GENERIC_CLOCKEVENTS select HAVE_IDE + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help Support for systems based on the DC21285 companion chip @@ -478,7 +494,9 @@ config ARCH_IOP13XX select PCI select ARCH_SUPPORTS_MSI select VMSPLIT_1G + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H + select NEED_RET_TO_USER help Support for Intel's IOP13XX (XScale) family of processors. @@ -486,6 +504,8 @@ config ARCH_IOP32X bool "IOP32x-based" depends on MMU select CPU_XSCALE + select NEED_MACH_IO_H + select NEED_RET_TO_USER select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB @@ -497,6 +517,8 @@ config ARCH_IOP33X bool "IOP33x-based" depends on MMU select CPU_XSCALE + select NEED_MACH_IO_H + select NEED_RET_TO_USER select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB @@ -509,6 +531,7 @@ config ARCH_IXP23XX select CPU_XSC3 select PCI select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help Support for Intel's IXP23xx (XScale) family of processors. @@ -519,6 +542,7 @@ config ARCH_IXP2000 select CPU_XSCALE select PCI select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help Support for Intel's IXP2400/2800 (XScale) family of processors. @@ -526,12 +550,14 @@ config ARCH_IXP2000 config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU + select ARCH_HAS_DMA_SET_COHERENT_MASK select CLKSRC_MMIO select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI + select NEED_MACH_IO_H select DMABOUNCE if PCI help Support for Intel's IXP4XX (XScale) family of processors. @@ -542,6 +568,7 @@ config ARCH_DOVE select PCI select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS + select NEED_MACH_IO_H select PLAT_ORION help Support for the Marvell Dove SoC 88AP510 @@ -552,6 +579,7 @@ config ARCH_KIRKWOOD select PCI select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS + select NEED_MACH_IO_H select PLAT_ORION help Support for the following Marvell Kirkwood series SoCs: @@ -576,6 +604,7 @@ config ARCH_MV78XX0 select PCI select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS + select NEED_MACH_IO_H select PLAT_ORION help Support for the following Marvell MV78xx0 series SoCs: @@ -645,6 +674,7 @@ config ARCH_TEGRA select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 + select NEED_MACH_IO_H if PCI select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, @@ -739,6 +769,7 @@ config ARCH_RPC select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET select HAVE_IDE + select NEED_MACH_IO_H select NEED_MACH_MEMORY_H help On the Acorn Risc-PC, Linux can support the internal IDE disk and @@ -771,6 +802,7 @@ config ARCH_S3C2410 select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET select HAVE_S3C2410_I2C if I2C + select NEED_MACH_IO_H help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or @@ -877,6 +909,7 @@ config ARCH_SHARK select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H + select NEED_MACH_IO_H help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (<http://www.shark-linux.de/shark.html>). diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index e0d236d7ff73..b895a2a92da8 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -81,47 +81,14 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL - config DEBUG_LL_UART_NONE - bool "No low-level debugging UART" - help - Say Y here if your platform doesn't provide a UART option - below. This relies on your platform choosing the right UART - definition internally in order for low-level debugging to - work. - - config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" - help - Say Y here if you want the debug print routines to direct - their output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - Note that the system will appear to hang during boot if there - is nothing connected to read from the DCC. - config AT91_DEBUG_LL_DBGU0 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" depends on HAVE_AT91_DBGU0 config AT91_DEBUG_LL_DBGU1 - bool "Kernel low-level debugging on 9263, 9g45 and cap9" + bool "Kernel low-level debugging on 9263 and 9g45" depends on HAVE_AT91_DBGU1 - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the 8250 at PCI COM1. - - config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -136,6 +103,20 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. + config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the serial port in the DC21285 (Footbridge). + + config DEBUG_FOOTBRIDGE_COM1 + bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the 8250 at PCI COM1. + config DEBUG_HIGHBANK_UART bool "Kernel low-level debugging messages via Highbank UART" depends on ARCH_HIGHBANK @@ -206,38 +187,42 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q. - config DEBUG_S3C_UART0 - depends on PLAT_SAMSUNG - bool "Use S3C UART 0 for low-level debug" + config DEBUG_MSM_UART1 + bool "Kernel low-level debugging messages via MSM UART1" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 0. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the first serial port on MSM devices. - config DEBUG_S3C_UART1 - depends on PLAT_SAMSUNG - bool "Use S3C UART 1 for low-level debug" + config DEBUG_MSM_UART2 + bool "Kernel low-level debugging messages via MSM UART2" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 1. The port must have been initialised - by the boot-loader before use. + their output to the second serial port on MSM devices. - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + config DEBUG_MSM_UART3 + bool "Kernel low-level debugging messages via MSM UART3" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the third serial port on MSM devices. - config DEBUG_S3C_UART2 - depends on PLAT_SAMSUNG - bool "Use S3C UART 2 for low-level debug" + config DEBUG_MSM8660_UART + bool "Kernel low-level debugging messages via MSM 8660 UART" + depends on ARCH_MSM8X60 + select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct - their output to UART 2. The port must have been initialised - by the boot-loader before use. + their output to the serial port on MSM 8660 devices. - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + config DEBUG_MSM8960_UART + bool "Kernel low-level debugging messages via MSM 8960 UART" + depends on ARCH_MSM8960 + select MSM_HAS_DEBUG_UART_HS + help + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8960 devices. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" @@ -255,42 +240,57 @@ choice their output to the standard serial port on the RealView PB1176 platform. - config DEBUG_MSM_UART1 - bool "Kernel low-level debugging messages via MSM UART1" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + config DEBUG_S3C_UART0 + depends on PLAT_SAMSUNG + bool "Use S3C UART 0 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the first serial port on MSM devices. + their output to UART 0. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM_UART2 - bool "Kernel low-level debugging messages via MSM UART2" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. + + config DEBUG_S3C_UART1 + depends on PLAT_SAMSUNG + bool "Use S3C UART 1 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the second serial port on MSM devices. + their output to UART 1. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM_UART3 - bool "Kernel low-level debugging messages via MSM UART3" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. + + config DEBUG_S3C_UART2 + depends on PLAT_SAMSUNG + bool "Use S3C UART 2 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the third serial port on MSM devices. + their output to UART 2. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM8660_UART - bool "Kernel low-level debugging messages via MSM 8660 UART" - depends on ARCH_MSM8X60 - select MSM_HAS_DEBUG_UART_HS + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. + + config DEBUG_LL_UART_NONE + bool "No low-level debugging UART" help - Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8660 devices. + Say Y here if your platform doesn't provide a UART option + below. This relies on your platform choosing the right UART + definition internally in order for low-level debugging to + work. - config DEBUG_MSM8960_UART - bool "Kernel low-level debugging messages via MSM 8960 UART" - depends on ARCH_MSM8960 - select MSM_HAS_DEBUG_UART_HS + config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" help Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8960 devices. + their output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + Note that the system will appear to hang during boot if there + is nothing connected to read from the DCC. endchoice diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts new file mode 100644 index 000000000000..e64eb932083b --- /dev/null +++ b/arch/arm/boot/dts/at91sam9g25ek.dts @@ -0,0 +1,37 @@ +/* + * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board + * + * Copyright (C) 2012 Atmel, + * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "at91sam9x5.dtsi" +/include/ "at91sam9x5cm.dtsi" + +/ { + model = "Atmel AT91SAM9G25-EK"; + compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; + + chosen { + bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; + }; + + ahb { + apb { + dbgu: serial@fffff200 { + status = "okay"; + }; + + usart0: serial@f801c000 { + status = "okay"; + }; + + macb0: ethernet@f802c000 { + phy-mode = "rmii"; + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi new file mode 100644 index 000000000000..e91391f50730 --- /dev/null +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -0,0 +1,172 @@ +/* + * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC + * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, + * AT91SAM9X25, AT91SAM9X35 SoC + * + * Copyright (C) 2012 Atmel, + * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + model = "Atmel AT91SAM9x5 family SoC"; + compatible = "atmel,at91sam9x5"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + gpio0 = &pioA; + gpio1 = &pioB; + gpio2 = &pioC; + gpio3 = &pioD; + tcb0 = &tcb0; + tcb1 = &tcb1; + }; + cpus { + cpu@0 { + compatible = "arm,arm926ejs"; + }; + }; + + memory@20000000 { + reg = <0x20000000 0x10000000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + aic: interrupt-controller@fffff000 { + #interrupt-cells = <2>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + interrupt-parent; + reg = <0xfffff000 0x200>; + }; + + pit: timer@fffffe30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe30 0xf>; + interrupts = <1 4>; + }; + + tcb0: timer@f8008000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8008000 0x100>; + interrupts = <17 4>; + }; + + tcb1: timer@f800c000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf800c000 0x100>; + interrupts = <17 4>; + }; + + dma0: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; + interrupts = <20 4>; + }; + + dma1: dma-controller@ffffee00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffee00 0x200>; + interrupts = <21 4>; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; + interrupts = <2 4>; + #gpio-cells = <2>; + gpio-controller; + }; + + pioB: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; + interrupts = <2 4>; + #gpio-cells = <2>; + gpio-controller; + }; + + pioC: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; + interrupts = <3 4>; + #gpio-cells = <2>; + gpio-controller; + }; + + pioD: gpio@fffffa00 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; + interrupts = <3 4>; + #gpio-cells = <2>; + gpio-controller; + }; + + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; + interrupts = <1 4>; + status = "disabled"; + }; + + usart0: serial@f801c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf801c000 0x200>; + interrupts = <5 4>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; + }; + + usart1: serial@f8020000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8020000 0x200>; + interrupts = <6 4>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; + }; + + usart2: serial@f8024000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8024000 0x200>; + interrupts = <7 4>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "disabled"; + }; + + macb0: ethernet@f802c000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + interrupts = <24 4>; + status = "disabled"; + }; + + macb1: ethernet@f8030000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf8030000 0x100>; + interrupts = <27 4>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi new file mode 100644 index 000000000000..4ab5a77f4afc --- /dev/null +++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi @@ -0,0 +1,14 @@ +/* + * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module + * + * Copyright (C) 2012 Atmel, + * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> + * + * Licensed under GPLv2 or later. + */ + +/ { + memory@20000000 { + reg = <0x20000000 0x8000000>; + }; +}; diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 1a1d7023b69b..825d2957da0b 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -46,11 +46,11 @@ }; serial@70006200 { - status = "disable"; + clock-frequency = <216000000>; }; serial@70006300 { - clock-frequency = <216000000>; + status = "disable"; }; serial@70006400 { @@ -60,7 +60,7 @@ sdhci@c8000000 { cd-gpios = <&gpio 173 0>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ }; sdhci@c8000200 { diff --git a/arch/arm/configs/at91cap9_defconfig b/arch/arm/configs/at91cap9_defconfig deleted file mode 100644 index 8826eb218e73..000000000000 --- a/arch/arm/configs/at91cap9_defconfig +++ /dev/null @@ -1,108 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91CAP9=y -CONFIG_MACH_AT91CAP9ADK=y -CONFIG_MTD_AT91_DATAFLASH_CARD=y -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -# CONFIG_ARM_THUMB is not set -CONFIG_AEABI=y -CONFIG_LEDS=y -CONFIG_LEDS_CPU=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw" -CONFIG_FPE_NWFPE=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_MACB=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -# CONFIG_SERIO is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_SPI=y -CONFIG_SPI_ATMEL=y -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_FB=y -CONFIG_FB_ATMEL=y -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_CLUT224 is not set -# CONFIG_USB_HID is not set -CONFIG_USB=y -CONFIG_USB_DEVICEFS=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_ETH=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_MMC=y -CONFIG_MMC_AT91=m -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_AT91SAM9=y -CONFIG_EXT2_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_USER=y diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 62f8095d46de..88374dd30fb9 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -23,6 +23,8 @@ #include <asm/ptrace.h> #include <asm/domain.h> +#define IOMEM(x) (x) + /* * Endian independent macros for shifting bytes within registers. */ diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S index e0af4983723f..8c215acd9b57 100644 --- a/arch/arm/include/asm/hardware/entry-macro-iomd.S +++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S @@ -11,14 +11,6 @@ /* IOC / IOMD based hardware */ #include <asm/hardware/iomd.h> - .macro disable_fiq - mov r12, #ioc_base_high - .if ioc_base_low - orr r12, r12, #ioc_base_low - .endif - strb r12, [r12, #0x38] @ Disable FIQ register - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first ldr \tmp, =irq_prio_h diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 9275828feb3d..35d91406af65 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -83,6 +83,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); extern void __iounmap(volatile void __iomem *addr); +extern void __arm_iounmap(volatile void __iomem *addr); + +extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, + unsigned int, void *); +extern void (*arch_iounmap)(volatile void __iomem *); /* * Bad read/write accesses... @@ -97,6 +102,8 @@ static inline void __iomem *__typesafe_io(unsigned long addr) return (void __iomem *)addr; } +#define IOMEM(x) ((void __force __iomem *)(x)) + /* IO barriers */ #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE #define __iormb() rmb() @@ -109,7 +116,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr) /* * Now, pick up the machine-defined IO definitions */ +#ifdef CONFIG_NEED_MACH_IO_H #include <mach/io.h> +#else +#define __io(a) ({ (void)(a); __typesafe_io(0); }) +#endif /* * This is the limit of PC card/PCI/ISA IO space, which is by default @@ -211,18 +222,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * Again, this are defined to perform little endian accesses. See the * IO port primitives for more information. */ -#ifdef __mem_pci -#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) +#ifndef readl +#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; }) #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ - __raw_readw(__mem_pci(c))); __r; }) + __raw_readw(c)); __r; }) #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ - __raw_readl(__mem_pci(c))); __r; }) + __raw_readl(c)); __r; }) -#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) +#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c)) #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ - cpu_to_le16(v),__mem_pci(c))) + cpu_to_le16(v),c)) #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ - cpu_to_le32(v),__mem_pci(c))) + cpu_to_le32(v),c)) #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) @@ -232,30 +243,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) -#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) -#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) -#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) - -#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) -#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) -#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) +#define readsb(p,d,l) __raw_readsb(p,d,l) +#define readsw(p,d,l) __raw_readsw(p,d,l) +#define readsl(p,d,l) __raw_readsl(p,d,l) -#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) -#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) -#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) +#define writesb(p,d,l) __raw_writesb(p,d,l) +#define writesw(p,d,l) __raw_writesw(p,d,l) +#define writesl(p,d,l) __raw_writesl(p,d,l) -#elif !defined(readb) +#define memset_io(c,v,l) _memset_io(c,(v),(l)) +#define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l)) +#define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l)) -#define readb(c) (__readwrite_bug("readb"),0) -#define readw(c) (__readwrite_bug("readw"),0) -#define readl(c) (__readwrite_bug("readl"),0) -#define writeb(v,c) __readwrite_bug("writeb") -#define writew(v,c) __readwrite_bug("writew") -#define writel(v,c) __readwrite_bug("writel") - -#define check_signature(io,sig,len) (0) - -#endif /* __mem_pci */ +#endif /* readl */ /* * ioremap and friends. @@ -264,16 +264,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * Documentation/io-mapping.txt. * */ -#ifndef __arch_ioremap -#define __arch_ioremap __arm_ioremap -#define __arch_iounmap __iounmap -#endif - -#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) -#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) -#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) -#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC) -#define iounmap __arch_iounmap +#define ioremap(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE) +#define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE) +#define ioremap_cached(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED) +#define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC) +#define iounmap __arm_iounmap /* * io{read,write}{8,16,32} macros diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index e4c96cc6ec0c..424aa458c487 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -110,6 +110,7 @@ extern void cpu_init(void); void soft_restart(unsigned long); extern void (*arm_pm_restart)(char str, const char *cmd); +extern void (*arm_pm_idle)(void); #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index 5d3ed7e38561..314d4664eae7 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h @@ -198,7 +198,15 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr) { pgtable_page_dtor(pte); - tlb_add_flush(tlb, addr); + + /* + * With the classic ARM MMU, a pte page has two corresponding pmd + * entries, each covering 1MB. + */ + addr &= PMD_MASK; + tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); + tlb_add_flush(tlb, addr + SZ_1M); + tlb_remove_page(tlb, pte); } diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 204e2160cfcc..501cdbfc902c 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -10,6 +10,7 @@ * 32-bit debugging code */ #include <linux/linkage.h> +#include <asm/assembler.h> .text diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 3a456c6c7005..395f6271dfc2 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -15,11 +15,14 @@ * that causes it to save wrong values... Be aware! */ +#include <asm/assembler.h> #include <asm/memory.h> #include <asm/glue-df.h> #include <asm/glue-pf.h> #include <asm/vfpmacros.h> +#ifndef CONFIG_MULTI_IRQ_HANDLER #include <mach/entry-macro.S> +#endif #include <asm/thread_notify.h> #include <asm/unwind.h> #include <asm/unistd.h> @@ -790,7 +793,7 @@ __kuser_cmpxchg64: @ 0xffff0f60 smp_dmb arm rsbs r0, r3, #0 @ set returned val and C flag ldmfd sp!, {r4, r5, r6, r7} - bx lr + usr_ret lr #elif !defined(CONFIG_SMP) @@ -1101,7 +1104,6 @@ __stubs_start: * get out of that mode without clobbering one register. */ vector_fiq: - disable_fiq subs pc, lr, #4 /*============================================================================= diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 9fd0ba90c1d2..54ee265dd819 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -10,9 +10,15 @@ #include <asm/unistd.h> #include <asm/ftrace.h> -#include <mach/entry-macro.S> #include <asm/unwind.h> +#ifdef CONFIG_NEED_RET_TO_USER +#include <mach/entry-macro.S> +#else + .macro arch_ret_to_user, tmp1, tmp2 + .endm +#endif + #include "entry-header.S" diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 460bbbb6b885..6933244c68f9 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -469,6 +469,20 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, }, }, + [C(NODE)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + }, }; /* @@ -579,6 +593,20 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, }, }, + [C(NODE)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, + }, + }, }; /* diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 971d65c253a9..008e7ce766a7 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void); static volatile int hlt_counter; -#include <mach/system.h> - void disable_hlt(void) { hlt_counter++; @@ -181,13 +179,17 @@ void cpu_idle_wait(void) EXPORT_SYMBOL_GPL(cpu_idle_wait); /* - * This is our default idle handler. We need to disable - * interrupts here to ensure we don't miss a wakeup call. + * This is our default idle handler. */ + +void (*arm_pm_idle)(void); + static void default_idle(void) { - if (!need_resched()) - arch_idle(); + if (arm_pm_idle) + arm_pm_idle(); + else + cpu_do_idle(); local_irq_enable(); } @@ -215,6 +217,10 @@ void cpu_idle(void) cpu_die(); #endif + /* + * We need to disable interrupts here + * to ensure we don't miss a wakeup call. + */ local_irq_disable(); #ifdef CONFIG_PL310_ERRATA_769419 wmb(); @@ -222,19 +228,18 @@ void cpu_idle(void) if (hlt_counter) { local_irq_enable(); cpu_relax(); - } else { + } else if (!need_resched()) { stop_critical_timings(); if (cpuidle_idle_call()) pm_idle(); start_critical_timings(); /* - * This will eventually be removed - pm_idle - * functions should always return with IRQs - * enabled. + * pm_idle functions must always + * return with IRQs enabled. */ WARN_ON(irqs_disabled()); + } else local_irq_enable(); - } } leds_event(led_idle_end); rcu_idle_exit(); diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index e1d5e1929fbd..e33870ff0ac0 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -699,10 +699,13 @@ static int vfp_set(struct task_struct *target, { int ret; struct thread_info *thread = task_thread_info(target); - struct vfp_hard_struct new_vfp = thread->vfpstate.hard; + struct vfp_hard_struct new_vfp; const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs); const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr); + vfp_sync_hwstate(thread); + new_vfp = thread->vfpstate.hard; + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &new_vfp.fpregs, user_fpregs_offset, @@ -723,9 +726,8 @@ static int vfp_set(struct task_struct *target, if (ret) return ret; - vfp_sync_hwstate(thread); - thread->vfpstate.hard = new_vfp; vfp_flush_hwstate(thread); + thread->vfpstate.hard = new_vfp; return 0; } diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 0340224cf73c..9e617bd4a146 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -227,6 +227,8 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame) if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) return -EINVAL; + vfp_flush_hwstate(thread); + /* * Copy the floating point registers. There can be unused * registers see asm/hwcap.h for details. @@ -251,9 +253,6 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame) __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err); __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err); - if (!err) - vfp_flush_hwstate(thread); - return err ? -EFAULT : 0; } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 71feb00a1e99..e55cdcbd81fb 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -102,13 +102,13 @@ config ARCH_AT91SAM9G45 select HAVE_AT91_DBGU1 select AT91_SAM9G45_RESET -config ARCH_AT91CAP9 - bool "AT91CAP9" +config ARCH_AT91SAM9X5 + bool "AT91SAM9x5 family" select CPU_ARM926T select GENERIC_CLOCKEVENTS select HAVE_FB_ATMEL select HAVE_NET_MACB - select HAVE_AT91_DBGU1 + select HAVE_AT91_DBGU0 select AT91_SAM9G45_RESET config ARCH_AT91X40 @@ -447,21 +447,6 @@ endif # ---------------------------------------------------------- -if ARCH_AT91CAP9 - -comment "AT91CAP9 Board Type" - -config MACH_AT91CAP9ADK - bool "Atmel AT91CAP9A-DK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> - -endif - -# ---------------------------------------------------------- - if ARCH_AT91X40 comment "AT91X40 Board Type" @@ -544,7 +529,7 @@ config AT91_EARLY_DBGU0 depends on HAVE_AT91_DBGU0 config AT91_EARLY_DBGU1 - bool "DBGU on 9263, 9g45 and cap9" + bool "DBGU on 9263 and 9g45" depends on HAVE_AT91_DBGU1 config AT91_EARLY_USART0 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 705e1fbded39..1b6518518d99 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -20,7 +20,7 @@ obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_d obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam926x_time.o obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o # AT91RM9200 board-specific support @@ -81,9 +81,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o # AT91SAM board with device-tree obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o -# AT91CAP9 board-specific support -obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o - # AT91X40 board-specific support obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index 8ddafadfdc7d..0da66ca4a4f8 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot @@ -3,11 +3,7 @@ # PARAMS_PHYS must be within 4MB of ZRELADDR # INITRD_PHYS must be in RAM -ifeq ($(CONFIG_ARCH_AT91CAP9),y) - zreladdr-y += 0x70008000 -params_phys-y := 0x70000100 -initrd_phys-y := 0x70410000 -else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y) +ifeq ($(CONFIG_ARCH_AT91SAM9G45),y) zreladdr-y += 0x70008000 params_phys-y := 0x70000100 initrd_phys-y := 0x70410000 @@ -17,4 +13,10 @@ params_phys-y := 0x20000100 initrd_phys-y := 0x20410000 endif -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb +# Keep dtb files sorted alphabetically for each SoC +# sam9g20 +dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb +# sam9g45 +dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb +# sam9x5 +dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c deleted file mode 100644 index a42edc25a87e..000000000000 --- a/arch/arm/mach-at91/at91cap9.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * arch/arm/mach-at91/at91cap9.c - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2007 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <linux/module.h> - -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <mach/cpu.h> -#include <mach/at91cap9.h> -#include <mach/at91_pmc.h> - -#include "soc.h" -#include "generic.h" -#include "clock.h" -#include "sam9_smc.h" - -/* -------------------------------------------------------------------- - * Clocks - * -------------------------------------------------------------------- */ - -/* - * The peripheral clocks. - */ -static struct clk pioABCD_clk = { - .name = "pioABCD_clk", - .pmc_mask = 1 << AT91CAP9_ID_PIOABCD, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mpb0_clk = { - .name = "mpb0_clk", - .pmc_mask = 1 << AT91CAP9_ID_MPB0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mpb1_clk = { - .name = "mpb1_clk", - .pmc_mask = 1 << AT91CAP9_ID_MPB1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mpb2_clk = { - .name = "mpb2_clk", - .pmc_mask = 1 << AT91CAP9_ID_MPB2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mpb3_clk = { - .name = "mpb3_clk", - .pmc_mask = 1 << AT91CAP9_ID_MPB3, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mpb4_clk = { - .name = "mpb4_clk", - .pmc_mask = 1 << AT91CAP9_ID_MPB4, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart0_clk = { - .name = "usart0_clk", - .pmc_mask = 1 << AT91CAP9_ID_US0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart1_clk = { - .name = "usart1_clk", - .pmc_mask = 1 << AT91CAP9_ID_US1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart2_clk = { - .name = "usart2_clk", - .pmc_mask = 1 << AT91CAP9_ID_US2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mmc0_clk = { - .name = "mci0_clk", - .pmc_mask = 1 << AT91CAP9_ID_MCI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mmc1_clk = { - .name = "mci1_clk", - .pmc_mask = 1 << AT91CAP9_ID_MCI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk can_clk = { - .name = "can_clk", - .pmc_mask = 1 << AT91CAP9_ID_CAN, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk twi_clk = { - .name = "twi_clk", - .pmc_mask = 1 << AT91CAP9_ID_TWI, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi0_clk = { - .name = "spi0_clk", - .pmc_mask = 1 << AT91CAP9_ID_SPI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi1_clk = { - .name = "spi1_clk", - .pmc_mask = 1 << AT91CAP9_ID_SPI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc0_clk = { - .name = "ssc0_clk", - .pmc_mask = 1 << AT91CAP9_ID_SSC0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ssc1_clk = { - .name = "ssc1_clk", - .pmc_mask = 1 << AT91CAP9_ID_SSC1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ac97_clk = { - .name = "ac97_clk", - .pmc_mask = 1 << AT91CAP9_ID_AC97C, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tcb_clk = { - .name = "tcb_clk", - .pmc_mask = 1 << AT91CAP9_ID_TCB, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pwm_clk = { - .name = "pwm_clk", - .pmc_mask = 1 << AT91CAP9_ID_PWMC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk macb_clk = { - .name = "pclk", - .pmc_mask = 1 << AT91CAP9_ID_EMAC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk aestdes_clk = { - .name = "aestdes_clk", - .pmc_mask = 1 << AT91CAP9_ID_AESTDES, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk adc_clk = { - .name = "adc_clk", - .pmc_mask = 1 << AT91CAP9_ID_ADC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk isi_clk = { - .name = "isi_clk", - .pmc_mask = 1 << AT91CAP9_ID_ISI, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk lcdc_clk = { - .name = "lcdc_clk", - .pmc_mask = 1 << AT91CAP9_ID_LCDC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk dma_clk = { - .name = "dma_clk", - .pmc_mask = 1 << AT91CAP9_ID_DMA, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk udphs_clk = { - .name = "udphs_clk", - .pmc_mask = 1 << AT91CAP9_ID_UDPHS, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk ohci_clk = { - .name = "ohci_clk", - .pmc_mask = 1 << AT91CAP9_ID_UHP, - .type = CLK_TYPE_PERIPHERAL, -}; - -static struct clk *periph_clocks[] __initdata = { - &pioABCD_clk, - &mpb0_clk, - &mpb1_clk, - &mpb2_clk, - &mpb3_clk, - &mpb4_clk, - &usart0_clk, - &usart1_clk, - &usart2_clk, - &mmc0_clk, - &mmc1_clk, - &can_clk, - &twi_clk, - &spi0_clk, - &spi1_clk, - &ssc0_clk, - &ssc1_clk, - &ac97_clk, - &tcb_clk, - &pwm_clk, - &macb_clk, - &aestdes_clk, - &adc_clk, - &isi_clk, - &lcdc_clk, - &dma_clk, - &udphs_clk, - &ohci_clk, - // irq0 .. irq1 -}; - -static struct clk_lookup periph_clocks_lookups[] = { - /* One additional fake clock for macb_hclk */ - CLKDEV_CON_ID("hclk", &macb_clk), - CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), - CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), - CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), - CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), - CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), - CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), - CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), - CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), - CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), - /* fake hclk clock */ - CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), - CLKDEV_CON_ID("pioA", &pioABCD_clk), - CLKDEV_CON_ID("pioB", &pioABCD_clk), - CLKDEV_CON_ID("pioC", &pioABCD_clk), - CLKDEV_CON_ID("pioD", &pioABCD_clk), -}; - -static struct clk_lookup usart_clocks_lookups[] = { - CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), - CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), - CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), - CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), -}; - -/* - * The four programmable clocks. - * You must configure pin multiplexing to bring these signals out. - */ -static struct clk pck0 = { - .name = "pck0", - .pmc_mask = AT91_PMC_PCK0, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 0, -}; -static struct clk pck1 = { - .name = "pck1", - .pmc_mask = AT91_PMC_PCK1, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 1, -}; -static struct clk pck2 = { - .name = "pck2", - .pmc_mask = AT91_PMC_PCK2, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 2, -}; -static struct clk pck3 = { - .name = "pck3", - .pmc_mask = AT91_PMC_PCK3, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 3, -}; - -static void __init at91cap9_register_clocks(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) - clk_register(periph_clocks[i]); - - clkdev_add_table(periph_clocks_lookups, - ARRAY_SIZE(periph_clocks_lookups)); - clkdev_add_table(usart_clocks_lookups, - ARRAY_SIZE(usart_clocks_lookups)); - - clk_register(&pck0); - clk_register(&pck1); - clk_register(&pck2); - clk_register(&pck3); -} - -static struct clk_lookup console_clock_lookup; - -void __init at91cap9_set_console_clock(int id) -{ - if (id >= ARRAY_SIZE(usart_clocks_lookups)) - return; - - console_clock_lookup.con_id = "usart"; - console_clock_lookup.clk = usart_clocks_lookups[id].clk; - clkdev_add(&console_clock_lookup); -} - -/* -------------------------------------------------------------------- - * GPIO - * -------------------------------------------------------------------- */ - -static struct at91_gpio_bank at91cap9_gpio[] __initdata = { - { - .id = AT91CAP9_ID_PIOABCD, - .regbase = AT91CAP9_BASE_PIOA, - }, { - .id = AT91CAP9_ID_PIOABCD, - .regbase = AT91CAP9_BASE_PIOB, - }, { - .id = AT91CAP9_ID_PIOABCD, - .regbase = AT91CAP9_BASE_PIOC, - }, { - .id = AT91CAP9_ID_PIOABCD, - .regbase = AT91CAP9_BASE_PIOD, - } -}; - -/* -------------------------------------------------------------------- - * AT91CAP9 processor initialization - * -------------------------------------------------------------------- */ - -static void __init at91cap9_map_io(void) -{ - at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); -} - -static void __init at91cap9_ioremap_registers(void) -{ - at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); - at91_ioremap_rstc(AT91CAP9_BASE_RSTC); - at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); - at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); -} - -static void __init at91cap9_initialize(void) -{ - arm_pm_restart = at91sam9g45_restart; - at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); - - /* Register GPIO subsystem */ - at91_gpio_init(at91cap9_gpio, 4); - - /* Remember the silicon revision */ - if (cpu_is_at91cap9_revB()) - system_rev = 0xB; - else if (cpu_is_at91cap9_revC()) - system_rev = 0xC; -} - -/* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ - -/* - * The default interrupt priority levels (0 = lowest, 7 = highest). - */ -static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { - 7, /* Advanced Interrupt Controller (FIQ) */ - 7, /* System Peripherals */ - 1, /* Parallel IO Controller A, B, C and D */ - 0, /* MP Block Peripheral 0 */ - 0, /* MP Block Peripheral 1 */ - 0, /* MP Block Peripheral 2 */ - 0, /* MP Block Peripheral 3 */ - 0, /* MP Block Peripheral 4 */ - 5, /* USART 0 */ - 5, /* USART 1 */ - 5, /* USART 2 */ - 0, /* Multimedia Card Interface 0 */ - 0, /* Multimedia Card Interface 1 */ - 3, /* CAN */ - 6, /* Two-Wire Interface */ - 5, /* Serial Peripheral Interface 0 */ - 5, /* Serial Peripheral Interface 1 */ - 4, /* Serial Synchronous Controller 0 */ - 4, /* Serial Synchronous Controller 1 */ - 5, /* AC97 Controller */ - 0, /* Timer Counter 0, 1 and 2 */ - 0, /* Pulse Width Modulation Controller */ - 3, /* Ethernet */ - 0, /* Advanced Encryption Standard, Triple DES*/ - 0, /* Analog-to-Digital Converter */ - 0, /* Image Sensor Interface */ - 3, /* LCD Controller */ - 0, /* DMA Controller */ - 2, /* USB Device Port */ - 2, /* USB Host port */ - 0, /* Advanced Interrupt Controller (IRQ0) */ - 0, /* Advanced Interrupt Controller (IRQ1) */ -}; - -struct at91_init_soc __initdata at91cap9_soc = { - .map_io = at91cap9_map_io, - .default_irq_priority = at91cap9_default_irq_priority, - .ioremap_registers = at91cap9_ioremap_registers, - .register_clocks = at91cap9_register_clocks, - .init = at91cap9_initialize, -}; diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c deleted file mode 100644 index d298fb7cb210..000000000000 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ /dev/null @@ -1,1273 +0,0 @@ -/* - * arch/arm/mach-at91/at91cap9_devices.c - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2007 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <linux/dma-mapping.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/i2c-gpio.h> - -#include <video/atmel_lcdc.h> - -#include <mach/board.h> -#include <mach/cpu.h> -#include <mach/at91cap9.h> -#include <mach/at91cap9_matrix.h> -#include <mach/at91sam9_smc.h> - -#include "generic.h" - - -/* -------------------------------------------------------------------- - * USB Host - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = DMA_BIT_MASK(32); -static struct at91_usbh_data usbh_data; - -static struct resource usbh_resources[] = { - [0] = { - .start = AT91CAP9_UHP_BASE, - .end = AT91CAP9_UHP_BASE + SZ_1M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_UHP, - .end = AT91CAP9_ID_UHP, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91_usbh_device = { - .name = "at91_ohci", - .id = -1, - .dev = { - .dma_mask = &ohci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &usbh_data, - }, - .resource = usbh_resources, - .num_resources = ARRAY_SIZE(usbh_resources), -}; - -void __init at91_add_device_usbh(struct at91_usbh_data *data) -{ - int i; - - if (!data) - return; - - if (cpu_is_at91cap9_revB()) - irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); - - /* Enable VBus control for UHP ports */ - for (i = 0; i < data->ports; i++) { - if (gpio_is_valid(data->vbus_pin[i])) - at91_set_gpio_output(data->vbus_pin[i], 0); - } - - /* Enable overcurrent notification */ - for (i = 0; i < data->ports; i++) { - if (data->overcurrent_pin[i]) - at91_set_gpio_input(data->overcurrent_pin[i], 1); - } - - usbh_data = *data; - platform_device_register(&at91_usbh_device); -} -#else -void __init at91_add_device_usbh(struct at91_usbh_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * USB HS Device (Gadget) - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE) - -static struct resource usba_udc_resources[] = { - [0] = { - .start = AT91CAP9_UDPHS_FIFO, - .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_BASE_UDPHS, - .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = AT91CAP9_ID_UDPHS, - .end = AT91CAP9_ID_UDPHS, - .flags = IORESOURCE_IRQ, - }, -}; - -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ - [idx] = { \ - .name = nam, \ - .index = idx, \ - .fifo_size = maxpkt, \ - .nr_banks = maxbk, \ - .can_dma = dma, \ - .can_isoc = isoc, \ - } - -static struct usba_ep_data usba_udc_ep[] = { - EP("ep0", 0, 64, 1, 0, 0), - EP("ep1", 1, 1024, 3, 1, 1), - EP("ep2", 2, 1024, 3, 1, 1), - EP("ep3", 3, 1024, 2, 1, 1), - EP("ep4", 4, 1024, 2, 1, 1), - EP("ep5", 5, 1024, 2, 1, 0), - EP("ep6", 6, 1024, 2, 1, 0), - EP("ep7", 7, 1024, 2, 0, 0), -}; - -#undef EP - -/* - * pdata doesn't have room for any endpoints, so we need to - * append room for the ones we need right after it. - */ -static struct { - struct usba_platform_data pdata; - struct usba_ep_data ep[8]; -} usba_udc_data; - -static struct platform_device at91_usba_udc_device = { - .name = "atmel_usba_udc", - .id = -1, - .dev = { - .platform_data = &usba_udc_data.pdata, - }, - .resource = usba_udc_resources, - .num_resources = ARRAY_SIZE(usba_udc_resources), -}; - -void __init at91_add_device_usba(struct usba_platform_data *data) -{ - if (cpu_is_at91cap9_revB()) { - irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); - at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | - AT91_MATRIX_UDPHS_BYPASS_LOCK); - } - else - at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS); - - /* - * Invalid pins are 0 on AT91, but the usba driver is shared - * with AVR32, which use negative values instead. Once/if - * gpio_is_valid() is ported to AT91, revisit this code. - */ - usba_udc_data.pdata.vbus_pin = -EINVAL; - usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); - memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); - - if (data && gpio_is_valid(data->vbus_pin)) { - at91_set_gpio_input(data->vbus_pin, 0); - at91_set_deglitch(data->vbus_pin, 1); - usba_udc_data.pdata.vbus_pin = data->vbus_pin; - } - - /* Pullup pin is handled internally by USB device peripheral */ - - platform_device_register(&at91_usba_udc_device); -} -#else -void __init at91_add_device_usba(struct usba_platform_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * Ethernet - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -static u64 eth_dmamask = DMA_BIT_MASK(32); -static struct macb_platform_data eth_data; - -static struct resource eth_resources[] = { - [0] = { - .start = AT91CAP9_BASE_EMAC, - .end = AT91CAP9_BASE_EMAC + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_EMAC, - .end = AT91CAP9_ID_EMAC, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_eth_device = { - .name = "macb", - .id = -1, - .dev = { - .dma_mask = ð_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = ð_data, - }, - .resource = eth_resources, - .num_resources = ARRAY_SIZE(eth_resources), -}; - -void __init at91_add_device_eth(struct macb_platform_data *data) -{ - if (!data) - return; - - if (gpio_is_valid(data->phy_irq_pin)) { - at91_set_gpio_input(data->phy_irq_pin, 0); - at91_set_deglitch(data->phy_irq_pin, 1); - } - - /* Pins used for MII and RMII */ - at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ - - if (!data->is_rmii) { - at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ - at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ - at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ - } - - eth_data = *data; - platform_device_register(&at91cap9_eth_device); -} -#else -void __init at91_add_device_eth(struct macb_platform_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * MMC / SD - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = DMA_BIT_MASK(32); -static struct at91_mmc_data mmc0_data, mmc1_data; - -static struct resource mmc0_resources[] = { - [0] = { - .start = AT91CAP9_BASE_MCI0, - .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_MCI0, - .end = AT91CAP9_ID_MCI0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_mmc0_device = { - .name = "at91_mci", - .id = 0, - .dev = { - .dma_mask = &mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &mmc0_data, - }, - .resource = mmc0_resources, - .num_resources = ARRAY_SIZE(mmc0_resources), -}; - -static struct resource mmc1_resources[] = { - [0] = { - .start = AT91CAP9_BASE_MCI1, - .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_MCI1, - .end = AT91CAP9_ID_MCI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_mmc1_device = { - .name = "at91_mci", - .id = 1, - .dev = { - .dma_mask = &mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &mmc1_data, - }, - .resource = mmc1_resources, - .num_resources = ARRAY_SIZE(mmc1_resources), -}; - -void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) -{ - if (!data) - return; - - /* input/irq */ - if (gpio_is_valid(data->det_pin)) { - at91_set_gpio_input(data->det_pin, 1); - at91_set_deglitch(data->det_pin, 1); - } - if (gpio_is_valid(data->wp_pin)) - at91_set_gpio_input(data->wp_pin, 1); - if (gpio_is_valid(data->vcc_pin)) - at91_set_gpio_output(data->vcc_pin, 0); - - if (mmc_id == 0) { /* MCI0 */ - /* CLK */ - at91_set_A_periph(AT91_PIN_PA2, 0); - - /* CMD */ - at91_set_A_periph(AT91_PIN_PA1, 1); - - /* DAT0, maybe DAT1..DAT3 */ - at91_set_A_periph(AT91_PIN_PA0, 1); - if (data->wire4) { - at91_set_A_periph(AT91_PIN_PA3, 1); - at91_set_A_periph(AT91_PIN_PA4, 1); - at91_set_A_periph(AT91_PIN_PA5, 1); - } - - mmc0_data = *data; - platform_device_register(&at91cap9_mmc0_device); - } else { /* MCI1 */ - /* CLK */ - at91_set_A_periph(AT91_PIN_PA16, 0); - - /* CMD */ - at91_set_A_periph(AT91_PIN_PA17, 1); - - /* DAT0, maybe DAT1..DAT3 */ - at91_set_A_periph(AT91_PIN_PA18, 1); - if (data->wire4) { - at91_set_A_periph(AT91_PIN_PA19, 1); - at91_set_A_periph(AT91_PIN_PA20, 1); - at91_set_A_periph(AT91_PIN_PA21, 1); - } - - mmc1_data = *data; - platform_device_register(&at91cap9_mmc1_device); - } -} -#else -void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * NAND / SmartMedia - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) -static struct atmel_nand_data nand_data; - -#define NAND_BASE AT91_CHIPSELECT_3 - -static struct resource nand_resources[] = { - [0] = { - .start = NAND_BASE, - .end = NAND_BASE + SZ_256M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_BASE_ECC, - .end = AT91CAP9_BASE_ECC + SZ_512 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device at91cap9_nand_device = { - .name = "atmel_nand", - .id = -1, - .dev = { - .platform_data = &nand_data, - }, - .resource = nand_resources, - .num_resources = ARRAY_SIZE(nand_resources), -}; - -void __init at91_add_device_nand(struct atmel_nand_data *data) -{ - unsigned long csa; - - if (!data) - return; - - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); - - /* enable pin */ - if (gpio_is_valid(data->enable_pin)) - at91_set_gpio_output(data->enable_pin, 1); - - /* ready/busy pin */ - if (gpio_is_valid(data->rdy_pin)) - at91_set_gpio_input(data->rdy_pin, 1); - - /* card detect pin */ - if (gpio_is_valid(data->det_pin)) - at91_set_gpio_input(data->det_pin, 1); - - nand_data = *data; - platform_device_register(&at91cap9_nand_device); -} -#else -void __init at91_add_device_nand(struct atmel_nand_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * TWI (i2c) - * -------------------------------------------------------------------- */ - -/* - * Prefer the GPIO code since the TWI controller isn't robust - * (gets overruns and underruns under load) and can only issue - * repeated STARTs in one scenario (the driver doesn't yet handle them). - */ -#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) - -static struct i2c_gpio_platform_data pdata = { - .sda_pin = AT91_PIN_PB4, - .sda_is_open_drain = 1, - .scl_pin = AT91_PIN_PB5, - .scl_is_open_drain = 1, - .udelay = 2, /* ~100 kHz */ -}; - -static struct platform_device at91cap9_twi_device = { - .name = "i2c-gpio", - .id = -1, - .dev.platform_data = &pdata, -}; - -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) -{ - at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */ - at91_set_multi_drive(AT91_PIN_PB4, 1); - - at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */ - at91_set_multi_drive(AT91_PIN_PB5, 1); - - i2c_register_board_info(0, devices, nr_devices); - platform_device_register(&at91cap9_twi_device); -} - -#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) - -static struct resource twi_resources[] = { - [0] = { - .start = AT91CAP9_BASE_TWI, - .end = AT91CAP9_BASE_TWI + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_TWI, - .end = AT91CAP9_ID_TWI, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_twi_device = { - .name = "at91_i2c", - .id = -1, - .resource = twi_resources, - .num_resources = ARRAY_SIZE(twi_resources), -}; - -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) -{ - /* pins used for TWI interface */ - at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */ - at91_set_multi_drive(AT91_PIN_PB4, 1); - - at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */ - at91_set_multi_drive(AT91_PIN_PB5, 1); - - i2c_register_board_info(0, devices, nr_devices); - platform_device_register(&at91cap9_twi_device); -} -#else -void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} -#endif - -/* -------------------------------------------------------------------- - * SPI - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = DMA_BIT_MASK(32); - -static struct resource spi0_resources[] = { - [0] = { - .start = AT91CAP9_BASE_SPI0, - .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_SPI0, - .end = AT91CAP9_ID_SPI0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_spi0_device = { - .name = "atmel_spi", - .id = 0, - .dev = { - .dma_mask = &spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = spi0_resources, - .num_resources = ARRAY_SIZE(spi0_resources), -}; - -static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 }; - -static struct resource spi1_resources[] = { - [0] = { - .start = AT91CAP9_BASE_SPI1, - .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_SPI1, - .end = AT91CAP9_ID_SPI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_spi1_device = { - .name = "atmel_spi", - .id = 1, - .dev = { - .dma_mask = &spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = spi1_resources, - .num_resources = ARRAY_SIZE(spi1_resources), -}; - -static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 }; - -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) -{ - int i; - unsigned long cs_pin; - short enable_spi0 = 0; - short enable_spi1 = 0; - - /* Choose SPI chip-selects */ - for (i = 0; i < nr_devices; i++) { - if (devices[i].controller_data) - cs_pin = (unsigned long) devices[i].controller_data; - else if (devices[i].bus_num == 0) - cs_pin = spi0_standard_cs[devices[i].chip_select]; - else - cs_pin = spi1_standard_cs[devices[i].chip_select]; - - if (devices[i].bus_num == 0) - enable_spi0 = 1; - else - enable_spi1 = 1; - - /* enable chip-select pin */ - at91_set_gpio_output(cs_pin, 1); - - /* pass chip-select pin to driver */ - devices[i].controller_data = (void *) cs_pin; - } - - spi_register_board_info(devices, nr_devices); - - /* Configure SPI bus(es) */ - if (enable_spi0) { - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ - - platform_device_register(&at91cap9_spi0_device); - } - if (enable_spi1) { - at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ - - platform_device_register(&at91cap9_spi1_device); - } -} -#else -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} -#endif - - -/* -------------------------------------------------------------------- - * Timer/Counter block - * -------------------------------------------------------------------- */ - -#ifdef CONFIG_ATMEL_TCLIB - -static struct resource tcb_resources[] = { - [0] = { - .start = AT91CAP9_BASE_TCB0, - .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_TCB, - .end = AT91CAP9_ID_TCB, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_tcb_device = { - .name = "atmel_tcb", - .id = 0, - .resource = tcb_resources, - .num_resources = ARRAY_SIZE(tcb_resources), -}; - -static void __init at91_add_device_tc(void) -{ - platform_device_register(&at91cap9_tcb_device); -} -#else -static void __init at91_add_device_tc(void) { } -#endif - - -/* -------------------------------------------------------------------- - * RTT - * -------------------------------------------------------------------- */ - -static struct resource rtt_resources[] = { - { - .start = AT91CAP9_BASE_RTT, - .end = AT91CAP9_BASE_RTT + SZ_16 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device at91cap9_rtt_device = { - .name = "at91_rtt", - .id = 0, - .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), -}; - -static void __init at91_add_device_rtt(void) -{ - platform_device_register(&at91cap9_rtt_device); -} - - -/* -------------------------------------------------------------------- - * Watchdog - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) -static struct resource wdt_resources[] = { - { - .start = AT91CAP9_BASE_WDT, - .end = AT91CAP9_BASE_WDT + SZ_16 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device at91cap9_wdt_device = { - .name = "at91_wdt", - .id = -1, - .resource = wdt_resources, - .num_resources = ARRAY_SIZE(wdt_resources), -}; - -static void __init at91_add_device_watchdog(void) -{ - platform_device_register(&at91cap9_wdt_device); -} -#else -static void __init at91_add_device_watchdog(void) {} -#endif - - -/* -------------------------------------------------------------------- - * PWM - * --------------------------------------------------------------------*/ - -#if defined(CONFIG_ATMEL_PWM) -static u32 pwm_mask; - -static struct resource pwm_resources[] = { - [0] = { - .start = AT91CAP9_BASE_PWMC, - .end = AT91CAP9_BASE_PWMC + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_PWMC, - .end = AT91CAP9_ID_PWMC, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_pwm0_device = { - .name = "atmel_pwm", - .id = -1, - .dev = { - .platform_data = &pwm_mask, - }, - .resource = pwm_resources, - .num_resources = ARRAY_SIZE(pwm_resources), -}; - -void __init at91_add_device_pwm(u32 mask) -{ - if (mask & (1 << AT91_PWM0)) - at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */ - - if (mask & (1 << AT91_PWM1)) - at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */ - - if (mask & (1 << AT91_PWM2)) - at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */ - - if (mask & (1 << AT91_PWM3)) - at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */ - - pwm_mask = mask; - - platform_device_register(&at91cap9_pwm0_device); -} -#else -void __init at91_add_device_pwm(u32 mask) {} -#endif - - - -/* -------------------------------------------------------------------- - * AC97 - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE) -static u64 ac97_dmamask = DMA_BIT_MASK(32); -static struct ac97c_platform_data ac97_data; - -static struct resource ac97_resources[] = { - [0] = { - .start = AT91CAP9_BASE_AC97C, - .end = AT91CAP9_BASE_AC97C + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_AC97C, - .end = AT91CAP9_ID_AC97C, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_ac97_device = { - .name = "atmel_ac97c", - .id = 1, - .dev = { - .dma_mask = &ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &ac97_data, - }, - .resource = ac97_resources, - .num_resources = ARRAY_SIZE(ac97_resources), -}; - -void __init at91_add_device_ac97(struct ac97c_platform_data *data) -{ - if (!data) - return; - - at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */ - at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */ - at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */ - at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ - - /* reset */ - if (gpio_is_valid(data->reset_pin)) - at91_set_gpio_output(data->reset_pin, 0); - - ac97_data = *data; - platform_device_register(&at91cap9_ac97_device); -} -#else -void __init at91_add_device_ac97(struct ac97c_platform_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * LCD Controller - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) -static u64 lcdc_dmamask = DMA_BIT_MASK(32); -static struct atmel_lcdfb_info lcdc_data; - -static struct resource lcdc_resources[] = { - [0] = { - .start = AT91CAP9_LCDC_BASE, - .end = AT91CAP9_LCDC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_LCDC, - .end = AT91CAP9_ID_LCDC, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91_lcdc_device = { - .name = "atmel_lcdfb", - .id = 0, - .dev = { - .dma_mask = &lcdc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &lcdc_data, - }, - .resource = lcdc_resources, - .num_resources = ARRAY_SIZE(lcdc_resources), -}; - -void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) -{ - if (!data) - return; - - if (cpu_is_at91cap9_revB()) - irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); - - at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ - at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ - at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ - at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ - at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ - at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ - at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ - at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ - at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ - - lcdc_data = *data; - platform_device_register(&at91_lcdc_device); -} -#else -void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} -#endif - - -/* -------------------------------------------------------------------- - * SSC -- Synchronous Serial Controller - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) -static u64 ssc0_dmamask = DMA_BIT_MASK(32); - -static struct resource ssc0_resources[] = { - [0] = { - .start = AT91CAP9_BASE_SSC0, - .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_SSC0, - .end = AT91CAP9_ID_SSC0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_ssc0_device = { - .name = "ssc", - .id = 0, - .dev = { - .dma_mask = &ssc0_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = ssc0_resources, - .num_resources = ARRAY_SIZE(ssc0_resources), -}; - -static inline void configure_ssc0_pins(unsigned pins) -{ - if (pins & ATMEL_SSC_TF) - at91_set_A_periph(AT91_PIN_PB0, 1); - if (pins & ATMEL_SSC_TK) - at91_set_A_periph(AT91_PIN_PB1, 1); - if (pins & ATMEL_SSC_TD) - at91_set_A_periph(AT91_PIN_PB2, 1); - if (pins & ATMEL_SSC_RD) - at91_set_A_periph(AT91_PIN_PB3, 1); - if (pins & ATMEL_SSC_RK) - at91_set_A_periph(AT91_PIN_PB4, 1); - if (pins & ATMEL_SSC_RF) - at91_set_A_periph(AT91_PIN_PB5, 1); -} - -static u64 ssc1_dmamask = DMA_BIT_MASK(32); - -static struct resource ssc1_resources[] = { - [0] = { - .start = AT91CAP9_BASE_SSC1, - .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_SSC1, - .end = AT91CAP9_ID_SSC1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device at91cap9_ssc1_device = { - .name = "ssc", - .id = 1, - .dev = { - .dma_mask = &ssc1_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = ssc1_resources, - .num_resources = ARRAY_SIZE(ssc1_resources), -}; - -static inline void configure_ssc1_pins(unsigned pins) -{ - if (pins & ATMEL_SSC_TF) - at91_set_A_periph(AT91_PIN_PB6, 1); - if (pins & ATMEL_SSC_TK) - at91_set_A_periph(AT91_PIN_PB7, 1); - if (pins & ATMEL_SSC_TD) - at91_set_A_periph(AT91_PIN_PB8, 1); - if (pins & ATMEL_SSC_RD) - at91_set_A_periph(AT91_PIN_PB9, 1); - if (pins & ATMEL_SSC_RK) - at91_set_A_periph(AT91_PIN_PB10, 1); - if (pins & ATMEL_SSC_RF) - at91_set_A_periph(AT91_PIN_PB11, 1); -} - -/* - * SSC controllers are accessed through library code, instead of any - * kind of all-singing/all-dancing driver. For example one could be - * used by a particular I2S audio codec's driver, while another one - * on the same system might be used by a custom data capture driver. - */ -void __init at91_add_device_ssc(unsigned id, unsigned pins) -{ - struct platform_device *pdev; - - /* - * NOTE: caller is responsible for passing information matching - * "pins" to whatever will be using each particular controller. - */ - switch (id) { - case AT91CAP9_ID_SSC0: - pdev = &at91cap9_ssc0_device; - configure_ssc0_pins(pins); - break; - case AT91CAP9_ID_SSC1: - pdev = &at91cap9_ssc1_device; - configure_ssc1_pins(pins); - break; - default: - return; - } - - platform_device_register(pdev); -} - -#else -void __init at91_add_device_ssc(unsigned id, unsigned pins) {} -#endif - - -/* -------------------------------------------------------------------- - * UART - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_SERIAL_ATMEL) -static struct resource dbgu_resources[] = { - [0] = { - .start = AT91CAP9_BASE_DBGU, - .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data dbgu_data = { - .use_dma_tx = 0, - .use_dma_rx = 0, /* DBGU not capable of receive DMA */ -}; - -static u64 dbgu_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at91cap9_dbgu_device = { - .name = "atmel_usart", - .id = 0, - .dev = { - .dma_mask = &dbgu_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &dbgu_data, - }, - .resource = dbgu_resources, - .num_resources = ARRAY_SIZE(dbgu_resources), -}; - -static inline void configure_dbgu_pins(void) -{ - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ -} - -static struct resource uart0_resources[] = { - [0] = { - .start = AT91CAP9_BASE_US0, - .end = AT91CAP9_BASE_US0 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_US0, - .end = AT91CAP9_ID_US0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart0_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart0_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at91cap9_uart0_device = { - .name = "atmel_usart", - .id = 1, - .dev = { - .dma_mask = &uart0_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart0_data, - }, - .resource = uart0_resources, - .num_resources = ARRAY_SIZE(uart0_resources), -}; - -static inline void configure_usart0_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ - - if (pins & ATMEL_UART_RTS) - at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */ - if (pins & ATMEL_UART_CTS) - at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */ -} - -static struct resource uart1_resources[] = { - [0] = { - .start = AT91CAP9_BASE_US1, - .end = AT91CAP9_BASE_US1 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_US1, - .end = AT91CAP9_ID_US1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart1_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart1_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at91cap9_uart1_device = { - .name = "atmel_usart", - .id = 2, - .dev = { - .dma_mask = &uart1_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart1_data, - }, - .resource = uart1_resources, - .num_resources = ARRAY_SIZE(uart1_resources), -}; - -static inline void configure_usart1_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - - if (pins & ATMEL_UART_RTS) - at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ - if (pins & ATMEL_UART_CTS) - at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ -} - -static struct resource uart2_resources[] = { - [0] = { - .start = AT91CAP9_BASE_US2, - .end = AT91CAP9_BASE_US2 + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AT91CAP9_ID_US2, - .end = AT91CAP9_ID_US2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct atmel_uart_data uart2_data = { - .use_dma_tx = 1, - .use_dma_rx = 1, -}; - -static u64 uart2_dmamask = DMA_BIT_MASK(32); - -static struct platform_device at91cap9_uart2_device = { - .name = "atmel_usart", - .id = 3, - .dev = { - .dma_mask = &uart2_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &uart2_data, - }, - .resource = uart2_resources, - .num_resources = ARRAY_SIZE(uart2_resources), -}; - -static inline void configure_usart2_pins(unsigned pins) -{ - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - - if (pins & ATMEL_UART_RTS) - at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ - if (pins & ATMEL_UART_CTS) - at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ -} - -static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ - -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) -{ - struct platform_device *pdev; - struct atmel_uart_data *pdata; - - switch (id) { - case 0: /* DBGU */ - pdev = &at91cap9_dbgu_device; - configure_dbgu_pins(); - break; - case AT91CAP9_ID_US0: - pdev = &at91cap9_uart0_device; - configure_usart0_pins(pins); - break; - case AT91CAP9_ID_US1: - pdev = &at91cap9_uart1_device; - configure_usart1_pins(pins); - break; - case AT91CAP9_ID_US2: - pdev = &at91cap9_uart2_device; - configure_usart2_pins(pins); - break; - default: - return; - } - pdata = pdev->dev.platform_data; - pdata->num = portnr; /* update to mapped ID */ - - if (portnr < ATMEL_MAX_UART) - at91_uarts[portnr] = pdev; -} - -void __init at91_set_serial_console(unsigned portnr) -{ - if (portnr < ATMEL_MAX_UART) { - atmel_default_console_device = at91_uarts[portnr]; - at91cap9_set_console_clock(at91_uarts[portnr]->id); - } -} - -void __init at91_add_device_serial(void) -{ - int i; - - for (i = 0; i < ATMEL_MAX_UART; i++) { - if (at91_uarts[i]) - platform_device_register(at91_uarts[i]); - } - - if (!atmel_default_console_device) - printk(KERN_INFO "AT91: No default serial console defined.\n"); -} -#else -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} -void __init at91_set_serial_console(unsigned portnr) {} -void __init at91_add_device_serial(void) {} -#endif - - -/* -------------------------------------------------------------------- */ -/* - * These devices are always present and don't need any board-specific - * setup. - */ -static int __init at91_add_standard_devices(void) -{ - at91_add_device_rtt(); - at91_add_device_watchdog(); - at91_add_device_tc(); - return 0; -} - -arch_initcall(at91_add_standard_devices); diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 99c3174e24a2..0df1045311e4 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -289,13 +289,22 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { } }; +static void at91rm9200_idle(void) +{ + /* + * Disable the processor clock. The processor will be automatically + * re-enabled by an interrupt or by a reset. + */ + at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); +} + static void at91rm9200_restart(char mode, const char *cmd) { /* * Perform a hardware reset with the use of the Watchdog timer. */ - at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); - at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); + at91_st_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); + at91_st_write(AT91_ST_CR, AT91_ST_WDRST); } /* -------------------------------------------------------------------- @@ -310,10 +319,13 @@ static void __init at91rm9200_map_io(void) static void __init at91rm9200_ioremap_registers(void) { + at91rm9200_ioremap_st(AT91RM9200_BASE_ST); + at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256); } static void __init at91rm9200_initialize(void) { + arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 18bacec2b094..640520c04c46 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -21,6 +21,7 @@ #include <mach/board.h> #include <mach/at91rm9200.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include "generic.h" @@ -241,15 +242,15 @@ void __init at91_add_device_cf(struct at91_cf_data *data) data->chipselect = 4; /* can only use EBI ChipSelect 4 */ /* CF takes over CS4, CS5, CS6 */ - csa = at91_sys_read(AT91_EBI_CSA); - at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); + csa = at91_ramc_read(0, AT91_EBI_CSA); + at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); /* * Static memory controller timing adjustments. * REVISIT: these timings are in terms of MCK cycles, so * when MCK changes (cpufreq etc) so must these values... */ - at91_sys_write(AT91_SMC_CSR(4), + at91_ramc_write(0, AT91_SMC_CSR(4), AT91_SMC_ACSS_STD | AT91_SMC_DBW_16 | AT91_SMC_BAT @@ -407,11 +408,11 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) return; /* enable the address range of CS3 */ - csa = at91_sys_read(AT91_EBI_CSA); - at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA); + csa = at91_ramc_read(0, AT91_EBI_CSA); + at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN + at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN | AT91_SMC_NWS_(5) | AT91_SMC_TDF_(1) | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */ @@ -1114,7 +1115,6 @@ static inline void configure_usart3_pins(unsigned pins) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index a028cdf8f974..dd7f782b0b91 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -43,9 +43,9 @@ static inline unsigned long read_CRTR(void) { unsigned long x1, x2; - x1 = at91_sys_read(AT91_ST_CRTR); + x1 = at91_st_read(AT91_ST_CRTR); do { - x2 = at91_sys_read(AT91_ST_CRTR); + x2 = at91_st_read(AT91_ST_CRTR); if (x1 == x2) break; x1 = x2; @@ -58,7 +58,7 @@ static inline unsigned long read_CRTR(void) */ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) { - u32 sr = at91_sys_read(AT91_ST_SR) & irqmask; + u32 sr = at91_st_read(AT91_ST_SR) & irqmask; /* * irqs should be disabled here, but as the irq is shared they are only @@ -110,22 +110,22 @@ static void clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) { /* Disable and flush pending timer interrupts */ - at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS); - (void) at91_sys_read(AT91_ST_SR); + at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS); + at91_st_read(AT91_ST_SR); last_crtr = read_CRTR(); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* PIT for periodic irqs; fixed rate of 1/HZ */ irqmask = AT91_ST_PITS; - at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); + at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); break; case CLOCK_EVT_MODE_ONESHOT: /* ALM for oneshot irqs, set by next_event() * before 32 seconds have passed */ irqmask = AT91_ST_ALMS; - at91_sys_write(AT91_ST_RTAR, last_crtr); + at91_st_write(AT91_ST_RTAR, last_crtr); break; case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: @@ -133,7 +133,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) irqmask = 0; break; } - at91_sys_write(AT91_ST_IER, irqmask); + at91_st_write(AT91_ST_IER, irqmask); } static int @@ -156,12 +156,12 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) alm = read_CRTR(); /* Cancel any pending alarm; flush any pending IRQ */ - at91_sys_write(AT91_ST_RTAR, alm); - (void) at91_sys_read(AT91_ST_SR); + at91_st_write(AT91_ST_RTAR, alm); + at91_st_read(AT91_ST_SR); /* Schedule alarm by writing RTAR. */ alm += delta; - at91_sys_write(AT91_ST_RTAR, alm); + at91_st_write(AT91_ST_RTAR, alm); return status; } @@ -175,15 +175,24 @@ static struct clock_event_device clkevt = { .set_mode = clkevt32k_mode, }; +void __iomem *at91_st_base; + +void __init at91rm9200_ioremap_st(u32 addr) +{ + at91_st_base = ioremap(addr, 256); + if (!at91_st_base) + panic("Impossible to ioremap ST\n"); +} + /* * ST (system timer) module supports both clockevents and clocksource. */ void __init at91rm9200_timer_init(void) { /* Disable all timer interrupts, and clear any pending ones */ - at91_sys_write(AT91_ST_IDR, + at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); - (void) at91_sys_read(AT91_ST_SR); + at91_st_read(AT91_ST_SR); /* Make IRQs happen for the system timer */ setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq); @@ -192,7 +201,7 @@ void __init at91rm9200_timer_init(void) * directly for the clocksource and all clockevents, after adjusting * its prescaler from the 1 Hz default. */ - at91_sys_write(AT91_ST_RTMR, 1); + at91_st_write(AT91_ST_RTMR, 1); /* Setup timer clockevent, with minimum of two ticks (important!!) */ clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d4036ba43612..4ade265be805 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -12,6 +12,7 @@ #include <linux/module.h> +#include <asm/proc-fns.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -309,27 +310,27 @@ static void __init at91sam9xe_map_io(void) static void __init at91sam9260_map_io(void) { - if (cpu_is_at91sam9xe()) { + if (cpu_is_at91sam9xe()) at91sam9xe_map_io(); - } else if (cpu_is_at91sam9g20()) { - at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE); - at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE); - } else { - at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE); - at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE); - } + else if (cpu_is_at91sam9g20()) + at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE); + else + at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); } static void __init at91sam9260_ioremap_registers(void) { at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); at91_ioremap_rstc(AT91SAM9260_BASE_RSTC); + at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512); at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); + at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX); } static void __init at91sam9260_initialize(void) { + arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 642ccb6d26b2..df487ce83c5e 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -21,6 +21,7 @@ #include <mach/cpu.h> #include <mach/at91sam9260.h> #include <mach/at91sam9260_matrix.h> +#include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include "generic.h" @@ -422,8 +423,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); + at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -717,18 +718,42 @@ static struct resource rtt_resources[] = { .start = AT91SAM9260_BASE_RTT, .end = AT91SAM9260_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, - } + }, { + .flags = IORESOURCE_MEM, + }, }; static struct platform_device at91sam9260_rtt_device = { .name = "at91_rtt", .id = 0, .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), }; + +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9) +static void __init at91_add_device_rtt_rtc(void) +{ + at91sam9260_rtt_device.name = "rtc-at91sam9"; + /* + * The second resource is needed: + * GPBR will serve as the storage for RTC time offset + */ + at91sam9260_rtt_device.num_resources = 2; + rtt_resources[1].start = AT91SAM9260_BASE_GPBR + + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR; + rtt_resources[1].end = rtt_resources[1].start + 3; +} +#else +static void __init at91_add_device_rtt_rtc(void) +{ + /* Only one resource is needed: RTT not used as RTC */ + at91sam9260_rtt_device.num_resources = 1; +} +#endif + static void __init at91_add_device_rtt(void) { + at91_add_device_rtt_rtc(); platform_device_register(&at91sam9260_rtt_device); } @@ -1139,7 +1164,6 @@ static inline void configure_usart5_pins(void) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { @@ -1265,7 +1289,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBICSA); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); switch (data->chipselect) { case 4: @@ -1288,7 +1312,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) return; } - at91_sys_write(AT91_MATRIX_EBICSA, csa); + at91_matrix_write(AT91_MATRIX_EBICSA, csa); if (gpio_is_valid(data->rst_pin)) { at91_set_multi_drive(data->rst_pin, 0); diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 023c2ff138df..684c5dfd92ac 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -12,6 +12,7 @@ #include <linux/module.h> +#include <asm/proc-fns.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -282,12 +283,15 @@ static void __init at91sam9261_ioremap_registers(void) { at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); at91_ioremap_rstc(AT91SAM9261_BASE_RSTC); + at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512); at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); + at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX); } static void __init at91sam9261_initialize(void) { + arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index fc59cbdb0e3c..3bd10ce4854e 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -24,6 +24,7 @@ #include <mach/board.h> #include <mach/at91sam9261.h> #include <mach/at91sam9261_matrix.h> +#include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include "generic.h" @@ -236,8 +237,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); + at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -603,6 +604,8 @@ static struct resource rtt_resources[] = { .start = AT91SAM9261_BASE_RTT, .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_MEM, } }; @@ -610,11 +613,32 @@ static struct platform_device at91sam9261_rtt_device = { .name = "at91_rtt", .id = 0, .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), }; +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9) +static void __init at91_add_device_rtt_rtc(void) +{ + at91sam9261_rtt_device.name = "rtc-at91sam9"; + /* + * The second resource is needed: + * GPBR will serve as the storage for RTC time offset + */ + at91sam9261_rtt_device.num_resources = 2; + rtt_resources[1].start = AT91SAM9261_BASE_GPBR + + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR; + rtt_resources[1].end = rtt_resources[1].start + 3; +} +#else +static void __init at91_add_device_rtt_rtc(void) +{ + /* Only one resource is needed: RTT not used as RTC */ + at91sam9261_rtt_device.num_resources = 1; +} +#endif + static void __init at91_add_device_rtt(void) { + at91_add_device_rtt_rtc(); platform_device_register(&at91sam9261_rtt_device); } @@ -991,7 +1015,6 @@ static inline void configure_usart2_pins(unsigned pins) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 75e876c258af..0b4fa5a7f685 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -12,6 +12,7 @@ #include <linux/module.h> +#include <asm/proc-fns.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -302,13 +303,17 @@ static void __init at91sam9263_ioremap_registers(void) { at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); at91_ioremap_rstc(AT91SAM9263_BASE_RSTC); + at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512); + at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512); at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); + at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX); } static void __init at91sam9263_initialize(void) { + arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 7b46b2787022..7792de5b83d4 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -23,6 +23,7 @@ #include <mach/board.h> #include <mach/at91sam9263.h> #include <mach/at91sam9263_matrix.h> +#include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include "generic.h" @@ -409,7 +410,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) * we assume SMC timings are configured by board code, * except True IDE where timings are controlled by driver */ - ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA); switch (data->chipselect) { case 4: at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */ @@ -428,7 +429,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) data->chipselect); return; } - at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); + at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa); if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); @@ -496,8 +497,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBI0CSA); - at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + csa = at91_matrix_read(AT91_MATRIX_EBI0CSA); + at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -891,7 +892,8 @@ static struct platform_device at91sam9263_isi_device = { .num_resources = ARRAY_SIZE(isi_resources), }; -void __init at91_add_device_isi(void) +void __init at91_add_device_isi(struct isi_platform_data *data, + bool use_pck_as_mck) { at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */ at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */ @@ -904,14 +906,20 @@ void __init at91_add_device_isi(void) at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */ at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */ at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */ - at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */ at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */ at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */ at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */ at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */ + + if (use_pck_as_mck) { + at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */ + + /* TODO: register the PCK for ISI_MCK and set its parent */ + } } #else -void __init at91_add_device_isi(void) {} +void __init at91_add_device_isi(struct isi_platform_data *data, + bool use_pck_as_mck) {} #endif @@ -959,6 +967,8 @@ static struct resource rtt0_resources[] = { .start = AT91SAM9263_BASE_RTT0, .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1, .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_MEM, } }; @@ -966,7 +976,6 @@ static struct platform_device at91sam9263_rtt0_device = { .name = "at91_rtt", .id = 0, .resource = rtt0_resources, - .num_resources = ARRAY_SIZE(rtt0_resources), }; static struct resource rtt1_resources[] = { @@ -974,6 +983,8 @@ static struct resource rtt1_resources[] = { .start = AT91SAM9263_BASE_RTT1, .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1, .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_MEM, } }; @@ -981,11 +992,53 @@ static struct platform_device at91sam9263_rtt1_device = { .name = "at91_rtt", .id = 1, .resource = rtt1_resources, - .num_resources = ARRAY_SIZE(rtt1_resources), }; +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9) +static void __init at91_add_device_rtt_rtc(void) +{ + struct platform_device *pdev; + struct resource *r; + + switch (CONFIG_RTC_DRV_AT91SAM9_RTT) { + case 0: + /* + * The second resource is needed only for the chosen RTT: + * GPBR will serve as the storage for RTC time offset + */ + at91sam9263_rtt0_device.num_resources = 2; + at91sam9263_rtt1_device.num_resources = 1; + pdev = &at91sam9263_rtt0_device; + r = rtt0_resources; + break; + case 1: + at91sam9263_rtt0_device.num_resources = 1; + at91sam9263_rtt1_device.num_resources = 2; + pdev = &at91sam9263_rtt1_device; + r = rtt1_resources; + break; + default: + pr_err("at91sam9263: only supports 2 RTT (%d)\n", + CONFIG_RTC_DRV_AT91SAM9_RTT); + return; + } + + pdev->name = "rtc-at91sam9"; + r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR; + r[1].end = r[1].start + 3; +} +#else +static void __init at91_add_device_rtt_rtc(void) +{ + /* Only one resource is needed: RTT not used as RTC */ + at91sam9263_rtt0_device.num_resources = 1; + at91sam9263_rtt1_device.num_resources = 1; +} +#endif + static void __init at91_add_device_rtt(void) { + at91_add_device_rtt_rtc(); platform_device_register(&at91sam9263_rtt0_device); platform_device_register(&at91sam9263_rtt1_device); } @@ -1371,7 +1424,6 @@ static inline void configure_usart2_pins(unsigned pins) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S index 518e42377171..7af2e108b8a0 100644 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ b/arch/arm/mach-at91/at91sam9_alt_reset.S @@ -15,16 +15,17 @@ #include <linux/linkage.h> #include <mach/hardware.h> -#include <mach/at91sam9_sdramc.h> +#include <mach/at91_ramc.h> #include <mach/at91_rstc.h> .arm .globl at91sam9_alt_restart -at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants - ldr r1, =at91_rstc_base - ldr r1, [r1] +at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants + ldr r0, [r0] + ldr r4, =at91_rstc_base + ldr r1, [r4] mov r2, #1 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN @@ -37,6 +38,3 @@ at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants str r4, [r1, #AT91_RSTC_CR] @ reset processor b . - -.at91_va_base_sdramc: - .word AT91_VA_BASE_SYS + AT91_SDRAMC0 diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 1cb6a96b1c1e..a41622ea61b8 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -331,12 +331,16 @@ static void __init at91sam9g45_ioremap_registers(void) { at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC); + at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512); + at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512); at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); + at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX); } static void __init at91sam9g45_initialize(void) { + arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index b7582dd10dc3..410829532aab 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -14,6 +14,7 @@ #include <linux/dma-mapping.h> #include <linux/gpio.h> +#include <linux/clk.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> #include <linux/atmel-mci.h> @@ -24,11 +25,15 @@ #include <mach/board.h> #include <mach/at91sam9g45.h> #include <mach/at91sam9g45_matrix.h> +#include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include <mach/at_hdmac.h> #include <mach/atmel-mci.h> +#include <media/atmel-isi.h> + #include "generic.h" +#include "clock.h" /* -------------------------------------------------------------------- @@ -38,10 +43,6 @@ #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) static u64 hdmac_dmamask = DMA_BIT_MASK(32); -static struct at_dma_platform_data atdma_pdata = { - .nr_channels = 8, -}; - static struct resource hdmac_resources[] = { [0] = { .start = AT91SAM9G45_BASE_DMA, @@ -56,12 +57,11 @@ static struct resource hdmac_resources[] = { }; static struct platform_device at_hdmac_device = { - .name = "at_hdmac", + .name = "at91sam9g45_dma", .id = -1, .dev = { .dma_mask = &hdmac_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &atdma_pdata, }, .resource = hdmac_resources, .num_resources = ARRAY_SIZE(hdmac_resources), @@ -69,9 +69,15 @@ static struct platform_device at_hdmac_device = { void __init at91_add_device_hdmac(void) { - dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); - dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask); - platform_device_register(&at_hdmac_device); +#if defined(CONFIG_OF) + struct device_node *of_node = + of_find_node_by_name(NULL, "dma-controller"); + + if (of_node) + of_node_put(of_node); + else +#endif + platform_device_register(&at_hdmac_device); } #else void __init at91_add_device_hdmac(void) {} @@ -552,8 +558,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); + at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -869,6 +875,96 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) void __init at91_add_device_ac97(struct ac97c_platform_data *data) {} #endif +/* -------------------------------------------------------------------- + * Image Sensor Interface + * -------------------------------------------------------------------- */ +#if defined(CONFIG_VIDEO_ATMEL_ISI) || defined(CONFIG_VIDEO_ATMEL_ISI_MODULE) +static u64 isi_dmamask = DMA_BIT_MASK(32); +static struct isi_platform_data isi_data; + +struct resource isi_resources[] = { + [0] = { + .start = AT91SAM9G45_BASE_ISI, + .end = AT91SAM9G45_BASE_ISI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9G45_ID_ISI, + .end = AT91SAM9G45_ID_ISI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9g45_isi_device = { + .name = "atmel_isi", + .id = 0, + .dev = { + .dma_mask = &isi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &isi_data, + }, + .resource = isi_resources, + .num_resources = ARRAY_SIZE(isi_resources), +}; + +static struct clk_lookup isi_mck_lookups[] = { + CLKDEV_CON_DEV_ID("isi_mck", "atmel_isi.0", NULL), +}; + +void __init at91_add_device_isi(struct isi_platform_data *data, + bool use_pck_as_mck) +{ + struct clk *pck; + struct clk *parent; + + if (!data) + return; + isi_data = *data; + + at91_set_A_periph(AT91_PIN_PB20, 0); /* ISI_D0 */ + at91_set_A_periph(AT91_PIN_PB21, 0); /* ISI_D1 */ + at91_set_A_periph(AT91_PIN_PB22, 0); /* ISI_D2 */ + at91_set_A_periph(AT91_PIN_PB23, 0); /* ISI_D3 */ + at91_set_A_periph(AT91_PIN_PB24, 0); /* ISI_D4 */ + at91_set_A_periph(AT91_PIN_PB25, 0); /* ISI_D5 */ + at91_set_A_periph(AT91_PIN_PB26, 0); /* ISI_D6 */ + at91_set_A_periph(AT91_PIN_PB27, 0); /* ISI_D7 */ + at91_set_A_periph(AT91_PIN_PB28, 0); /* ISI_PCK */ + at91_set_A_periph(AT91_PIN_PB30, 0); /* ISI_HSYNC */ + at91_set_A_periph(AT91_PIN_PB29, 0); /* ISI_VSYNC */ + at91_set_B_periph(AT91_PIN_PB8, 0); /* ISI_PD8 */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* ISI_PD9 */ + at91_set_B_periph(AT91_PIN_PB10, 0); /* ISI_PD10 */ + at91_set_B_periph(AT91_PIN_PB11, 0); /* ISI_PD11 */ + + platform_device_register(&at91sam9g45_isi_device); + + if (use_pck_as_mck) { + at91_set_B_periph(AT91_PIN_PB31, 0); /* ISI_MCK (PCK1) */ + + pck = clk_get(NULL, "pck1"); + parent = clk_get(NULL, "plla"); + + BUG_ON(IS_ERR(pck) || IS_ERR(parent)); + + if (clk_set_parent(pck, parent)) { + pr_err("Failed to set PCK's parent\n"); + } else { + /* Register PCK as ISI_MCK */ + isi_mck_lookups[0].clk = pck; + clkdev_add_table(isi_mck_lookups, + ARRAY_SIZE(isi_mck_lookups)); + } + + clk_put(pck); + clk_put(parent); + } +} +#else +void __init at91_add_device_isi(struct isi_platform_data *data, + bool use_pck_as_mck) {} +#endif + /* -------------------------------------------------------------------- * LCD Controller @@ -1098,6 +1194,8 @@ static struct resource rtt_resources[] = { .start = AT91SAM9G45_BASE_RTT, .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_MEM, } }; @@ -1105,11 +1203,32 @@ static struct platform_device at91sam9g45_rtt_device = { .name = "at91_rtt", .id = 0, .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), }; +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9) +static void __init at91_add_device_rtt_rtc(void) +{ + at91sam9g45_rtt_device.name = "rtc-at91sam9"; + /* + * The second resource is needed: + * GPBR will serve as the storage for RTC time offset + */ + at91sam9g45_rtt_device.num_resources = 2; + rtt_resources[1].start = AT91SAM9G45_BASE_GPBR + + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR; + rtt_resources[1].end = rtt_resources[1].start + 3; +} +#else +static void __init at91_add_device_rtt_rtc(void) +{ + /* Only one resource is needed: RTT not used as RTC */ + at91sam9g45_rtt_device.num_resources = 1; +} +#endif + static void __init at91_add_device_rtt(void) { + at91_add_device_rtt_rtc(); platform_device_register(&at91sam9g45_rtt_device); } @@ -1564,7 +1683,6 @@ static inline void configure_usart3_pins(unsigned pins) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S index 0468be10980b..9d457182c86c 100644 --- a/arch/arm/mach-at91/at91sam9g45_reset.S +++ b/arch/arm/mach-at91/at91sam9g45_reset.S @@ -12,7 +12,7 @@ #include <linux/linkage.h> #include <mach/hardware.h> -#include <mach/at91sam9_ddrsdr.h> +#include <mach/at91_ramc.h> #include <mach/at91_rstc.h> .arm @@ -20,9 +20,10 @@ .globl at91sam9g45_restart at91sam9g45_restart: - ldr r0, .at91_va_base_sdramc0 @ preload constants - ldr r1, =at91_rstc_base - ldr r1, [r1] + ldr r5, =at91_ramc_base @ preload constants + ldr r0, [r5] + ldr r4, =at91_rstc_base + ldr r1, [r4] mov r2, #1 mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN @@ -35,6 +36,3 @@ at91sam9g45_restart: str r4, [r1, #AT91_RSTC_CR] @ reset processor b . - -.at91_va_base_sdramc0: - .word AT91_VA_BASE_SYS + AT91_DDRSDRC0 diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index d2c91a841cb8..63d9372eb18e 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -11,6 +11,7 @@ #include <linux/module.h> +#include <asm/proc-fns.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -287,12 +288,15 @@ static void __init at91sam9rl_ioremap_registers(void) { at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC); + at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512); at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); + at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX); } static void __init at91sam9rl_initialize(void) { + arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 61908dce9784..eda72e83037d 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -20,6 +20,7 @@ #include <mach/board.h> #include <mach/at91sam9rl.h> #include <mach/at91sam9rl_matrix.h> +#include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> #include <mach/at_hdmac.h> @@ -33,10 +34,6 @@ #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) static u64 hdmac_dmamask = DMA_BIT_MASK(32); -static struct at_dma_platform_data atdma_pdata = { - .nr_channels = 2, -}; - static struct resource hdmac_resources[] = { [0] = { .start = AT91SAM9RL_BASE_DMA, @@ -51,12 +48,11 @@ static struct resource hdmac_resources[] = { }; static struct platform_device at_hdmac_device = { - .name = "at_hdmac", + .name = "at91sam9rl_dma", .id = -1, .dev = { .dma_mask = &hdmac_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &atdma_pdata, }, .resource = hdmac_resources, .num_resources = ARRAY_SIZE(hdmac_resources), @@ -64,7 +60,6 @@ static struct platform_device at_hdmac_device = { void __init at91_add_device_hdmac(void) { - dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); platform_device_register(&at_hdmac_device); } #else @@ -271,8 +266,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) if (!data) return; - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); + at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -688,6 +683,8 @@ static struct resource rtt_resources[] = { .start = AT91SAM9RL_BASE_RTT, .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_MEM, } }; @@ -695,11 +692,32 @@ static struct platform_device at91sam9rl_rtt_device = { .name = "at91_rtt", .id = 0, .resource = rtt_resources, - .num_resources = ARRAY_SIZE(rtt_resources), }; +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9) +static void __init at91_add_device_rtt_rtc(void) +{ + at91sam9rl_rtt_device.name = "rtc-at91sam9"; + /* + * The second resource is needed: + * GPBR will serve as the storage for RTC time offset + */ + at91sam9rl_rtt_device.num_resources = 2; + rtt_resources[1].start = AT91SAM9RL_BASE_GPBR + + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR; + rtt_resources[1].end = rtt_resources[1].start + 3; +} +#else +static void __init at91_add_device_rtt_rtc(void) +{ + /* Only one resource is needed: RTT not used as RTC */ + at91sam9rl_rtt_device.num_resources = 1; +} +#endif + static void __init at91_add_device_rtt(void) { + at91_add_device_rtt_rtc(); platform_device_register(&at91sam9rl_rtt_device); } @@ -1134,7 +1152,6 @@ static inline void configure_usart3_pins(unsigned pins) } static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ -struct platform_device *atmel_default_console_device; /* the serial console device */ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c new file mode 100644 index 000000000000..d17d4262665b --- /dev/null +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -0,0 +1,370 @@ +/* + * Chip-specific setup code for the AT91SAM9x5 family + * + * Copyright (C) 2010-2012 Atmel Corporation. + * + * Licensed under GPLv2 or later. + */ + +#include <linux/module.h> +#include <linux/dma-mapping.h> + +#include <asm/irq.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/at91sam9x5.h> +#include <mach/at91_pmc.h> +#include <mach/cpu.h> +#include <mach/board.h> + +#include "soc.h" +#include "generic.h" +#include "clock.h" +#include "sam9_smc.h" + +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ + +/* + * The peripheral clocks. + */ +static struct clk pioAB_clk = { + .name = "pioAB_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PIOAB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioCD_clk = { + .name = "pioCD_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PIOCD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk smd_clk = { + .name = "smd_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SMD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART2, + .type = CLK_TYPE_PERIPHERAL, +}; +/* USART3 clock - Only for sam9g25/sam9x25 */ +static struct clk usart3_clk = { + .name = "usart3_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART3, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi0_clk = { + .name = "twi0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi1_clk = { + .name = "twi1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi2_clk = { + .name = "twi2_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc0_clk = { + .name = "mci0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_MCI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi0_clk = { + .name = "spi0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SPI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi1_clk = { + .name = "spi1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uart0_clk = { + .name = "uart0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UART0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uart1_clk = { + .name = "uart1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UART1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tcb0_clk = { + .name = "tcb0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TCB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pwm_clk = { + .name = "pwm_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PWM, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk adc_clk = { + .name = "adc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_ADC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma0_clk = { + .name = "dma0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_DMA0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma1_clk = { + .name = "dma1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_DMA1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uhphs_clk = { + .name = "uhphs_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UHPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk udphs_clk = { + .name = "udphs_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +/* emac0 clock - Only for sam9g25/sam9x25/sam9g35/sam9x35 */ +static struct clk macb0_clk = { + .name = "pclk", + .pmc_mask = 1 << AT91SAM9X5_ID_EMAC0, + .type = CLK_TYPE_PERIPHERAL, +}; +/* lcd clock - Only for sam9g15/sam9g35/sam9x35 */ +static struct clk lcdc_clk = { + .name = "lcdc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_LCDC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* isi clock - Only for sam9g25 */ +static struct clk isi_clk = { + .name = "isi_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_ISI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc1_clk = { + .name = "mci1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_MCI1, + .type = CLK_TYPE_PERIPHERAL, +}; +/* emac1 clock - Only for sam9x25 */ +static struct clk macb1_clk = { + .name = "pclk", + .pmc_mask = 1 << AT91SAM9X5_ID_EMAC1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc_clk = { + .name = "ssc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SSC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* can0 clock - Only for sam9x35 */ +static struct clk can0_clk = { + .name = "can0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_CAN0, + .type = CLK_TYPE_PERIPHERAL, +}; +/* can1 clock - Only for sam9x35 */ +static struct clk can1_clk = { + .name = "can1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_CAN1, + .type = CLK_TYPE_PERIPHERAL, +}; + +static struct clk *periph_clocks[] __initdata = { + &pioAB_clk, + &pioCD_clk, + &smd_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, + &twi0_clk, + &twi1_clk, + &twi2_clk, + &mmc0_clk, + &spi0_clk, + &spi1_clk, + &uart0_clk, + &uart1_clk, + &tcb0_clk, + &pwm_clk, + &adc_clk, + &dma0_clk, + &dma1_clk, + &uhphs_clk, + &udphs_clk, + &mmc1_clk, + &ssc_clk, + // irq0 +}; + +static struct clk_lookup periph_clocks_lookups[] = { + /* lookup table for DT entries */ + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), + CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk), + CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk), + CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk), + CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), + CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), + CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), + CLKDEV_CON_ID("pioA", &pioAB_clk), + CLKDEV_CON_ID("pioB", &pioAB_clk), + CLKDEV_CON_ID("pioC", &pioCD_clk), + CLKDEV_CON_ID("pioD", &pioCD_clk), + /* additional fake clock for macb_hclk */ + CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk), + CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk), +}; + +/* + * The two programmable clocks. + * You must configure pin multiplexing to bring these signals out. + */ +static struct clk pck0 = { + .name = "pck0", + .pmc_mask = AT91_PMC_PCK0, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 0, +}; +static struct clk pck1 = { + .name = "pck1", + .pmc_mask = AT91_PMC_PCK1, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; + +static void __init at91sam9x5_register_clocks(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) + clk_register(periph_clocks[i]); + + clkdev_add_table(periph_clocks_lookups, + ARRAY_SIZE(periph_clocks_lookups)); + + if (cpu_is_at91sam9g25() + || cpu_is_at91sam9x25()) + clk_register(&usart3_clk); + + if (cpu_is_at91sam9g25() + || cpu_is_at91sam9x25() + || cpu_is_at91sam9g35() + || cpu_is_at91sam9x35()) + clk_register(&macb0_clk); + + if (cpu_is_at91sam9g15() + || cpu_is_at91sam9g35() + || cpu_is_at91sam9x35()) + clk_register(&lcdc_clk); + + if (cpu_is_at91sam9g25()) + clk_register(&isi_clk); + + if (cpu_is_at91sam9x25()) + clk_register(&macb1_clk); + + if (cpu_is_at91sam9x25() + || cpu_is_at91sam9x35()) { + clk_register(&can0_clk); + clk_register(&can1_clk); + } + + clk_register(&pck0); + clk_register(&pck1); +} + +/* -------------------------------------------------------------------- + * AT91SAM9x5 processor initialization + * -------------------------------------------------------------------- */ + +static void __init at91sam9x5_map_io(void) +{ + at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); +} + +static void __init at91sam9x5_ioremap_registers(void) +{ + if (of_at91sam926x_pit_init() < 0) + panic("Impossible to find PIT\n"); + at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512); +} + +void __init at91sam9x5_initialize(void) +{ + arm_pm_restart = at91sam9g45_restart; + at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); + + /* Register GPIO subsystem (using DT) */ + at91_gpio_init(NULL, 0); +} + +/* -------------------------------------------------------------------- + * AT91SAM9x5 devices (temporary before modification of code) + * -------------------------------------------------------------------- */ +void __init at91_add_device_nand(struct atmel_nand_data *data) {} + +/* -------------------------------------------------------------------- + * Interrupt initialization + * -------------------------------------------------------------------- */ +/* + * The default interrupt priority levels (0 = lowest, 7 = highest). + */ +static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller (FIQ) */ + 7, /* System Peripherals */ + 1, /* Parallel IO Controller A and B */ + 1, /* Parallel IO Controller C and D */ + 4, /* Soft Modem */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ + 5, /* USART 3 */ + 6, /* Two-Wire Interface 0 */ + 6, /* Two-Wire Interface 1 */ + 6, /* Two-Wire Interface 2 */ + 0, /* Multimedia Card Interface 0 */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 5, /* UART 0 */ + 5, /* UART 1 */ + 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ + 0, /* Pulse Width Modulation Controller */ + 0, /* ADC Controller */ + 0, /* DMA Controller 0 */ + 0, /* DMA Controller 1 */ + 2, /* USB Host High Speed port */ + 2, /* USB Device High speed port */ + 3, /* Ethernet MAC 0 */ + 3, /* LDC Controller or Image Sensor Interface */ + 0, /* Multimedia Card Interface 1 */ + 3, /* Ethernet MAC 1 */ + 4, /* Synchronous Serial Interface */ + 4, /* CAN Controller 0 */ + 4, /* CAN Controller 1 */ + 0, /* Advanced Interrupt Controller (IRQ0) */ +}; + +struct at91_init_soc __initdata at91sam9x5_soc = { + .map_io = at91sam9x5_map_io, + .default_irq_priority = at91sam9x5_default_irq_priority, + .ioremap_registers = at91sam9x5_ioremap_registers, + .register_clocks = at91sam9x5_register_clocks, + .init = at91sam9x5_initialize, +}; diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 56ba3bd035ae..5400a1d65035 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -13,6 +13,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/irq.h> +#include <asm/proc-fns.h> #include <asm/mach/arch.h> #include <mach/at91x40.h> #include <mach/at91_st.h> @@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk) return AT91X40_MASTER_CLOCK; } +static void at91x40_idle(void) +{ + /* + * Disable the processor clock. The processor will be automatically + * re-enabled by an interrupt or by a reset. + */ + __raw_writel(AT91_PS_CR_CPU, AT91_PS_CR); + cpu_do_idle(); +} + void __init at91x40_initialize(unsigned long main_clock) { + arm_pm_idle = at91x40_idle; at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | (1 << AT91X40_ID_IRQ2); } diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index dfff2895f4b2..6ca680a1d5d1 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c @@ -28,6 +28,12 @@ #include <asm/mach/time.h> #include <mach/at91_tc.h> +#define at91_tc_read(field) \ + __raw_readl(AT91_TC + field) + +#define at91_tc_write(field, value) \ + __raw_writel(value, AT91_TC + field); + /* * 3 counter/timer units present. */ @@ -37,12 +43,12 @@ static unsigned long at91x40_gettimeoffset(void) { - return (at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128)); + return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128)); } static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) { - at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_SR); + at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR); timer_tick(); return IRQ_HANDLED; } @@ -57,20 +63,20 @@ void __init at91x40_timer_init(void) { unsigned int v; - at91_sys_write(AT91_TC + AT91_TC_BCR, 0); - v = at91_sys_read(AT91_TC + AT91_TC_BMR); + at91_tc_write(AT91_TC_BCR, 0); + v = at91_tc_read(AT91_TC_BMR); v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE; - at91_sys_write(AT91_TC + AT91_TC_BMR, v); + at91_tc_write(AT91_TC_BMR, v); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG)); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4)); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG)); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4)); setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq); - at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN)); + at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN)); } struct sys_timer at91x40_timer = { diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c deleted file mode 100644 index ac3de4f7c31d..000000000000 --- a/arch/arm/mach-at91/board-cap9adk.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * linux/arch/arm/mach-at91/board-cap9adk.c - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2005 SAN People - * Copyright (C) 2007 Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/types.h> -#include <linux/gpio.h> -#include <linux/init.h> -#include <linux/mm.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> -#include <linux/fb.h> -#include <linux/mtd/physmap.h> - -#include <video/atmel_lcdc.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <mach/board.h> -#include <mach/at91cap9_matrix.h> -#include <mach/at91sam9_smc.h> -#include <mach/system_rev.h> - -#include "sam9_smc.h" -#include "generic.h" - - -static void __init cap9adk_init_early(void) -{ - /* Initialize processor: 12 MHz crystal */ - at91_initialize(12000000); - - /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */ - at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11); - /* ... POWER LED always on */ - at91_set_gpio_output(AT91_PIN_PC29, 1); - - /* Setup the serial ports and console */ - at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */ - at91_set_serial_console(0); -} - -/* - * USB Host port - */ -static struct at91_usbh_data __initdata cap9adk_usbh_data = { - .ports = 2, - .vbus_pin = {-EINVAL, -EINVAL}, - .overcurrent_pin= {-EINVAL, -EINVAL}, -}; - -/* - * USB HS Device port - */ -static struct usba_platform_data __initdata cap9adk_usba_udc_data = { - .vbus_pin = AT91_PIN_PB31, -}; - -/* - * ADS7846 Touchscreen - */ -#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) -static int ads7843_pendown_state(void) -{ - return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */ -} - -static struct ads7846_platform_data ads_info = { - .model = 7843, - .x_min = 150, - .x_max = 3830, - .y_min = 190, - .y_max = 3830, - .vref_delay_usecs = 100, - .x_plate_ohms = 450, - .y_plate_ohms = 250, - .pressure_max = 15000, - .debounce_max = 1, - .debounce_rep = 0, - .debounce_tol = (~0), - .get_pendown_state = ads7843_pendown_state, -}; - -static void __init cap9adk_add_device_ts(void) -{ - at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */ - at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */ -} -#else -static void __init cap9adk_add_device_ts(void) {} -#endif - - -/* - * SPI devices. - */ -static struct spi_board_info cap9adk_spi_devices[] = { -#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) - { /* DataFlash card */ - .modalias = "mtd_dataflash", - .chip_select = 0, - .max_speed_hz = 15 * 1000 * 1000, - .bus_num = 0, - }, -#endif -#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) - { - .modalias = "ads7846", - .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */ - .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ - .bus_num = 0, - .platform_data = &ads_info, - .irq = AT91_PIN_PC4, - }, -#endif -}; - - -/* - * MCI (SD/MMC) - */ -static struct at91_mmc_data __initdata cap9adk_mmc_data = { - .wire4 = 1, - .det_pin = -EINVAL, - .wp_pin = -EINVAL, - .vcc_pin = -EINVAL, -}; - - -/* - * MACB Ethernet device - */ -static struct macb_platform_data __initdata cap9adk_macb_data = { - .phy_irq_pin = -EINVAL, - .is_rmii = 1, -}; - - -/* - * NAND flash - */ -static struct mtd_partition __initdata cap9adk_nand_partitions[] = { - { - .name = "NAND partition", - .offset = 0, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct atmel_nand_data __initdata cap9adk_nand_data = { - .ale = 21, - .cle = 22, - .det_pin = -EINVAL, - .rdy_pin = -EINVAL, - .enable_pin = AT91_PIN_PD15, - .parts = cap9adk_nand_partitions, - .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), -}; - -static struct sam9_smc_config __initdata cap9adk_nand_smc_config = { - .ncs_read_setup = 1, - .nrd_setup = 2, - .ncs_write_setup = 1, - .nwe_setup = 2, - - .ncs_read_pulse = 6, - .nrd_pulse = 4, - .ncs_write_pulse = 6, - .nwe_pulse = 4, - - .read_cycle = 8, - .write_cycle = 8, - - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, - .tdf_cycles = 1, -}; - -static void __init cap9adk_add_device_nand(void) -{ - unsigned long csa; - - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); - - cap9adk_nand_data.bus_width_16 = board_have_nand_16bit(); - /* setup bus-width (8 or 16) */ - if (cap9adk_nand_data.bus_width_16) - cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; - else - cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; - - /* configure chip-select 3 (NAND) */ - sam9_smc_configure(0, 3, &cap9adk_nand_smc_config); - - at91_add_device_nand(&cap9adk_nand_data); -} - - -/* - * NOR flash - */ -static struct mtd_partition cap9adk_nor_partitions[] = { - { - .name = "NOR partition", - .offset = 0, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data cap9adk_nor_data = { - .width = 2, - .parts = cap9adk_nor_partitions, - .nr_parts = ARRAY_SIZE(cap9adk_nor_partitions), -}; - -#define NOR_BASE AT91_CHIPSELECT_0 -#define NOR_SIZE SZ_8M - -static struct resource nor_flash_resources[] = { - { - .start = NOR_BASE, - .end = NOR_BASE + NOR_SIZE - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device cap9adk_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &cap9adk_nor_data, - }, - .resource = nor_flash_resources, - .num_resources = ARRAY_SIZE(nor_flash_resources), -}; - -static struct sam9_smc_config __initdata cap9adk_nor_smc_config = { - .ncs_read_setup = 2, - .nrd_setup = 4, - .ncs_write_setup = 2, - .nwe_setup = 4, - - .ncs_read_pulse = 10, - .nrd_pulse = 8, - .ncs_write_pulse = 10, - .nwe_pulse = 8, - - .read_cycle = 16, - .write_cycle = 16, - - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16, - .tdf_cycles = 1, -}; - -static __init void cap9adk_add_device_nor(void) -{ - unsigned long csa; - - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); - - /* configure chip-select 0 (NOR) */ - sam9_smc_configure(0, 0, &cap9adk_nor_smc_config); - - platform_device_register(&cap9adk_nor_flash); -} - - -/* - * LCD Controller - */ -#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) -static struct fb_videomode at91_tft_vga_modes[] = { - { - .name = "TX09D50VM1CCA @ 60", - .refresh = 60, - .xres = 240, .yres = 320, - .pixclock = KHZ2PICOS(4965), - - .left_margin = 1, .right_margin = 33, - .upper_margin = 1, .lower_margin = 0, - .hsync_len = 5, .vsync_len = 1, - - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, -}; - -static struct fb_monspecs at91fb_default_monspecs = { - .manufacturer = "HIT", - .monitor = "TX09D70VM1CCA", - - .modedb = at91_tft_vga_modes, - .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), - .hfmin = 15000, - .hfmax = 64000, - .vfmin = 50, - .vfmax = 150, -}; - -#define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ - | ATMEL_LCDC_DISTYPE_TFT \ - | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) - -static void at91_lcdc_power_control(int on) -{ - if (on) - at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ - else - at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ -} - -/* Driver datas */ -static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = { - .default_bpp = 16, - .default_dmacon = ATMEL_LCDC_DMAEN, - .default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2, - .default_monspecs = &at91fb_default_monspecs, - .atmel_lcdfb_power_control = at91_lcdc_power_control, - .guard_time = 1, -}; - -#else -static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; -#endif - - -/* - * AC97 - */ -static struct ac97c_platform_data cap9adk_ac97_data = { - .reset_pin = -EINVAL, -}; - - -static void __init cap9adk_board_init(void) -{ - /* Serial */ - at91_add_device_serial(); - /* USB Host */ - at91_add_device_usbh(&cap9adk_usbh_data); - /* USB HS */ - at91_add_device_usba(&cap9adk_usba_udc_data); - /* SPI */ - at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); - /* Touchscreen */ - cap9adk_add_device_ts(); - /* MMC */ - at91_add_device_mmc(1, &cap9adk_mmc_data); - /* Ethernet */ - at91_add_device_eth(&cap9adk_macb_data); - /* NAND */ - cap9adk_add_device_nand(); - /* NOR Flash */ - cap9adk_add_device_nor(); - /* I2C */ - at91_add_device_i2c(NULL, 0); - /* LCD Controller */ - at91_add_device_lcdc(&cap9adk_lcdc_data); - /* AC97 */ - at91_add_device_ac97(&cap9adk_ac97_data); -} - -MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") - /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, - .init_early = cap9adk_init_early, - .init_irq = at91_init_irq_default, - .init_machine = cap9adk_board_init, -MACHINE_END diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 9ab3d1ea326d..989e1c5a9ca0 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -43,6 +43,7 @@ #include <mach/board.h> #include <mach/at91sam9_smc.h> #include <mach/at91sam9260_matrix.h> +#include <mach/at91_matrix.h> #include "sam9_smc.h" #include "generic.h" @@ -238,8 +239,8 @@ static __init void cpu9krea_add_device_nor(void) { unsigned long csa; - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); + csa = at91_matrix_read(AT91_MATRIX_EBICSA); + at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); /* configure chip-select 0 (NOR) */ sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config); diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 368e1427ad99..e094cc81fe25 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -38,6 +38,7 @@ #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include <mach/cpu.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index bb6b434ec0c1..08c8ad8609b7 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c @@ -38,12 +38,6 @@ static void __init ek_init_early(void) { /* Initialize processor: 12.000 MHz crystal */ at91_initialize(12000000); - - /* DGBU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* set serial console to ttyS0 (ie, DBGU) */ - at91_set_serial_console(0); } /* det_pin is not connected */ @@ -109,6 +103,7 @@ static void __init at91_dt_device_init(void) static const char *at91_dt_board_compat[] __initdata = { "atmel,at91sam9m10g45ek", + "atmel,at91sam9x5ek", "calao,usb-a9g20", NULL }; diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 07ef35b0ec2c..f23aabef8551 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -26,6 +26,7 @@ #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include <mach/cpu.h> #include "generic.h" @@ -110,7 +111,7 @@ static void __init eco920_board_init(void) at91_add_device_mmc(0, &eco920_mmc_data); platform_device_register(&eco920_flash); - at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1) + at91_ramc_write(0, AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1) | AT91_SMC_RWSETUP_(1) | AT91_SMC_DBW_8 | AT91_SMC_WSEN @@ -122,7 +123,7 @@ static void __init eco920_board_init(void) at91_set_deglitch(AT91_PIN_PA23, 1); /* Initialization of the Static Memory Controller for Chip Select 3 */ - at91_sys_write(AT91_SMC_CSR(3), + at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_DBW_16 | /* 16 bit */ AT91_SMC_WSEN | AT91_SMC_NWS_(5) | /* wait states */ diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index eec02cd57ced..1815152001f7 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-at91/board-flexibity.c * - * Copyright (C) 2010 Flexibity + * Copyright (C) 2010-2011 Flexibity * Copyright (C) 2005 SAN People * Copyright (C) 2006 Atmel * @@ -62,6 +62,13 @@ static struct at91_udc_data __initdata flexibity_udc_data = { .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; +/* I2C devices */ +static struct i2c_board_info __initdata flexibity_i2c_devices[] = { + { + I2C_BOARD_INFO("ds1307", 0x68), + }, +}; + /* SPI devices */ static struct spi_board_info flexibity_spi_devices[] = { { /* DataFlash chip */ @@ -141,6 +148,9 @@ static void __init flexibity_board_init(void) at91_add_device_usbh(&flexibity_usbh_data); /* USB Device */ at91_add_device_udc(&flexibity_udc_data); + /* I2C */ + at91_add_device_i2c(flexibity_i2c_devices, + ARRAY_SIZE(flexibity_i2c_devices)); /* SPI */ at91_add_device_spi(flexibity_spi_devices, ARRAY_SIZE(flexibity_spi_devices)); diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index d75a4a2ad9c2..bb9914582013 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -38,6 +38,7 @@ #include <mach/board.h> #include <mach/cpu.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index ab024fa11d5c..59e35dd14863 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -39,6 +39,7 @@ #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 782f37946af5..9083df04e7ed 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c @@ -41,6 +41,7 @@ #include <mach/hardware.h> #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index ef7c12a92246..11cbaa8946fe 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c @@ -41,6 +41,7 @@ #include <mach/hardware.h> #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include "generic.h" diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index ea0d1b9c2b7b..57497e2b8878 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -24,11 +24,13 @@ #include <linux/gpio_keys.h> #include <linux/input.h> #include <linux/leds.h> -#include <linux/clk.h> #include <linux/atmel-mci.h> +#include <linux/delay.h> #include <mach/hardware.h> #include <video/atmel_lcdc.h> +#include <media/soc_camera.h> +#include <media/atmel-isi.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -185,6 +187,71 @@ static void __init ek_add_device_nand(void) /* + * ISI + */ +static struct isi_platform_data __initdata isi_data = { + .frate = ISI_CFG1_FRATE_CAPTURE_ALL, + /* to use codec and preview path simultaneously */ + .full_mode = 1, + .data_width_flags = ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10, + /* ISI_MCK is provided by programmable clock or external clock */ + .mck_hz = 25000000, +}; + + +/* + * soc-camera OV2640 + */ +#if defined(CONFIG_SOC_CAMERA_OV2640) || \ + defined(CONFIG_SOC_CAMERA_OV2640_MODULE) +static unsigned long isi_camera_query_bus_param(struct soc_camera_link *link) +{ + /* ISI board for ek using default 8-bits connection */ + return SOCAM_DATAWIDTH_8; +} + +static int i2c_camera_power(struct device *dev, int on) +{ + /* enable or disable the camera */ + pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE"); + at91_set_gpio_output(AT91_PIN_PD13, !on); + + if (!on) + goto out; + + /* If enabled, give a reset impulse */ + at91_set_gpio_output(AT91_PIN_PD12, 0); + msleep(20); + at91_set_gpio_output(AT91_PIN_PD12, 1); + msleep(100); + +out: + return 0; +} + +static struct i2c_board_info i2c_camera = { + I2C_BOARD_INFO("ov2640", 0x30), +}; + +static struct soc_camera_link iclink_ov2640 = { + .bus_id = 0, + .board_info = &i2c_camera, + .i2c_adapter_id = 0, + .power = i2c_camera_power, + .query_bus_param = isi_camera_query_bus_param, +}; + +static struct platform_device isi_ov2640 = { + .name = "soc-camera-pdrv", + .id = 0, + .dev = { + .platform_data = &iclink_ov2640, + }, +}; +#endif + + +/* * LCD Controller */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) @@ -377,7 +444,12 @@ static struct gpio_led ek_pwm_led[] = { #endif }; - +static struct platform_device *devices[] __initdata = { +#if defined(CONFIG_SOC_CAMERA_OV2640) || \ + defined(CONFIG_SOC_CAMERA_OV2640_MODULE) + &isi_ov2640, +#endif +}; static void __init ek_board_init(void) { @@ -399,6 +471,8 @@ static void __init ek_board_init(void) ek_add_device_nand(); /* I2C */ at91_add_device_i2c(0, NULL, 0); + /* ISI, using programmable clock as ISI_MCK */ + at91_add_device_isi(&isi_data, true); /* LCD Controller */ at91_add_device_lcdc(&ek_lcdc_data); /* Touch Screen */ @@ -410,6 +484,8 @@ static void __init ek_board_init(void) /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led)); + /* Other platform devices */ + platform_add_devices(devices, ARRAY_SIZE(devices)); } MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index bbd553e1cd93..52f460768f71 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -45,6 +45,7 @@ #include <mach/hardware.h> #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> #include <mach/cpu.h> #include "generic.h" @@ -393,7 +394,7 @@ static void yl9200_init_video(void) at91_set_A_periph(AT91_PIN_PC6, 0); /* Initialization of the Static Memory Controller for Chip Select 2 */ - at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */ + at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */ | AT91_SMC_WSEN | AT91_SMC_NWS_(0x4) /* wait states */ | AT91_SMC_TDF_(0x100) /* float time */ ); diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 61873f3aa92d..be51ca7f694d 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -28,9 +28,12 @@ #include <mach/at91_pmc.h> #include <mach/cpu.h> +#include <asm/proc-fns.h> + #include "clock.h" #include "generic.h" +void __iomem *at91_pmc_base; /* * There's a lot more which can be done with clocks, including cpufreq @@ -47,26 +50,38 @@ /* * Chips have some kind of clocks : group them by functionality */ -#define cpu_has_utmi() ( cpu_is_at91cap9() \ - || cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45()) +#define cpu_has_utmi() ( cpu_is_at91sam9rl() \ + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ - || cpu_is_at91sam9g45()) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45())) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5())) -#define cpu_has_upll() (cpu_is_at91sam9g45()) +#define cpu_has_upll() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) /* USB host HS & FS */ #define cpu_has_uhp() (!cpu_is_at91sam9rl()) /* USB device FS only */ #define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45())) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5())) + +#define cpu_has_plladiv2() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) + +#define cpu_has_mdiv3() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) + +#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5()) static LIST_HEAD(clocks); static DEFINE_SPINLOCK(clk_lock); @@ -111,11 +126,11 @@ static void pllb_mode(struct clk *clk, int is_on) value = 0; // REVISIT: Add work-around for AT91RM9200 Errata #26 ? - at91_sys_write(AT91_CKGR_PLLBR, value); + at91_pmc_write(AT91_CKGR_PLLBR, value); do { cpu_relax(); - } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on); + } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on); } static struct clk pllb = { @@ -130,31 +145,24 @@ static struct clk pllb = { static void pmc_sys_mode(struct clk *clk, int is_on) { if (is_on) - at91_sys_write(AT91_PMC_SCER, clk->pmc_mask); + at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask); else - at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask); + at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask); } static void pmc_uckr_mode(struct clk *clk, int is_on) { - unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR); - - if (cpu_is_at91sam9g45()) { - if (is_on) - uckr |= AT91_PMC_BIASEN; - else - uckr &= ~AT91_PMC_BIASEN; - } + unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); if (is_on) { is_on = AT91_PMC_LOCKU; - at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask); + at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask); } else - at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask)); + at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask)); do { cpu_relax(); - } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on); + } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on); } /* USB function clocks (PLLB must be 48 MHz) */ @@ -190,9 +198,9 @@ struct clk mck = { static void pmc_periph_mode(struct clk *clk, int is_on) { if (is_on) - at91_sys_write(AT91_PMC_PCER, clk->pmc_mask); + at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask); else - at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask); + at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask); } static struct clk __init *at91_css_to_clk(unsigned long css) @@ -210,11 +218,24 @@ static struct clk __init *at91_css_to_clk(unsigned long css) return &utmi_clk; else if (cpu_has_pllb()) return &pllb; + break; + /* alternate PMC: can use master clock */ + case AT91_PMC_CSS_MASTER: + return &mck; } return NULL; } +static int pmc_prescaler_divider(u32 reg) +{ + if (cpu_has_alt_prescaler()) { + return 1 << ((reg & AT91_PMC_ALT_PRES) >> PMC_ALT_PRES_OFFSET); + } else { + return 1 << ((reg & AT91_PMC_PRES) >> PMC_PRES_OFFSET); + } +} + static void __clk_enable(struct clk *clk) { if (clk->parent) @@ -316,12 +337,22 @@ int clk_set_rate(struct clk *clk, unsigned long rate) { unsigned long flags; unsigned prescale; + unsigned long prescale_offset, css_mask; unsigned long actual; if (!clk_is_programmable(clk)) return -EINVAL; if (clk->users) return -EBUSY; + + if (cpu_has_alt_prescaler()) { + prescale_offset = PMC_ALT_PRES_OFFSET; + css_mask = AT91_PMC_ALT_PCKR_CSS; + } else { + prescale_offset = PMC_PRES_OFFSET; + css_mask = AT91_PMC_CSS; + } + spin_lock_irqsave(&clk_lock, flags); actual = clk->parent->rate_hz; @@ -329,10 +360,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (actual && actual <= rate) { u32 pckr; - pckr = at91_sys_read(AT91_PMC_PCKR(clk->id)); - pckr &= AT91_PMC_CSS; /* clock selection */ - pckr |= prescale << 2; - at91_sys_write(AT91_PMC_PCKR(clk->id), pckr); + pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id)); + pckr &= css_mask; /* keep clock selection */ + pckr |= prescale << prescale_offset; + at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr); clk->rate_hz = actual; break; } @@ -366,7 +397,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent) clk->rate_hz = parent->rate_hz; clk->parent = parent; - at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id); + at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id); spin_unlock_irqrestore(&clk_lock, flags); return 0; @@ -378,11 +409,17 @@ static void __init init_programmable_clock(struct clk *clk) { struct clk *parent; u32 pckr; + unsigned int css_mask; + + if (cpu_has_alt_prescaler()) + css_mask = AT91_PMC_ALT_PCKR_CSS; + else + css_mask = AT91_PMC_CSS; - pckr = at91_sys_read(AT91_PMC_PCKR(clk->id)); - parent = at91_css_to_clk(pckr & AT91_PMC_CSS); + pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id)); + parent = at91_css_to_clk(pckr & css_mask); clk->parent = parent; - clk->rate_hz = parent->rate_hz / (1 << ((pckr & AT91_PMC_PRES) >> 2)); + clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr); } #endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */ @@ -396,19 +433,24 @@ static int at91_clk_show(struct seq_file *s, void *unused) u32 scsr, pcsr, uckr = 0, sr; struct clk *clk; - seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR)); - seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR)); - seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR)); - seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR)); - seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR)); + scsr = at91_pmc_read(AT91_PMC_SCSR); + pcsr = at91_pmc_read(AT91_PMC_PCSR); + sr = at91_pmc_read(AT91_PMC_SR); + seq_printf(s, "SCSR = %8x\n", scsr); + seq_printf(s, "PCSR = %8x\n", pcsr); + seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR)); + seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR)); + seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR)); if (cpu_has_pllb()) - seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); - if (cpu_has_utmi()) - seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR)); - seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); + seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR)); + if (cpu_has_utmi()) { + uckr = at91_pmc_read(AT91_CKGR_UCKR); + seq_printf(s, "UCKR = %8x\n", uckr); + } + seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR)); if (cpu_has_upll()) - seq_printf(s, "USB = %8x\n", at91_sys_read(AT91_PMC_USB)); - seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); + seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB)); + seq_printf(s, "SR = %8x\n", sr); seq_printf(s, "\n"); @@ -596,16 +638,14 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) if (cpu_is_at91rm9200()) { uhpck.pmc_mask = AT91RM9200_PMC_UHP; udpck.pmc_mask = AT91RM9200_PMC_UDP; - at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); + at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { uhpck.pmc_mask = AT91SAM926x_PMC_UHP; udpck.pmc_mask = AT91SAM926x_PMC_UDP; - } else if (cpu_is_at91cap9()) { - uhpck.pmc_mask = AT91CAP9_PMC_UHP; } - at91_sys_write(AT91_CKGR_PLLBR, 0); + at91_pmc_write(AT91_CKGR_PLLBR, 0); udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); @@ -622,13 +662,13 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock) /* Setup divider by 10 to reach 48 MHz */ usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV; - at91_sys_write(AT91_PMC_USB, usbr); + at91_pmc_write(AT91_PMC_USB, usbr); /* Now set uhpck values */ uhpck.parent = &utmi_clk; uhpck.pmc_mask = AT91SAM926x_PMC_UHP; uhpck.rate_hz = utmi_clk.rate_hz; - uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); + uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); } int __init at91_clock_init(unsigned long main_clock) @@ -637,6 +677,10 @@ int __init at91_clock_init(unsigned long main_clock) int i; int pll_overclock = false; + at91_pmc_base = ioremap(AT91_PMC, 256); + if (!at91_pmc_base) + panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC); + /* * When the bootloader initialized the main oscillator correctly, * there's no problem using the cycle counter. But if it didn't, @@ -645,14 +689,14 @@ int __init at91_clock_init(unsigned long main_clock) */ if (!main_clock) { do { - tmp = at91_sys_read(AT91_CKGR_MCFR); + tmp = at91_pmc_read(AT91_CKGR_MCFR); } while (!(tmp & AT91_PMC_MAINRDY)); main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16); } main_clk.rate_hz = main_clock; /* report if PLLA is more than mildly overclocked */ - plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR)); + plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR)); if (cpu_has_300M_plla()) { if (plla.rate_hz > 300000000) pll_overclock = true; @@ -666,8 +710,8 @@ int __init at91_clock_init(unsigned long main_clock) if (pll_overclock) pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000); - if (cpu_is_at91sam9g45()) { - mckr = at91_sys_read(AT91_PMC_MCKR); + if (cpu_has_plladiv2()) { + mckr = at91_pmc_read(AT91_PMC_MCKR); plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12)); /* plla divisor by 2 */ } @@ -688,6 +732,10 @@ int __init at91_clock_init(unsigned long main_clock) * (obtain the USB High Speed 480 MHz when input is 12 MHz) */ utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz; + + /* UTMI bias and PLL are managed at the same time */ + if (cpu_has_upll()) + utmi_clk.pmc_mask |= AT91_PMC_BIASEN; } /* @@ -703,10 +751,10 @@ int __init at91_clock_init(unsigned long main_clock) * MCK and CPU derive from one of those primary clocks. * For now, assume this parentage won't change. */ - mckr = at91_sys_read(AT91_PMC_MCKR); + mckr = at91_pmc_read(AT91_PMC_MCKR); mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS); freq = mck.parent->rate_hz; - freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */ + freq /= pmc_prescaler_divider(mckr); /* prescale */ if (cpu_is_at91rm9200()) { mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } else if (cpu_is_at91sam9g20()) { @@ -714,13 +762,19 @@ int __init at91_clock_init(unsigned long main_clock) freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ if (mckr & AT91_PMC_PDIV) freq /= 2; /* processor clock division */ - } else if (cpu_is_at91sam9g45()) { + } else if (cpu_has_mdiv3()) { mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ? freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } else { mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } + if (cpu_has_alt_prescaler()) { + /* Programmable clocks can use MCK */ + mck.type |= CLK_TYPE_PRIMARY; + mck.id = 4; + } + /* Register the PMC's standard clocks */ for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) at91_clk_add(standard_pmc_clocks[i]); @@ -770,9 +824,15 @@ static int __init at91_clock_reset(void) pr_debug("Clocks: disable unused %s\n", clk->name); } - at91_sys_write(AT91_PMC_PCDR, pcdr); - at91_sys_write(AT91_PMC_SCDR, scdr); + at91_pmc_write(AT91_PMC_PCDR, pcdr); + at91_pmc_write(AT91_PMC_SCDR, scdr); return 0; } late_initcall(at91_clock_reset); + +void at91sam9_idle(void) +{ + at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); + cpu_do_idle(); +} diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index a851e6c98421..555d956b3a57 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c @@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev, { struct timeval before, after; int idle_time; - u32 saved_lpr; local_irq_disable(); do_gettimeofday(&before); if (index == 0) /* Wait for interrupt state */ cpu_do_idle(); - else if (index == 1) { - asm("b 1f; .align 5; 1:"); - asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ - saved_lpr = sdram_selfrefresh_enable(); - cpu_do_idle(); - sdram_selfrefresh_disable(saved_lpr); - } + else if (index == 1) + at91_standby(); + do_gettimeofday(&after); local_irq_enable(); idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 594133451c0c..4cad85e57470 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -28,6 +28,7 @@ extern void __init at91_aic_init(unsigned int priority[]); /* Timer */ struct sys_timer; +extern void at91rm9200_ioremap_st(u32 addr); extern struct sys_timer at91rm9200_timer; extern void at91sam926x_ioremap_pit(u32 addr); extern struct sys_timer at91sam926x_timer; @@ -45,7 +46,6 @@ extern void __init at91sam9261_set_console_clock(int id); extern void __init at91sam9263_set_console_clock(int id); extern void __init at91sam9rl_set_console_clock(int id); extern void __init at91sam9g45_set_console_clock(int id); -extern void __init at91cap9_set_console_clock(int id); #ifdef CONFIG_AT91_PMC_UNIT extern int __init at91_clock_init(unsigned long main_clock); #else @@ -57,6 +57,9 @@ struct device; extern void at91_irq_suspend(void); extern void at91_irq_resume(void); +/* idle */ +extern void at91sam9_idle(void); + /* reset */ extern void at91_ioremap_rstc(u32 base_addr); extern void at91sam9_alt_restart(char, const char *); @@ -65,6 +68,12 @@ extern void at91sam9g45_restart(char, const char *); /* shutdown */ extern void at91_ioremap_shdwc(u32 base_addr); +/* Matrix */ +extern void at91_ioremap_matrix(u32 base_addr); + +/* Ram Controler */ +extern void at91_ioremap_ramc(int id, u32 addr, u32 size); + /* GPIO */ #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h new file mode 100644 index 000000000000..02fae9de746b --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91_matrix.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Under GPLv2 + */ + +#ifndef __MACH_AT91_MATRIX_H__ +#define __MACH_AT91_MATRIX_H__ + +#ifndef __ASSEMBLY__ +extern void __iomem *at91_matrix_base; + +#define at91_matrix_read(field) \ + __raw_readl(at91_matrix_base + field) + +#define at91_matrix_write(field, value) \ + __raw_writel(value, at91_matrix_base + field); + +#else +.extern at91_matrix_base +#endif + +#endif /* __MACH_AT91_MATRIX_H__ */ diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index e46f93e34aab..36604782a78f 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -16,17 +16,27 @@ #ifndef AT91_PMC_H #define AT91_PMC_H -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ +#ifndef __ASSEMBLY__ +extern void __iomem *at91_pmc_base; -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ +#define at91_pmc_read(field) \ + __raw_readl(at91_pmc_base + field) + +#define at91_pmc_write(field, value) \ + __raw_writel(value, at91_pmc_base + field) +#else +.extern at91_aic_base +#endif + +#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ +#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */ + +#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */ #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [CAP9 revC & some SAM9 only] */ #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ #define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ @@ -36,27 +46,31 @@ #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ +#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */ +#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */ +#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */ -#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9, CAP9] */ +#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */ #define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ #define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */ -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */ +#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ +#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ +#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ +#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ +#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ +#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */ #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ #define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ +#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */ +#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */ #define AT91_PMC_DIV (0xff << 0) /* Divider */ #define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ @@ -67,27 +81,37 @@ #define AT91_PMC_USBDIV_4 (2 << 28) #define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ +#define AT91_PMC_MCKR 0x30 /* Master Clock Register */ #define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ #define AT91_PMC_CSS_SLOW (0 << 0) #define AT91_PMC_CSS_MAIN (1 << 0) #define AT91_PMC_CSS_PLLA (2 << 0) #define AT91_PMC_CSS_PLLB (3 << 0) #define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */ -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) +#define PMC_PRES_OFFSET 2 +#define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */ +#define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET) +#define PMC_ALT_PRES_OFFSET 4 +#define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */ +#define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ #define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ #define AT91RM9200_PMC_MDIV_2 (1 << 8) #define AT91RM9200_PMC_MDIV_3 (2 << 8) #define AT91RM9200_PMC_MDIV_4 (3 << 8) -#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ +#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */ #define AT91SAM9_PMC_MDIV_2 (1 << 8) #define AT91SAM9_PMC_MDIV_4 (2 << 8) #define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ @@ -99,35 +123,55 @@ #define AT91_PMC_PLLADIV2_OFF (0 << 12) #define AT91_PMC_PLLADIV2_ON (1 << 12) -#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register [some SAM9 only] */ +#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */ #define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */ #define AT91_PMC_USBS_PLLA (0 << 0) #define AT91_PMC_USBS_UPLL (1 << 0) #define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */ -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */ +#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */ +#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */ +#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */ +#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV) + +#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */ +#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */ +#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */ #define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */ #define AT91_PMC_CSSMCK_CSS (0 << 8) #define AT91_PMC_CSSMCK_MCK (1 << 8) -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ +#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */ +#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */ +#define AT91_PMC_SR 0x68 /* Status Register */ #define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9, AT91CAP9 only] */ -#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ +#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ +#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */ +#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */ +#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */ +#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */ + +#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */ +#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */ +#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */ +#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */ -#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ -#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ +#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */ +#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ +#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ -#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ +#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */ +#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ +#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */ +#define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */ +#define AT91_PMC_PCRDIV(n) (((n) << 16) & AT91_PMC_PCR_DIV) +#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h new file mode 100644 index 000000000000..d8aeb278614e --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91_ramc.h @@ -0,0 +1,32 @@ +/* + * Header file for the Atmel RAM Controller + * + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Under GPLv2 only + */ + +#ifndef __AT91_RAMC_H__ +#define __AT91_RAMC_H__ + +#ifndef __ASSEMBLY__ +extern void __iomem *at91_ramc_base[]; + +#define at91_ramc_read(id, field) \ + __raw_readl(at91_ramc_base[id] + field) + +#define at91_ramc_write(id, field, value) \ + __raw_writel(value, at91_ramc_base[id] + field) +#else +.extern at91_ramc_base +#endif + +#define AT91_MEMCTRL_MC 0 +#define AT91_MEMCTRL_SDRAMC 1 +#define AT91_MEMCTRL_DDRSDR 2 + +#include <mach/at91rm9200_sdramc.h> +#include <mach/at91sam9_ddrsdr.h> +#include <mach/at91sam9_sdramc.h> + +#endif /* __AT91_RAMC_H__ */ diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h index 8847173e4101..969aac27109f 100644 --- a/arch/arm/mach-at91/include/mach/at91_st.h +++ b/arch/arm/mach-at91/include/mach/at91_st.h @@ -16,34 +16,46 @@ #ifndef AT91_ST_H #define AT91_ST_H -#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ +#ifndef __ASSEMBLY__ +extern void __iomem *at91_st_base; + +#define at91_st_read(field) \ + __raw_readl(at91_st_base + field) + +#define at91_st_write(field, value) \ + __raw_writel(value, at91_st_base + field); +#else +.extern at91_st_base +#endif + +#define AT91_ST_CR 0x00 /* Control Register */ #define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ -#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ +#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */ #define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ -#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ +#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */ #define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ #define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ #define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ -#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ +#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */ #define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ -#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ +#define AT91_ST_SR 0x10 /* Status Register */ #define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ #define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ #define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ #define AT91_ST_ALMS (1 << 3) /* Alarm Status */ -#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ -#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ -#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ +#define AT91_ST_IER 0x14 /* Interrupt Enable Register */ +#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */ +#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */ -#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ +#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */ #define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ -#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ +#define AT91_ST_CRTR 0x24 /* Current Real-time Register */ #define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h deleted file mode 100644 index 61d952902f2b..000000000000 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91cap9.h - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_H -#define AT91CAP9_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ -#define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ -#define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ -#define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ -#define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ -#define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ -#define AT91CAP9_ID_US0 8 /* USART 0 */ -#define AT91CAP9_ID_US1 9 /* USART 1 */ -#define AT91CAP9_ID_US2 10 /* USART 2 */ -#define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ -#define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ -#define AT91CAP9_ID_CAN 13 /* CAN */ -#define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ -#define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ -#define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ -#define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ -#define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ -#define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ -#define AT91CAP9_ID_EMAC 22 /* Ethernet */ -#define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ -#define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ -#define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ -#define AT91CAP9_ID_LCDC 26 /* LCD Controller */ -#define AT91CAP9_ID_DMA 27 /* DMA Controller */ -#define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ -#define AT91CAP9_ID_UHP 29 /* USB Host Port */ -#define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - -/* - * User Peripheral physical base addresses. - */ -#define AT91CAP9_BASE_UDPHS 0xfff78000 -#define AT91CAP9_BASE_TCB0 0xfff7c000 -#define AT91CAP9_BASE_TC0 0xfff7c000 -#define AT91CAP9_BASE_TC1 0xfff7c040 -#define AT91CAP9_BASE_TC2 0xfff7c080 -#define AT91CAP9_BASE_MCI0 0xfff80000 -#define AT91CAP9_BASE_MCI1 0xfff84000 -#define AT91CAP9_BASE_TWI 0xfff88000 -#define AT91CAP9_BASE_US0 0xfff8c000 -#define AT91CAP9_BASE_US1 0xfff90000 -#define AT91CAP9_BASE_US2 0xfff94000 -#define AT91CAP9_BASE_SSC0 0xfff98000 -#define AT91CAP9_BASE_SSC1 0xfff9c000 -#define AT91CAP9_BASE_AC97C 0xfffa0000 -#define AT91CAP9_BASE_SPI0 0xfffa4000 -#define AT91CAP9_BASE_SPI1 0xfffa8000 -#define AT91CAP9_BASE_CAN 0xfffac000 -#define AT91CAP9_BASE_PWMC 0xfffb8000 -#define AT91CAP9_BASE_EMAC 0xfffbc000 -#define AT91CAP9_BASE_ADC 0xfffc0000 -#define AT91CAP9_BASE_ISI 0xfffc4000 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ - (0xfffffd50 - AT91_BASE_SYS) : \ - (0xfffffd60 - AT91_BASE_SYS)) - -#define AT91CAP9_BASE_ECC 0xffffe200 -#define AT91CAP9_BASE_DMA 0xffffec00 -#define AT91CAP9_BASE_SMC 0xffffe800 -#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1 -#define AT91CAP9_BASE_PIOA 0xfffff200 -#define AT91CAP9_BASE_PIOB 0xfffff400 -#define AT91CAP9_BASE_PIOC 0xfffff600 -#define AT91CAP9_BASE_PIOD 0xfffff800 -#define AT91CAP9_BASE_RSTC 0xfffffd00 -#define AT91CAP9_BASE_SHDWC 0xfffffd10 -#define AT91CAP9_BASE_RTT 0xfffffd20 -#define AT91CAP9_BASE_PIT 0xfffffd30 -#define AT91CAP9_BASE_WDT 0xfffffd40 - -#define AT91_USART0 AT91CAP9_BASE_US0 -#define AT91_USART1 AT91CAP9_BASE_US1 -#define AT91_USART2 AT91CAP9_BASE_US2 - - -/* - * Internal Memory. - */ -#define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ -#define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ - -#define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ - -#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */ -#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h b/arch/arm/mach-at91/include/mach/at91cap9_matrix.h deleted file mode 100644 index 4b9d4aff4b4f..000000000000 --- a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91cap9_matrix.h - * - * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> - * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_MATRIX_H -#define AT91CAP9_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ -#define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ -#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ -#define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ -#define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ -#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ - -#define AT91_MATRIX_UDPHS (AT91_MATRIX + 0x118) /* USBHS Special Function Register [AT91CAP9 only] */ -#define AT91_MATRIX_SELECT_UDPHS (0 << 31) /* select High Speed UDP */ -#define AT91_MATRIX_SELECT_UDP (1 << 31) /* select standard UDP */ -#define AT91_MATRIX_UDPHS_BYPASS_LOCK (1 << 30) /* bypass lock bit */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ -#define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ -#define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index bacb51141819..603e6aac2a4f 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h @@ -77,26 +77,22 @@ /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ -#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ -#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ - #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ #define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ #define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ #define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ +#define AT91RM9200_BASE_ST 0xfffffd00 /* System Timer */ #define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ +#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */ #define AT91_USART0 AT91RM9200_BASE_US0 #define AT91_USART1 AT91RM9200_BASE_US1 #define AT91_USART2 AT91RM9200_BASE_US2 #define AT91_USART3 AT91RM9200_BASE_US3 -#define AT91_MATRIX 0 /* not supported */ - /* * Internal Memory. */ diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h index d34e4ed89349..aeaadfb452af 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h @@ -17,10 +17,10 @@ #define AT91RM9200_MC_H /* Memory Controller */ -#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ +#define AT91_MC_RCR 0x00 /* MC Remap Control Register */ #define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ -#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ +#define AT91_MC_ASR 0x04 /* MC Abort Status Register */ #define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ #define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ #define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ @@ -40,16 +40,16 @@ #define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ #define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ -#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ +#define AT91_MC_AASR 0x08 /* MC Abort Address Status Register */ -#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ +#define AT91_MC_MPR 0x0c /* MC Master Priority Register */ #define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ #define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ #define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ #define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ /* External Bus Interface (EBI) registers */ -#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ +#define AT91_EBI_CSA 0x60 /* Chip Select Assignment Register */ #define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ #define AT91_EBI_CS0A_SMC (0 << 0) #define AT91_EBI_CS0A_BFC (1 << 0) @@ -66,7 +66,7 @@ #define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ /* Static Memory Controller (SMC) registers */ -#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ +#define AT91_SMC_CSR(n) (0x70 + ((n) * 4)) /* SMC Chip Select Register */ #define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ #define AT91_SMC_NWS_(x) ((x) << 0) #define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ @@ -87,52 +87,8 @@ #define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ #define AT91_SMC_RWHOLD_(x) ((x) << 28) -/* SDRAM Controller registers */ -#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL (0 << 0) -#define AT91_SDRAMC_MODE_NOP (1 << 0) -#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) -#define AT91_SDRAMC_MODE_LMR (3 << 0) -#define AT91_SDRAMC_MODE_REFRESH (4 << 0) -#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 4) -#define AT91_SDRAMC_DBW_16 (1 << 4) - -#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ - -#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ -#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ -#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ - /* Burst Flash Controller register */ -#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ +#define AT91_BFC_MR 0xc0 /* Mode Register */ #define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ #define AT91_BFC_BFCOM_DISABLED (0 << 0) #define AT91_BFC_BFCOM_ASYNC (1 << 0) diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h new file mode 100644 index 000000000000..aa047f458f1b --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h @@ -0,0 +1,63 @@ +/* + * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Memory Controllers (SDRAMC only) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_SDRAMC_H +#define AT91RM9200_SDRAMC_H + +/* SDRAM Controller registers */ +#define AT91RM9200_SDRAMC_MR 0x90 /* Mode Register */ +#define AT91RM9200_SDRAMC_MODE (0xf << 0) /* Command Mode */ +#define AT91RM9200_SDRAMC_MODE_NORMAL (0 << 0) +#define AT91RM9200_SDRAMC_MODE_NOP (1 << 0) +#define AT91RM9200_SDRAMC_MODE_PRECHARGE (2 << 0) +#define AT91RM9200_SDRAMC_MODE_LMR (3 << 0) +#define AT91RM9200_SDRAMC_MODE_REFRESH (4 << 0) +#define AT91RM9200_SDRAMC_DBW (1 << 4) /* Data Bus Width */ +#define AT91RM9200_SDRAMC_DBW_32 (0 << 4) +#define AT91RM9200_SDRAMC_DBW_16 (1 << 4) + +#define AT91RM9200_SDRAMC_TR 0x94 /* Refresh Timer Register */ +#define AT91RM9200_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ + +#define AT91RM9200_SDRAMC_CR 0x98 /* Configuration Register */ +#define AT91RM9200_SDRAMC_NC (3 << 0) /* Number of Column Bits */ +#define AT91RM9200_SDRAMC_NC_8 (0 << 0) +#define AT91RM9200_SDRAMC_NC_9 (1 << 0) +#define AT91RM9200_SDRAMC_NC_10 (2 << 0) +#define AT91RM9200_SDRAMC_NC_11 (3 << 0) +#define AT91RM9200_SDRAMC_NR (3 << 2) /* Number of Row Bits */ +#define AT91RM9200_SDRAMC_NR_11 (0 << 2) +#define AT91RM9200_SDRAMC_NR_12 (1 << 2) +#define AT91RM9200_SDRAMC_NR_13 (2 << 2) +#define AT91RM9200_SDRAMC_NB (1 << 4) /* Number of Banks */ +#define AT91RM9200_SDRAMC_NB_2 (0 << 4) +#define AT91RM9200_SDRAMC_NB_4 (1 << 4) +#define AT91RM9200_SDRAMC_CAS (3 << 5) /* CAS Latency */ +#define AT91RM9200_SDRAMC_CAS_2 (2 << 5) +#define AT91RM9200_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ +#define AT91RM9200_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ +#define AT91RM9200_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ +#define AT91RM9200_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ +#define AT91RM9200_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ +#define AT91RM9200_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ + +#define AT91RM9200_SDRAMC_SRR 0x9c /* Self Refresh Register */ +#define AT91RM9200_SDRAMC_LPR 0xa0 /* Low Power Register */ +#define AT91RM9200_SDRAMC_IER 0xa4 /* Interrupt Enable Register */ +#define AT91RM9200_SDRAMC_IDR 0xa8 /* Interrupt Disable Register */ +#define AT91RM9200_SDRAMC_IMR 0xac /* Interrupt Mask Register */ +#define AT91RM9200_SDRAMC_ISR 0xb0 /* Interrupt Status Register */ + +#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index fa5ca278adeb..08ae9afd00fe 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h @@ -78,15 +78,12 @@ #define AT91SAM9260_BASE_ADC 0xfffe0000 /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - #define AT91SAM9260_BASE_ECC 0xffffe800 +#define AT91SAM9260_BASE_SDRAMC 0xffffea00 #define AT91SAM9260_BASE_SMC 0xffffec00 +#define AT91SAM9260_BASE_MATRIX 0xffffee00 #define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0 #define AT91SAM9260_BASE_PIOA 0xfffff400 #define AT91SAM9260_BASE_PIOB 0xfffff600 @@ -96,6 +93,7 @@ #define AT91SAM9260_BASE_RTT 0xfffffd20 #define AT91SAM9260_BASE_PIT 0xfffffd30 #define AT91SAM9260_BASE_WDT 0xfffffd40 +#define AT91SAM9260_BASE_GPBR 0xfffffd50 #define AT91_USART0 AT91SAM9260_BASE_US0 #define AT91_USART1 AT91SAM9260_BASE_US1 @@ -115,6 +113,8 @@ #define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ #define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ #define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ +#define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */ +#define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */ #define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ @@ -128,6 +128,8 @@ #define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */ #define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ #define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ +#define AT91SAM9G20_SRAM_BASE 0x002FC000 /* Internal SRAM base address */ +#define AT91SAM9G20_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */ #define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h index 020f02ed921a..f459df420629 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h @@ -15,12 +15,12 @@ #ifndef AT91SAM9260_MATRIX_H #define AT91SAM9260_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ #define AT91_MATRIX_ULBT_INFINITE (0 << 0) #define AT91_MATRIX_ULBT_SINGLE (1 << 0) @@ -28,11 +28,11 @@ #define AT91_MATRIX_ULBT_EIGHT (3 << 0) #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) @@ -43,11 +43,11 @@ #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ @@ -55,11 +55,11 @@ #define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ #define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBICSA 0x11C /* EBI Chip Select Assignment Register */ #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_CS1A_SMC (0 << 1) #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index 7cde2d36570e..44fbdc12ee62 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h @@ -63,14 +63,11 @@ /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - #define AT91SAM9261_BASE_SMC 0xffffec00 +#define AT91SAM9261_BASE_MATRIX 0xffffee00 +#define AT91SAM9261_BASE_SDRAMC 0xffffea00 #define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0 #define AT91SAM9261_BASE_PIOA 0xfffff400 #define AT91SAM9261_BASE_PIOB 0xfffff600 @@ -80,6 +77,7 @@ #define AT91SAM9261_BASE_RTT 0xfffffd20 #define AT91SAM9261_BASE_PIT 0xfffffd30 #define AT91SAM9261_BASE_WDT 0xfffffd40 +#define AT91SAM9261_BASE_GPBR 0xfffffd50 #define AT91_USART0 AT91SAM9261_BASE_US0 #define AT91_USART1 AT91SAM9261_BASE_US1 diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h index 69c6501915d9..a50cdf8b8ca4 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h @@ -15,15 +15,15 @@ #ifndef AT91SAM9261_MATRIX_H #define AT91SAM9261_MATRIX_H -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ +#define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */ #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) @@ -31,7 +31,7 @@ #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) #define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ +#define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */ #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_ITCM_0 (0 << 0) #define AT91_MATRIX_ITCM_16 (5 << 0) @@ -43,7 +43,7 @@ #define AT91_MATRIX_DTCM_32 (6 << 4) #define AT91_MATRIX_DTCM_64 (7 << 4) -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */ #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_CS1A_SMC (0 << 1) #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) @@ -58,7 +58,7 @@ #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ +#define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */ #define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index 5949abda962b..d96cbb2e03c4 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h @@ -72,18 +72,15 @@ #define AT91SAM9263_BASE_2DGE 0xfffc8000 /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) -#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) - #define AT91SAM9263_BASE_ECC0 0xffffe000 +#define AT91SAM9263_BASE_SDRAMC0 0xffffe200 #define AT91SAM9263_BASE_SMC0 0xffffe400 #define AT91SAM9263_BASE_ECC1 0xffffe600 +#define AT91SAM9263_BASE_SDRAMC1 0xffffe800 #define AT91SAM9263_BASE_SMC1 0xffffea00 +#define AT91SAM9263_BASE_MATRIX 0xffffec00 #define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1 #define AT91SAM9263_BASE_PIOA 0xfffff200 #define AT91SAM9263_BASE_PIOB 0xfffff400 @@ -96,6 +93,7 @@ #define AT91SAM9263_BASE_PIT 0xfffffd30 #define AT91SAM9263_BASE_WDT 0xfffffd40 #define AT91SAM9263_BASE_RTT1 0xfffffd50 +#define AT91SAM9263_BASE_GPBR 0xfffffd60 #define AT91_USART0 AT91SAM9263_BASE_US0 #define AT91_USART1 AT91SAM9263_BASE_US1 diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h index 9b3efd3eb2f3..ebb5fdb565e0 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h @@ -15,15 +15,15 @@ #ifndef AT91SAM9263_MATRIX_H #define AT91SAM9263_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ +#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */ +#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */ +#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */ #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ #define AT91_MATRIX_ULBT_INFINITE (0 << 0) #define AT91_MATRIX_ULBT_SINGLE (1 << 0) @@ -31,14 +31,14 @@ #define AT91_MATRIX_ULBT_EIGHT (3 << 0) #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ +#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */ +#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */ #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) @@ -49,22 +49,22 @@ #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ +#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */ +#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */ +#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */ +#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */ +#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */ +#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */ +#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */ +#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */ +#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */ +#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */ #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ @@ -75,7 +75,7 @@ #define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ #define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_RCB2 (1 << 2) @@ -86,7 +86,7 @@ #define AT91_MATRIX_RCB7 (1 << 7) #define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ +#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */ #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_ITCM_0 (0 << 0) #define AT91_MATRIX_ITCM_16 (5 << 0) @@ -96,7 +96,7 @@ #define AT91_MATRIX_DTCM_16 (5 << 4) #define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ +#define AT91_MATRIX_EBI0CSA 0x120 /* EBI0 Chip Select Assignment Register */ #define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) #define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) @@ -114,7 +114,7 @@ #define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) #define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) -#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ +#define AT91_MATRIX_EBI1CSA 0x124 /* EBI1 Chip Select Assignment Register */ #define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) #define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index e2f8da8ce5bc..0210797abf2e 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -59,7 +59,6 @@ #define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */ #define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */ #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */ -#define AT91CAP9_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */ #define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */ #define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */ @@ -76,7 +75,6 @@ #define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */ #define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */ -#define AT91CAP9_DDRSDRC_LPR 0x18 /* Low Power Register */ #define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */ #define AT91_DDRSDRC_LPCB_DISABLE 0 #define AT91_DDRSDRC_LPCB_SELF_REFRESH 1 @@ -94,11 +92,9 @@ #define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ #define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ -#define AT91CAP9_DDRSDRC_MDR 0x1C /* Memory Device Register */ #define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ #define AT91_DDRSDRC_MD_SDR 0 #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 -#define AT91CAP9_DDRSDRC_MD_DDR 2 #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 #define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */ #define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ @@ -106,16 +102,10 @@ #define AT91_DDRSDRC_DBW_16BITS (1 << 4) #define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */ -#define AT91CAP9_DDRSDRC_DLL 0x20 /* DLL Information Register */ #define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */ #define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */ #define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */ -#define AT91CAP9_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */ -#define AT91CAP9_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */ -#define AT91CAP9_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */ #define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */ -#define AT91CAP9_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */ -#define AT91CAP9_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */ #define AT91_DDRSDRC_HS 0x2C /* High Speed Register [SAM9 Only] */ #define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */ @@ -131,10 +121,4 @@ #define AT91_DDRSDRC_WPVS (1 << 0) /* Write protect violation status */ #define AT91_DDRSDRC_WPVSRC (0xffff << 8) /* Write protect violation source */ -/* Register access macros */ -#define at91_ramc_read(num, reg) \ - at91_sys_read(AT91_DDRSDRC##num + reg) -#define at91_ramc_write(num, reg, value) \ - at91_sys_write(AT91_DDRSDRC##num + reg, value) - #endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h index 100f5a592926..3d085a9a7450 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h @@ -82,10 +82,4 @@ #define AT91_SDRAMC_MD_SDRAM 0 #define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 -/* Register access macros */ -#define at91_ramc_read(num, reg) \ - at91_sys_read(AT91_SDRAMC##num + reg) -#define at91_ramc_write(num, reg, value) \ - at91_sys_write(AT91_SDRAMC##num + reg, value) - #endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index dd9c95ea0862..d052abcff852 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h @@ -84,17 +84,14 @@ #define AT91SAM9G45_BASE_TC5 0xfffd4080 /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ -#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) - #define AT91SAM9G45_BASE_ECC 0xffffe200 +#define AT91SAM9G45_BASE_DDRSDRC1 0xffffe400 +#define AT91SAM9G45_BASE_DDRSDRC0 0xffffe600 #define AT91SAM9G45_BASE_DMA 0xffffec00 #define AT91SAM9G45_BASE_SMC 0xffffe800 +#define AT91SAM9G45_BASE_MATRIX 0xffffea00 #define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1 #define AT91SAM9G45_BASE_PIOA 0xfffff200 #define AT91SAM9G45_BASE_PIOB 0xfffff400 @@ -107,6 +104,7 @@ #define AT91SAM9G45_BASE_PIT 0xfffffd30 #define AT91SAM9G45_BASE_WDT 0xfffffd40 #define AT91SAM9G45_BASE_RTC 0xfffffdb0 +#define AT91SAM9G45_BASE_GPBR 0xfffffd60 #define AT91_USART0 AT91SAM9G45_BASE_US0 #define AT91_USART1 AT91SAM9G45_BASE_US1 diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h index c972d60e0aeb..b76e2ed2fbc2 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h @@ -15,18 +15,18 @@ #ifndef AT91SAM9G45_MATRIX_H #define AT91SAM9G45_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ +#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */ +#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */ +#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */ +#define AT91_MATRIX_MCFG9 0x24 /* Master Configuration Register 9 */ +#define AT91_MATRIX_MCFG10 0x28 /* Master Configuration Register 10 */ +#define AT91_MATRIX_MCFG11 0x2C /* Master Configuration Register 11 */ #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ #define AT91_MATRIX_ULBT_INFINITE (0 << 0) #define AT91_MATRIX_ULBT_SINGLE (1 << 0) @@ -37,14 +37,14 @@ #define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0) #define AT91_MATRIX_ULBT_128 (7 << 0) -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ +#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */ +#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */ #define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */ #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) @@ -52,22 +52,22 @@ #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) #define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ +#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */ +#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */ +#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */ +#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */ +#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */ +#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */ +#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */ +#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */ +#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */ +#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */ #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ @@ -81,7 +81,7 @@ #define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ #define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_RCB2 (1 << 2) @@ -95,7 +95,7 @@ #define AT91_MATRIX_RCB10 (1 << 10) #define AT91_MATRIX_RCB11 (1 << 11) -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x110) /* TCM Configuration Register */ +#define AT91_MATRIX_TCMR 0x110 /* TCM Configuration Register */ #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_ITCM_0 (0 << 0) #define AT91_MATRIX_ITCM_32 (6 << 0) @@ -107,12 +107,12 @@ #define AT91_MATRIX_TCM_NO_WS (0x0 << 11) #define AT91_MATRIX_TCM_ONE_WS (0x1 << 11) -#define AT91_MATRIX_VIDEO (AT91_MATRIX + 0x118) /* Video Mode Configuration Register */ +#define AT91_MATRIX_VIDEO 0x118 /* Video Mode Configuration Register */ #define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */ #define AT91C_VDEC_SEL_OFF (0 << 0) #define AT91C_VDEC_SEL_ON (1 << 0) -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x128) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBICSA 0x128 /* EBI Chip Select Assignment Register */ #define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) #define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) @@ -138,13 +138,13 @@ #define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) #define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) -#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ +#define AT91_MATRIX_WPMR 0x1E4 /* Write Protect Mode Register */ #define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ #define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) #define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) #define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ -#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ +#define AT91_MATRIX_WPSR 0x1E8 /* Write Protect Status Register */ #define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ #define AT91_MATRIX_WPSR_NO_WPV (0 << 0) #define AT91_MATRIX_WPSR_WPV (1 << 0) diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index d7bead7118da..e0073eb10144 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h @@ -69,15 +69,13 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) #define AT91SAM9RL_BASE_DMA 0xffffe600 #define AT91SAM9RL_BASE_ECC 0xffffe800 +#define AT91SAM9RL_BASE_SDRAMC 0xffffea00 #define AT91SAM9RL_BASE_SMC 0xffffec00 +#define AT91SAM9RL_BASE_MATRIX 0xffffee00 #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 #define AT91SAM9RL_BASE_PIOA 0xfffff400 #define AT91SAM9RL_BASE_PIOB 0xfffff600 @@ -88,6 +86,7 @@ #define AT91SAM9RL_BASE_RTT 0xfffffd20 #define AT91SAM9RL_BASE_PIT 0xfffffd30 #define AT91SAM9RL_BASE_WDT 0xfffffd40 +#define AT91SAM9RL_BASE_GPBR 0xfffffd60 #define AT91SAM9RL_BASE_RTC 0xfffffe00 #define AT91_USART0 AT91SAM9RL_BASE_US0 diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h index 5f9149071fe5..6d160adadafc 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h @@ -14,12 +14,12 @@ #ifndef AT91SAM9RL_MATRIX_H #define AT91SAM9RL_MATRIX_H -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ #define AT91_MATRIX_ULBT_INFINITE (0 << 0) #define AT91_MATRIX_ULBT_SINGLE (1 << 0) @@ -27,12 +27,12 @@ #define AT91_MATRIX_ULBT_EIGHT (3 << 0) #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) @@ -43,12 +43,12 @@ #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ @@ -56,7 +56,7 @@ #define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ #define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_RCB2 (1 << 2) @@ -64,7 +64,7 @@ #define AT91_MATRIX_RCB4 (1 << 4) #define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ +#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */ #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_ITCM_0 (0 << 0) #define AT91_MATRIX_ITCM_16 (5 << 0) @@ -74,7 +74,7 @@ #define AT91_MATRIX_DTCM_16 (5 << 4) #define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ +#define AT91_MATRIX_EBICSA 0x120 /* EBI0 Chip Select Assignment Register */ #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_CS1A_SMC (0 << 1) #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h new file mode 100644 index 000000000000..a297a77d88e2 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h @@ -0,0 +1,79 @@ +/* + * Chip-specific header file for the AT91SAM9x5 family + * + * Copyright (C) 2009-2012 Atmel Corporation. + * + * Common definitions. + * Based on AT91SAM9x5 datasheet. + * + * Licensed under GPLv2 or later. + */ + +#ifndef AT91SAM9X5_H +#define AT91SAM9X5_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91SAM9X5_ID_PIOAB 2 /* Parallel I/O Controller A and B */ +#define AT91SAM9X5_ID_PIOCD 3 /* Parallel I/O Controller C and D */ +#define AT91SAM9X5_ID_SMD 4 /* SMD Soft Modem (SMD) */ +#define AT91SAM9X5_ID_USART0 5 /* USART 0 */ +#define AT91SAM9X5_ID_USART1 6 /* USART 1 */ +#define AT91SAM9X5_ID_USART2 7 /* USART 2 */ +#define AT91SAM9X5_ID_USART3 8 /* USART 3 */ +#define AT91SAM9X5_ID_TWI0 9 /* Two-Wire Interface 0 */ +#define AT91SAM9X5_ID_TWI1 10 /* Two-Wire Interface 1 */ +#define AT91SAM9X5_ID_TWI2 11 /* Two-Wire Interface 2 */ +#define AT91SAM9X5_ID_MCI0 12 /* High Speed Multimedia Card Interface 0 */ +#define AT91SAM9X5_ID_SPI0 13 /* Serial Peripheral Interface 0 */ +#define AT91SAM9X5_ID_SPI1 14 /* Serial Peripheral Interface 1 */ +#define AT91SAM9X5_ID_UART0 15 /* UART 0 */ +#define AT91SAM9X5_ID_UART1 16 /* UART 1 */ +#define AT91SAM9X5_ID_TCB 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +#define AT91SAM9X5_ID_PWM 18 /* Pulse Width Modulation Controller */ +#define AT91SAM9X5_ID_ADC 19 /* ADC Controller */ +#define AT91SAM9X5_ID_DMA0 20 /* DMA Controller 0 */ +#define AT91SAM9X5_ID_DMA1 21 /* DMA Controller 1 */ +#define AT91SAM9X5_ID_UHPHS 22 /* USB Host High Speed */ +#define AT91SAM9X5_ID_UDPHS 23 /* USB Device High Speed */ +#define AT91SAM9X5_ID_EMAC0 24 /* Ethernet MAC0 */ +#define AT91SAM9X5_ID_LCDC 25 /* LCD Controller */ +#define AT91SAM9X5_ID_ISI 25 /* Image Sensor Interface */ +#define AT91SAM9X5_ID_MCI1 26 /* High Speed Multimedia Card Interface 1 */ +#define AT91SAM9X5_ID_EMAC1 27 /* Ethernet MAC1 */ +#define AT91SAM9X5_ID_SSC 28 /* Synchronous Serial Controller */ +#define AT91SAM9X5_ID_CAN0 29 /* CAN Controller 0 */ +#define AT91SAM9X5_ID_CAN1 30 /* CAN Controller 1 */ +#define AT91SAM9X5_ID_IRQ0 31 /* Advanced Interrupt Controller */ + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9X5_BASE_USART0 0xf801c000 +#define AT91SAM9X5_BASE_USART1 0xf8020000 +#define AT91SAM9X5_BASE_USART2 0xf8024000 + +/* + * System Peripherals + */ +#define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800 + +/* + * Base addresses for early serial code (uncompress.h) + */ +#define AT91_DBGU AT91_BASE_DBGU0 +#define AT91_USART0 AT91SAM9X5_BASE_USART0 +#define AT91_USART1 AT91SAM9X5_BASE_USART1 +#define AT91_USART2 AT91SAM9X5_BASE_USART2 + +/* + * Internal Memory. + */ +#define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define AT91SAM9X5_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */ + +#define AT91SAM9X5_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9X5_ROM_SIZE SZ_64K /* Internal ROM size (64Kb) */ + +#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h new file mode 100644 index 000000000000..a606d3966470 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h @@ -0,0 +1,53 @@ +/* + * Matrix-centric header file for the AT91SAM9x5 family + * + * Copyright (C) 2009-2012 Atmel Corporation. + * + * Only EBI related registers. + * Write Protect register definitions may be useful. + * + * Licensed under GPLv2 or later. + */ + +#ifndef AT91SAM9X5_MATRIX_H +#define AT91SAM9X5_MATRIX_H + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) +#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3) +#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) +#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) +#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ +#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) +#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) +#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ +#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) +#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) +#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */ +#define AT91_MATRIX_NFD0_ON_D0 (0 << 24) +#define AT91_MATRIX_NFD0_ON_D16 (1 << 24) +#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */ +#define AT91_MATRIX_MP_OFF (0 << 25) +#define AT91_MATRIX_MP_ON (1 << 25) + +#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ +#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ +#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) +#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) +#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ + +#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ +#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ +#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) +#define AT91_MATRIX_WPSR_WPV (1 << 0) +#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ + +#endif diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index a57829f4fd18..90680217064e 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h @@ -28,18 +28,18 @@ #define AT91X40_ID_IRQ2 18 /* External IRQ 2 */ /* - * System Peripherals (offset from AT91_BASE_SYS) + * System Peripherals */ #define AT91_BASE_SYS 0xffc00000 -#define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */ -#define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */ -#define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */ -#define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */ -#define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */ -#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ -#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ -#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ +#define AT91_EBI 0xffe00000 /* External Bus Interface */ +#define AT91_SF 0xfff00000 /* Special Function */ +#define AT91_USART1 0xfffcc000 /* USART 1 */ +#define AT91_USART0 0xfffd0000 /* USART 0 */ +#define AT91_TC 0xfffe0000 /* Timer Counter */ +#define AT91_PIOA 0xffff0000 /* PIO Controller A */ +#define AT91_PS 0xffff4000 /* Power Save */ +#define AT91_WD 0xffff8000 /* Watchdog Timer */ /* * The AT91x40 series doesn't have a debug unit like the other AT91 parts. diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 3b33f07b1e11..dc8d6d4f17cf 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -107,6 +107,8 @@ struct atmel_nand_data { u8 ale; /* address line number connected to ALE */ u8 cle; /* address line number connected to CLE */ u8 bus_width_16; /* buswidth is 16 bit */ + u8 correction_cap; /* PMECC correction capability */ + u16 sector_size; /* Sector size for PMECC */ struct mtd_partition *parts; unsigned int num_parts; }; @@ -179,7 +181,9 @@ extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data); extern void __init at91_add_device_ac97(struct ac97c_platform_data *data); /* ISI */ -extern void __init at91_add_device_isi(void); +struct isi_platform_data; +extern void __init at91_add_device_isi(struct isi_platform_data *data, + bool use_pck_as_mck); /* Touchscreen Controller */ struct at91_tsadcc_data { diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index f6ce936dba2b..0118c3338552 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -25,7 +25,6 @@ #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ #define ARCH_ID_AT91SAM9X5 0x819a05a0 -#define ARCH_ID_AT91CAP9 0x039A03A0 #define ARCH_ID_AT91SAM9XE128 0x329973a0 #define ARCH_ID_AT91SAM9XE256 0x329a93a0 @@ -51,10 +50,6 @@ #define ARCH_FAMILY_AT91SAM9 0x01900000 #define ARCH_FAMILY_AT91SAM9XE 0x02900000 -/* PMC revision */ -#define ARCH_REVISION_CAP9_B 0x399 -#define ARCH_REVISION_CAP9_C 0x601 - /* RM9200 type */ #define ARCH_REVISON_9200_BGA (0 << 0) #define ARCH_REVISON_9200_PQFP (1 << 0) @@ -63,9 +58,6 @@ enum at91_soc_type { /* 920T */ AT91_SOC_RM9200, - /* CAP */ - AT91_SOC_CAP9, - /* SAM92xx */ AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, @@ -86,9 +78,6 @@ enum at91_soc_subtype { /* RM9200 */ AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, - /* CAP9 */ - AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C, - /* SAM9260 */ AT91_SOC_SAM9XE, @@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91sam9x25() (0) #endif -#ifdef CONFIG_ARCH_AT91CAP9 -#define cpu_is_at91cap9() (at91_soc_initdata.type == AT91_SOC_CAP9) -#define cpu_is_at91cap9_revB() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B) -#define cpu_is_at91cap9_revC() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C) -#else -#define cpu_is_at91cap9() (0) -#define cpu_is_at91cap9_revB() (0) -#define cpu_is_at91cap9_revC() (0) -#endif - /* * Since this is ARM, we will never run on any AVR32 CPU. But these * definitions may reduce clutter in common drivers. diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 423eea0ed74c..903bf205a333 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S @@ -13,17 +13,11 @@ #include <mach/hardware.h> #include <mach/at91_aic.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =at91_aic_base @ base virtual address of AIC peripheral ldr \base, [\base] .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 2d0e4e998566..e9e29a6c3868 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -19,7 +19,7 @@ /* DBGU base */ /* rm9200, 9260/9g20, 9261/9g10, 9rl */ #define AT91_BASE_DBGU0 0xfffff200 -/* 9263, 9g45, cap9 */ +/* 9263, 9g45 */ #define AT91_BASE_DBGU1 0xffffee00 #if defined(CONFIG_ARCH_AT91RM9200) @@ -34,8 +34,8 @@ #include <mach/at91sam9rl.h> #elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9g45.h> -#elif defined(CONFIG_ARCH_AT91CAP9) -#include <mach/at91cap9.h> +#elif defined(CONFIG_ARCH_AT91SAM9X5) +#include <mach/at91sam9x5.h> #elif defined(CONFIG_ARCH_AT91X40) #include <mach/at91x40.h> #else @@ -59,9 +59,10 @@ /* * On all at91 have the Advanced Interrupt Controller starts at address - * 0xfffff000 + * 0xfffff000 and the Power Management Controller starts at 0xfffffc00 */ #define AT91_AIC 0xfffff000 +#define AT91_PMC 0xfffffc00 /* * Peripheral identifiers/interrupts. diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h deleted file mode 100644 index 4ca09ef7ca29..000000000000 --- a/arch/arm/mach-at91/include/mach/io.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/io.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include <mach/hardware.h> - -#define IO_SPACE_LIMIT 0xFFFFFFFF - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#ifndef __ASSEMBLY__ - -static inline unsigned int at91_sys_read(unsigned int reg_offset) -{ - void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - - return __raw_readl(addr + reg_offset); -} - -static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) -{ - void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - - __raw_writel(value, addr + reg_offset); -} - -#endif - -#endif diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h deleted file mode 100644 index cbd64f3bcecd..000000000000 --- a/arch/arm/mach-at91/include/mach/system.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/system.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <mach/hardware.h> -#include <mach/at91_st.h> -#include <mach/at91_dbgu.h> -#include <mach/at91_pmc.h> - -static inline void arch_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ -#ifdef AT91_PS - at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); -#else - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); -#endif -#ifndef CONFIG_CPU_ARM920T - /* - * Set the processor (CP15) into 'Wait for Interrupt' mode. - * Post-RM9200 processors need this in conjunction with the above - * to save power when idle. - */ - cpu_do_idle(); -#endif -} - -#endif diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 0234fd9d20d6..4218647c1fcd 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h @@ -23,6 +23,7 @@ #include <linux/io.h> #include <linux/atmel_serial.h> +#include <mach/hardware.h> #if defined(CONFIG_AT91_EARLY_DBGU0) #define UART_OFFSET AT91_BASE_DBGU0 diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 1606379ac284..6c9d5e69ac28 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -136,7 +136,7 @@ static int at91_pm_verify_clocks(void) unsigned long scsr; int i; - scsr = at91_sys_read(AT91_PMC_SCSR); + scsr = at91_pmc_read(AT91_PMC_SCSR); /* USB must not be using PLLB */ if (cpu_is_at91rm9200()) { @@ -150,11 +150,6 @@ static int at91_pm_verify_clocks(void) pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } - } else if (cpu_is_at91cap9()) { - if ((scsr & AT91CAP9_PMC_UHP) != 0) { - pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); - return 0; - } } #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS @@ -165,7 +160,7 @@ static int at91_pm_verify_clocks(void) if ((scsr & (AT91_PMC_PCK0 << i)) == 0) continue; - css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; + css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; if (css != AT91_PMC_CSS_SLOW) { pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); return 0; @@ -193,23 +188,36 @@ int at91_suspend_entering_slow_clock(void) EXPORT_SYMBOL(at91_suspend_entering_slow_clock); -static void (*slow_clock)(void); +static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, + void __iomem *ramc1, int memctrl); #ifdef CONFIG_AT91_SLOW_CLOCK -extern void at91_slow_clock(void); +extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, + void __iomem *ramc1, int memctrl); extern u32 at91_slow_clock_sz; #endif +void __iomem *at91_ramc_base[2]; + +void __init at91_ioremap_ramc(int id, u32 addr, u32 size) +{ + if (id < 0 || id > 1) { + pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id); + BUG(); + } + at91_ramc_base[id] = ioremap(addr, size); + if (!at91_ramc_base[id]) + panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); +} static int at91_pm_enter(suspend_state_t state) { - u32 saved_lpr; at91_gpio_suspend(); at91_irq_suspend(); pr_debug("AT91: PM - wake mask %08x, pm state %d\n", /* remember all the always-wake irqs */ - (at91_sys_read(AT91_PMC_PCSR) + (at91_pmc_read(AT91_PMC_PCSR) | (1 << AT91_ID_FIQ) | (1 << AT91_ID_SYS) | (at91_extern_irq)) @@ -234,11 +242,18 @@ static int at91_pm_enter(suspend_state_t state) * turning off the main oscillator; reverse on wakeup. */ if (slow_clock) { + int memctrl = AT91_MEMCTRL_SDRAMC; + + if (cpu_is_at91rm9200()) + memctrl = AT91_MEMCTRL_MC; + else if (cpu_is_at91sam9g45()) + memctrl = AT91_MEMCTRL_DDRSDR; #ifdef CONFIG_AT91_SLOW_CLOCK /* copy slow_clock handler to SRAM, and call it */ memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); #endif - slow_clock(); + slow_clock(at91_pmc_base, at91_ramc_base[0], + at91_ramc_base[1], memctrl); break; } else { pr_info("AT91: PM - no slow clock mode enabled ...\n"); @@ -259,16 +274,7 @@ static int at91_pm_enter(suspend_state_t state) * For ARM 926 based chips, this requirement is weaker * as at91sam9 can access a RAM in self-refresh mode. */ - asm volatile ( "mov r0, #0\n\t" - "b 1f\n\t" - ".align 5\n\t" - "1: mcr p15, 0, r0, c7, c10, 4\n\t" - : /* no output */ - : /* no input */ - : "r0"); - saved_lpr = sdram_selfrefresh_enable(); - wait_for_interrupt_enable(); - sdram_selfrefresh_disable(saved_lpr); + at91_standby(); break; case PM_SUSPEND_ON: @@ -316,7 +322,7 @@ static int __init at91_pm_init(void) #ifdef CONFIG_ARCH_AT91RM9200 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ - at91_sys_write(AT91_SDRAMC_LPR, 0); + at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); #endif suspend_set_ops(&at91_pm_ops); diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 7eb40d24242f..89f56f3a802e 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -1,5 +1,19 @@ +/* + * AT91 Power Management + * + * Copyright (C) 2005 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __ARCH_ARM_MACH_AT91_PM +#define __ARCH_ARM_MACH_AT91_PM + +#include <mach/at91_ramc.h> #ifdef CONFIG_ARCH_AT91RM9200 -#include <mach/at91rm9200_mc.h> +#include <mach/at91rm9200_sdramc.h> /* * The AT91RM9200 goes into self-refresh mode with this command, and will @@ -11,51 +25,37 @@ * still in self-refresh is "not recommended", but seems to work. */ -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91rm9200_standby(void) { - u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); - - at91_sys_write(AT91_SDRAMC_LPR, 0); - at91_sys_write(AT91_SDRAMC_SRR, 1); - return saved_lpr; + u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR); + + asm volatile( + "b 1f\n\t" + ".align 5\n\t" + "1: mcr p15, 0, %0, c7, c10, 4\n\t" + " str %0, [%1, %2]\n\t" + " str %3, [%1, %4]\n\t" + " mcr p15, 0, %0, c7, c0, 4\n\t" + " str %5, [%1, %2]" + : + : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), + "r" (1), "r" (AT91RM9200_SDRAMC_SRR), + "r" (lpr)); } -#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ - : : "r" (0)) - -#elif defined(CONFIG_ARCH_AT91CAP9) -#include <mach/at91sam9_ddrsdr.h> - - -static inline u32 sdram_selfrefresh_enable(void) -{ - u32 saved_lpr, lpr; - - saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR); - - lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; - at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); - return saved_lpr; -} - -#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr) -#define wait_for_interrupt_enable() cpu_do_idle() +#define at91_standby at91rm9200_standby #elif defined(CONFIG_ARCH_AT91SAM9G45) -#include <mach/at91sam9_ddrsdr.h> /* We manage both DDRAM/SDRAM controllers, we need more than one value to * remember. */ -static u32 saved_lpr1; - -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91sam9g45_standby(void) { - /* Those tow values allow us to delay self-refresh activation + /* Those two values allow us to delay self-refresh activation * to the maximum. */ u32 lpr0, lpr1; - u32 saved_lpr0; + u32 saved_lpr0, saved_lpr1; saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; @@ -69,18 +69,15 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); - return saved_lpr0; + cpu_do_idle(); + + at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); + at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } -#define sdram_selfrefresh_disable(saved_lpr0) \ - do { \ - at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ - at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ - } while (0) -#define wait_for_interrupt_enable() cpu_do_idle() +#define at91_standby at91sam9g45_standby #else -#include <mach/at91sam9_sdramc.h> #ifdef CONFIG_ARCH_AT91SAM9263 /* @@ -90,18 +87,23 @@ static inline u32 sdram_selfrefresh_enable(void) #warning Assuming EB1 SDRAM controller is *NOT* used #endif -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91sam9_standby(void) { u32 saved_lpr, lpr; saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); - return saved_lpr; + at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | + AT91_SDRAMC_LPCB_SELF_REFRESH); + + cpu_do_idle(); + + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr); } -#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() cpu_do_idle() +#define at91_standby at91sam9_standby + +#endif #endif diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 92dfb8461392..db5452123f17 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -15,15 +15,7 @@ #include <linux/linkage.h> #include <mach/hardware.h> #include <mach/at91_pmc.h> - -#if defined(CONFIG_ARCH_AT91RM9200) -#include <mach/at91rm9200_mc.h> -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) -#include <mach/at91sam9_ddrsdr.h> -#else -#include <mach/at91sam9_sdramc.h> -#endif +#include <mach/at91_ramc.h> #ifdef CONFIG_ARCH_AT91SAM9263 @@ -47,17 +39,23 @@ #define PLLALOCK_TIMEOUT 1000 #define PLLBLOCK_TIMEOUT 1000 +pmc .req r0 +sdramc .req r1 +ramc1 .req r2 +memctrl .req r3 +tmp1 .req r4 +tmp2 .req r5 /* * Wait until master clock is ready (after switching master clock source) */ .macro wait_mckrdy - mov r4, #MCKRDY_TIMEOUT -1: sub r4, r4, #1 - cmp r4, #0 + mov tmp2, #MCKRDY_TIMEOUT +1: sub tmp2, tmp2, #1 + cmp tmp2, #0 beq 2f - ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] - tst r3, #AT91_PMC_MCKRDY + ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MCKRDY beq 1b 2: .endm @@ -66,12 +64,12 @@ * Wait until master oscillator has stabilized. */ .macro wait_moscrdy - mov r4, #MOSCRDY_TIMEOUT -1: sub r4, r4, #1 - cmp r4, #0 + mov tmp2, #MOSCRDY_TIMEOUT +1: sub tmp2, tmp2, #1 + cmp tmp2, #0 beq 2f - ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] - tst r3, #AT91_PMC_MOSCS + ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCS beq 1b 2: .endm @@ -80,12 +78,12 @@ * Wait until PLLA has locked. */ .macro wait_pllalock - mov r4, #PLLALOCK_TIMEOUT -1: sub r4, r4, #1 - cmp r4, #0 + mov tmp2, #PLLALOCK_TIMEOUT +1: sub tmp2, tmp2, #1 + cmp tmp2, #0 beq 2f - ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] - tst r3, #AT91_PMC_LOCKA + ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_LOCKA beq 1b 2: .endm @@ -94,80 +92,98 @@ * Wait until PLLB has locked. */ .macro wait_pllblock - mov r4, #PLLBLOCK_TIMEOUT -1: sub r4, r4, #1 - cmp r4, #0 + mov tmp2, #PLLBLOCK_TIMEOUT +1: sub tmp2, tmp2, #1 + cmp tmp2, #0 beq 2f - ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] - tst r3, #AT91_PMC_LOCKB + ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_LOCKB beq 1b 2: .endm .text +/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, + * void __iomem *ramc1, int memctrl) + */ ENTRY(at91_slow_clock) /* Save registers on stack */ - stmfd sp!, {r0 - r12, lr} + stmfd sp!, {r4 - r12, lr} /* * Register usage: - * R1 = Base address of AT91_PMC - * R2 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS) - * R3 = temporary register + * R0 = Base address of AT91_PMC + * R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS) + * R2 = Base address of second RAM Controller or 0 if not present + * R3 = Memory controller * R4 = temporary register - * R5 = Base address of second RAM Controller or 0 if not present + * R5 = temporary register */ - ldr r1, .at91_va_base_pmc - ldr r2, .at91_va_base_sdramc - ldr r5, .at91_va_base_ramc1 /* Drain write buffer */ - mov r0, #0 - mcr p15, 0, r0, c7, c10, 4 + mov tmp1, #0 + mcr p15, 0, tmp1, c7, c10, 4 + + cmp memctrl, #AT91_MEMCTRL_MC + bne ddr_sr_enable -#ifdef CONFIG_ARCH_AT91RM9200 + /* + * at91rm9200 Memory controller + */ /* Put SDRAM in self-refresh mode */ - mov r3, #1 - str r3, [r2, #AT91_SDRAMC_SRR] -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) + mov tmp1, #1 + str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR] + b sdr_sr_done + + /* + * DDRSDR Memory controller + */ +ddr_sr_enable: + cmp memctrl, #AT91_MEMCTRL_DDRSDR + bne sdr_sr_enable /* prepare for DDRAM self-refresh mode */ - ldr r3, [r2, #AT91_DDRSDRC_LPR] - str r3, .saved_sam9_lpr - bic r3, #AT91_DDRSDRC_LPCB - orr r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH + ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] + str tmp1, .saved_sam9_lpr + bic tmp1, #AT91_DDRSDRC_LPCB + orr tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH /* figure out if we use the second ram controller */ - cmp r5, #0 - ldrne r4, [r5, #AT91_DDRSDRC_LPR] - strne r4, .saved_sam9_lpr1 - bicne r4, #AT91_DDRSDRC_LPCB - orrne r4, #AT91_DDRSDRC_LPCB_SELF_REFRESH + cmp ramc1, #0 + ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] + strne tmp2, .saved_sam9_lpr1 + bicne tmp2, #AT91_DDRSDRC_LPCB + orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH /* Enable DDRAM self-refresh mode */ - str r3, [r2, #AT91_DDRSDRC_LPR] - strne r4, [r5, #AT91_DDRSDRC_LPR] -#else + str tmp1, [sdramc, #AT91_DDRSDRC_LPR] + strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] + + b sdr_sr_done + + /* + * SDRAMC Memory controller + */ +sdr_sr_enable: /* Enable SDRAM self-refresh mode */ - ldr r3, [r2, #AT91_SDRAMC_LPR] - str r3, .saved_sam9_lpr + ldr tmp1, [sdramc, #AT91_SDRAMC_LPR] + str tmp1, .saved_sam9_lpr - bic r3, #AT91_SDRAMC_LPCB - orr r3, #AT91_SDRAMC_LPCB_SELF_REFRESH - str r3, [r2, #AT91_SDRAMC_LPR] -#endif + bic tmp1, #AT91_SDRAMC_LPCB + orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH + str tmp1, [sdramc, #AT91_SDRAMC_LPR] +sdr_sr_done: /* Save Master clock setting */ - ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] - str r3, .saved_mckr + ldr tmp1, [pmc, #AT91_PMC_MCKR] + str tmp1, .saved_mckr /* * Set the Master clock source to slow clock */ - bic r3, r3, #AT91_PMC_CSS - str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + bic tmp1, tmp1, #AT91_PMC_CSS + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy @@ -177,61 +193,61 @@ ENTRY(at91_slow_clock) * * See AT91RM9200 errata #27 and #28 for details. */ - mov r3, #0 - str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + mov tmp1, #0 + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy #endif /* Save PLLA setting and disable it */ - ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] - str r3, .saved_pllar + ldr tmp1, [pmc, #AT91_CKGR_PLLAR] + str tmp1, .saved_pllar - mov r3, #AT91_PMC_PLLCOUNT - orr r3, r3, #(1 << 29) /* bit 29 always set */ - str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] + mov tmp1, #AT91_PMC_PLLCOUNT + orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ + str tmp1, [pmc, #AT91_CKGR_PLLAR] /* Save PLLB setting and disable it */ - ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] - str r3, .saved_pllbr + ldr tmp1, [pmc, #AT91_CKGR_PLLBR] + str tmp1, .saved_pllbr - mov r3, #AT91_PMC_PLLCOUNT - str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] + mov tmp1, #AT91_PMC_PLLCOUNT + str tmp1, [pmc, #AT91_CKGR_PLLBR] /* Turn off the main oscillator */ - ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] - bic r3, r3, #AT91_PMC_MOSCEN - str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCEN + str tmp1, [pmc, #AT91_CKGR_MOR] /* Wait for interrupt */ - mcr p15, 0, r0, c7, c0, 4 + mcr p15, 0, tmp1, c7, c0, 4 /* Turn on the main oscillator */ - ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] - orr r3, r3, #AT91_PMC_MOSCEN - str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCEN + str tmp1, [pmc, #AT91_CKGR_MOR] wait_moscrdy /* Restore PLLB setting */ - ldr r3, .saved_pllbr - str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] + ldr tmp1, .saved_pllbr + str tmp1, [pmc, #AT91_CKGR_PLLBR] - tst r3, #(AT91_PMC_MUL & 0xff0000) + tst tmp1, #(AT91_PMC_MUL & 0xff0000) bne 1f - tst r3, #(AT91_PMC_MUL & ~0xff0000) + tst tmp1, #(AT91_PMC_MUL & ~0xff0000) beq 2f 1: wait_pllblock 2: /* Restore PLLA setting */ - ldr r3, .saved_pllar - str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] + ldr tmp1, .saved_pllar + str tmp1, [pmc, #AT91_CKGR_PLLAR] - tst r3, #(AT91_PMC_MUL & 0xff0000) + tst tmp1, #(AT91_PMC_MUL & 0xff0000) bne 3f - tst r3, #(AT91_PMC_MUL & ~0xff0000) + tst tmp1, #(AT91_PMC_MUL & ~0xff0000) beq 4f 3: wait_pllalock @@ -244,11 +260,11 @@ ENTRY(at91_slow_clock) * * See AT91RM9200 errata #27 and #28 for details. */ - ldr r3, .saved_mckr - tst r3, #AT91_PMC_PRES + ldr tmp1, .saved_mckr + tst tmp1, #AT91_PMC_PRES beq 2f - and r3, r3, #AT91_PMC_PRES - str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + and tmp1, tmp1, #AT91_PMC_PRES + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy #endif @@ -256,32 +272,45 @@ ENTRY(at91_slow_clock) /* * Restore master clock setting */ -2: ldr r3, .saved_mckr - str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] +2: ldr tmp1, .saved_mckr + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy -#ifdef CONFIG_ARCH_AT91RM9200 - /* Do nothing - self-refresh is automatically disabled. */ -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) + /* + * at91rm9200 Memory controller + * Do nothing - self-refresh is automatically disabled. + */ + cmp memctrl, #AT91_MEMCTRL_MC + beq ram_restored + + /* + * DDRSDR Memory controller + */ + cmp memctrl, #AT91_MEMCTRL_DDRSDR + bne sdr_en_restore /* Restore LPR on AT91 with DDRAM */ - ldr r3, .saved_sam9_lpr - str r3, [r2, #AT91_DDRSDRC_LPR] + ldr tmp1, .saved_sam9_lpr + str tmp1, [sdramc, #AT91_DDRSDRC_LPR] /* if we use the second ram controller */ - cmp r5, #0 - ldrne r4, .saved_sam9_lpr1 - strne r4, [r5, #AT91_DDRSDRC_LPR] + cmp ramc1, #0 + ldrne tmp2, .saved_sam9_lpr1 + strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] + + b ram_restored -#else + /* + * SDRAMC Memory controller + */ +sdr_en_restore: /* Restore LPR on AT91 with SDRAM */ - ldr r3, .saved_sam9_lpr - str r3, [r2, #AT91_SDRAMC_LPR] -#endif + ldr tmp1, .saved_sam9_lpr + str tmp1, [sdramc, #AT91_SDRAMC_LPR] +ram_restored: /* Restore registers, and return */ - ldmfd sp!, {r0 - r12, pc} + ldmfd sp!, {r4 - r12, pc} .saved_mckr: @@ -299,27 +328,5 @@ ENTRY(at91_slow_clock) .saved_sam9_lpr1: .word 0 -.at91_va_base_pmc: - .word AT91_VA_BASE_SYS + AT91_PMC - -#ifdef CONFIG_ARCH_AT91RM9200 -.at91_va_base_sdramc: - .word AT91_VA_BASE_SYS -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) -.at91_va_base_sdramc: - .word AT91_VA_BASE_SYS + AT91_DDRSDRC0 -#else -.at91_va_base_sdramc: - .word AT91_VA_BASE_SYS + AT91_SDRAMC0 -#endif - -.at91_va_base_ramc1: -#if defined(CONFIG_ARCH_AT91SAM9G45) - .word AT91_VA_BASE_SYS + AT91_DDRSDRC1 -#else - .word 0 -#endif - ENTRY(at91_slow_clock_sz) .word .-at91_slow_clock diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 69d3fc4c46f3..372396c2ecb6 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -86,20 +86,6 @@ static void __init soc_detect(u32 dbgu_base) socid = cidr & ~AT91_CIDR_VERSION; switch (socid) { - case ARCH_ID_AT91CAP9: { -#ifdef CONFIG_AT91_PMC_UNIT - u32 pmc_ver = at91_sys_read(AT91_PMC_VER); - - if (pmc_ver == ARCH_REVISION_CAP9_B) - at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B; - else if (pmc_ver == ARCH_REVISION_CAP9_C) - at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C; -#endif - at91_soc_initdata.type = AT91_SOC_CAP9; - at91_boot_soc = at91cap9_soc; - break; - } - case ARCH_ID_AT91RM9200: at91_soc_initdata.type = AT91_SOC_RM9200; at91_boot_soc = at91rm9200_soc; @@ -200,7 +186,6 @@ static void __init soc_detect(u32 dbgu_base) static const char *soc_name[] = { [AT91_SOC_RM9200] = "at91rm9200", - [AT91_SOC_CAP9] = "at91cap9", [AT91_SOC_SAM9260] = "at91sam9260", [AT91_SOC_SAM9261] = "at91sam9261", [AT91_SOC_SAM9263] = "at91sam9263", @@ -221,8 +206,6 @@ EXPORT_SYMBOL(at91_get_soc_type); static const char *soc_subtype_name[] = { [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA", [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP", - [AT91_SOC_CAP9_REV_B] = "at91cap9 revB", - [AT91_SOC_CAP9_REV_C] = "at91cap9 revC", [AT91_SOC_SAM9XE] = "at91sam9xe", [AT91_SOC_SAM9G45ES] = "at91sam9g45es", [AT91_SOC_SAM9M10] = "at91sam9m10", @@ -293,6 +276,15 @@ void __init at91_ioremap_rstc(u32 base_addr) panic("Impossible to ioremap at91_rstc_base\n"); } +void __iomem *at91_matrix_base; + +void __init at91_ioremap_matrix(u32 base_addr) +{ + at91_matrix_base = ioremap(base_addr, 512); + if (!at91_matrix_base) + panic("Impossible to ioremap at91_matrix_base\n"); +} + void __init at91_initialize(unsigned long main_clock) { at91_boot_soc.ioremap_registers(); diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 4588ae6f7acd..5db4aa45404a 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -13,7 +13,6 @@ struct at91_init_soc { }; extern struct at91_init_soc at91_boot_soc; -extern struct at91_init_soc at91cap9_soc; extern struct at91_init_soc at91rm9200_soc; extern struct at91_init_soc at91sam9260_soc; extern struct at91_init_soc at91sam9261_soc; @@ -27,10 +26,6 @@ static inline int at91_soc_is_enabled(void) return at91_boot_soc.init != NULL; } -#if !defined(CONFIG_ARCH_AT91CAP9) -#define at91cap9_soc at91_boot_soc -#endif - #if !defined(CONFIG_ARCH_AT91RM9200) #define at91rm9200_soc at91_boot_soc #endif diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index 9e5e7552498c..45c97b1ee9b1 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c @@ -194,6 +194,6 @@ MACHINE_START(BCMRING, "BCMRING") .init_early = bcmring_init_early, .init_irq = bcmring_init_irq, .timer = &bcmring_timer, - .init_machine = bcmring_init_machine + .init_machine = bcmring_init_machine, .restart = bcmring_restart, MACHINE_END diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 6b67b7e8426c..22e4e0a28ad1 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c @@ -52,27 +52,8 @@ #include <mach/csp/chipcHw_inline.h> #include <mach/csp/tmrHw_reg.h> -#define AMBA_DEVICE(name, initname, base, plat, size) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = initname, \ - .platform_data = plat \ - }, \ - .res = { \ - .start = MM_ADDR_IO_##base, \ - .end = MM_ADDR_IO_##base + (size) - 1, \ - .flags = IORESOURCE_MEM \ - }, \ - .dma_mask = ~0, \ - .irq = { \ - IRQ_##base \ - } \ -} - - -AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); -AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); +static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); +static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); static struct clk pll1_clk = { .name = "PLL1", diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index 1a1a27dd5654..1024396797e1 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c @@ -33,17 +33,11 @@ #include <mach/timer.h> -#include <linux/mm.h> #include <linux/pfn.h> #include <linux/atomic.h> #include <linux/sched.h> #include <mach/dma.h> -/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */ -/* especially since dc4 doesn't use kmalloc'd memory. */ - -#define ALLOW_MAP_OF_KMALLOC_MEMORY 0 - /* ---- Public Variables ------------------------------------------------- */ /* ---- Private Constants and Types -------------------------------------- */ @@ -53,24 +47,12 @@ #define CONTROLLER_FROM_HANDLE(handle) (((handle) >> 4) & 0x0f) #define CHANNEL_FROM_HANDLE(handle) ((handle) & 0x0f) -#define DMA_MAP_DEBUG 0 - -#if DMA_MAP_DEBUG -# define DMA_MAP_PRINT(fmt, args...) printk("%s: " fmt, __func__, ## args) -#else -# define DMA_MAP_PRINT(fmt, args...) -#endif /* ---- Private Variables ------------------------------------------------ */ static DMA_Global_t gDMA; static struct proc_dir_entry *gDmaDir; -static atomic_t gDmaStatMemTypeKmalloc = ATOMIC_INIT(0); -static atomic_t gDmaStatMemTypeVmalloc = ATOMIC_INIT(0); -static atomic_t gDmaStatMemTypeUser = ATOMIC_INIT(0); -static atomic_t gDmaStatMemTypeCoherent = ATOMIC_INIT(0); - #include "dma_device.c" /* ---- Private Function Prototypes -------------------------------------- */ @@ -79,34 +61,6 @@ static atomic_t gDmaStatMemTypeCoherent = ATOMIC_INIT(0); /****************************************************************************/ /** -* Displays information for /proc/dma/mem-type -*/ -/****************************************************************************/ - -static int dma_proc_read_mem_type(char *buf, char **start, off_t offset, - int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(buf + len, "dma_map_mem statistics\n"); - len += - sprintf(buf + len, "coherent: %d\n", - atomic_read(&gDmaStatMemTypeCoherent)); - len += - sprintf(buf + len, "kmalloc: %d\n", - atomic_read(&gDmaStatMemTypeKmalloc)); - len += - sprintf(buf + len, "vmalloc: %d\n", - atomic_read(&gDmaStatMemTypeVmalloc)); - len += - sprintf(buf + len, "user: %d\n", - atomic_read(&gDmaStatMemTypeUser)); - - return len; -} - -/****************************************************************************/ -/** * Displays information for /proc/dma/channels */ /****************************************************************************/ @@ -846,8 +800,6 @@ int dma_init(void) dma_proc_read_channels, NULL); create_proc_read_entry("devices", 0, gDmaDir, dma_proc_read_devices, NULL); - create_proc_read_entry("mem-type", 0, gDmaDir, - dma_proc_read_mem_type, NULL); } out: @@ -1565,767 +1517,3 @@ int dma_set_device_handler(DMA_Device_t dev, /* Device to set the callback for. } EXPORT_SYMBOL(dma_set_device_handler); - -/****************************************************************************/ -/** -* Initializes a memory mapping structure -*/ -/****************************************************************************/ - -int dma_init_mem_map(DMA_MemMap_t *memMap) -{ - memset(memMap, 0, sizeof(*memMap)); - - sema_init(&memMap->lock, 1); - - return 0; -} - -EXPORT_SYMBOL(dma_init_mem_map); - -/****************************************************************************/ -/** -* Releases any memory currently being held by a memory mapping structure. -*/ -/****************************************************************************/ - -int dma_term_mem_map(DMA_MemMap_t *memMap) -{ - down(&memMap->lock); /* Just being paranoid */ - - /* Free up any allocated memory */ - - up(&memMap->lock); - memset(memMap, 0, sizeof(*memMap)); - - return 0; -} - -EXPORT_SYMBOL(dma_term_mem_map); - -/****************************************************************************/ -/** -* Looks at a memory address and categorizes it. -* -* @return One of the values from the DMA_MemType_t enumeration. -*/ -/****************************************************************************/ - -DMA_MemType_t dma_mem_type(void *addr) -{ - unsigned long addrVal = (unsigned long)addr; - - if (addrVal >= CONSISTENT_BASE) { - /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */ - - /* dma_alloc_xxx pages are physically and virtually contiguous */ - - return DMA_MEM_TYPE_DMA; - } - - /* Technically, we could add one more classification. Addresses between VMALLOC_END */ - /* and the beginning of the DMA virtual address could be considered to be I/O space. */ - /* Right now, nobody cares about this particular classification, so we ignore it. */ - - if (is_vmalloc_addr(addr)) { - /* Address comes from the vmalloc'd region. Pages are virtually */ - /* contiguous but NOT physically contiguous */ - - return DMA_MEM_TYPE_VMALLOC; - } - - if (addrVal >= PAGE_OFFSET) { - /* PAGE_OFFSET is typically 0xC0000000 */ - - /* kmalloc'd pages are physically contiguous */ - - return DMA_MEM_TYPE_KMALLOC; - } - - return DMA_MEM_TYPE_USER; -} - -EXPORT_SYMBOL(dma_mem_type); - -/****************************************************************************/ -/** -* Looks at a memory address and determines if we support DMA'ing to/from -* that type of memory. -* -* @return boolean - -* return value != 0 means dma supported -* return value == 0 means dma not supported -*/ -/****************************************************************************/ - -int dma_mem_supports_dma(void *addr) -{ - DMA_MemType_t memType = dma_mem_type(addr); - - return (memType == DMA_MEM_TYPE_DMA) -#if ALLOW_MAP_OF_KMALLOC_MEMORY - || (memType == DMA_MEM_TYPE_KMALLOC) -#endif - || (memType == DMA_MEM_TYPE_USER); -} - -EXPORT_SYMBOL(dma_mem_supports_dma); - -/****************************************************************************/ -/** -* Maps in a memory region such that it can be used for performing a DMA. -* -* @return -*/ -/****************************************************************************/ - -int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */ - enum dma_data_direction dir /* Direction that the mapping will be going */ - ) { - int rc; - - down(&memMap->lock); - - DMA_MAP_PRINT("memMap: %p\n", memMap); - - if (memMap->inUse) { - printk(KERN_ERR "%s: memory map %p is already being used\n", - __func__, memMap); - rc = -EBUSY; - goto out; - } - - memMap->inUse = 1; - memMap->dir = dir; - memMap->numRegionsUsed = 0; - - rc = 0; - -out: - - DMA_MAP_PRINT("returning %d", rc); - - up(&memMap->lock); - - return rc; -} - -EXPORT_SYMBOL(dma_map_start); - -/****************************************************************************/ -/** -* Adds a segment of memory to a memory map. Each segment is both -* physically and virtually contiguous. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -static int dma_map_add_segment(DMA_MemMap_t *memMap, /* Stores state information about the map */ - DMA_Region_t *region, /* Region that the segment belongs to */ - void *virtAddr, /* Virtual address of the segment being added */ - dma_addr_t physAddr, /* Physical address of the segment being added */ - size_t numBytes /* Number of bytes of the segment being added */ - ) { - DMA_Segment_t *segment; - - DMA_MAP_PRINT("memMap:%p va:%p pa:0x%x #:%d\n", memMap, virtAddr, - physAddr, numBytes); - - /* Sanity check */ - - if (((unsigned long)virtAddr < (unsigned long)region->virtAddr) - || (((unsigned long)virtAddr + numBytes)) > - ((unsigned long)region->virtAddr + region->numBytes)) { - printk(KERN_ERR - "%s: virtAddr %p is outside region @ %p len: %d\n", - __func__, virtAddr, region->virtAddr, region->numBytes); - return -EINVAL; - } - - if (region->numSegmentsUsed > 0) { - /* Check to see if this segment is physically contiguous with the previous one */ - - segment = ®ion->segment[region->numSegmentsUsed - 1]; - - if ((segment->physAddr + segment->numBytes) == physAddr) { - /* It is - just add on to the end */ - - DMA_MAP_PRINT("appending %d bytes to last segment\n", - numBytes); - - segment->numBytes += numBytes; - - return 0; - } - } - - /* Reallocate to hold more segments, if required. */ - - if (region->numSegmentsUsed >= region->numSegmentsAllocated) { - DMA_Segment_t *newSegment; - size_t oldSize = - region->numSegmentsAllocated * sizeof(*newSegment); - int newAlloc = region->numSegmentsAllocated + 4; - size_t newSize = newAlloc * sizeof(*newSegment); - - newSegment = kmalloc(newSize, GFP_KERNEL); - if (newSegment == NULL) { - return -ENOMEM; - } - memcpy(newSegment, region->segment, oldSize); - memset(&((uint8_t *) newSegment)[oldSize], 0, - newSize - oldSize); - kfree(region->segment); - - region->numSegmentsAllocated = newAlloc; - region->segment = newSegment; - } - - segment = ®ion->segment[region->numSegmentsUsed]; - region->numSegmentsUsed++; - - segment->virtAddr = virtAddr; - segment->physAddr = physAddr; - segment->numBytes = numBytes; - - DMA_MAP_PRINT("returning success\n"); - - return 0; -} - -/****************************************************************************/ -/** -* Adds a region of memory to a memory map. Each region is virtually -* contiguous, but not necessarily physically contiguous. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */ - void *mem, /* Virtual address that we want to get a map of */ - size_t numBytes /* Number of bytes being mapped */ - ) { - unsigned long addr = (unsigned long)mem; - unsigned int offset; - int rc = 0; - DMA_Region_t *region; - dma_addr_t physAddr; - - down(&memMap->lock); - - DMA_MAP_PRINT("memMap:%p va:%p #:%d\n", memMap, mem, numBytes); - - if (!memMap->inUse) { - printk(KERN_ERR "%s: Make sure you call dma_map_start first\n", - __func__); - rc = -EINVAL; - goto out; - } - - /* Reallocate to hold more regions. */ - - if (memMap->numRegionsUsed >= memMap->numRegionsAllocated) { - DMA_Region_t *newRegion; - size_t oldSize = - memMap->numRegionsAllocated * sizeof(*newRegion); - int newAlloc = memMap->numRegionsAllocated + 4; - size_t newSize = newAlloc * sizeof(*newRegion); - - newRegion = kmalloc(newSize, GFP_KERNEL); - if (newRegion == NULL) { - rc = -ENOMEM; - goto out; - } - memcpy(newRegion, memMap->region, oldSize); - memset(&((uint8_t *) newRegion)[oldSize], 0, newSize - oldSize); - - kfree(memMap->region); - - memMap->numRegionsAllocated = newAlloc; - memMap->region = newRegion; - } - - region = &memMap->region[memMap->numRegionsUsed]; - memMap->numRegionsUsed++; - - offset = addr & ~PAGE_MASK; - - region->memType = dma_mem_type(mem); - region->virtAddr = mem; - region->numBytes = numBytes; - region->numSegmentsUsed = 0; - region->numLockedPages = 0; - region->lockedPages = NULL; - - switch (region->memType) { - case DMA_MEM_TYPE_VMALLOC: - { - atomic_inc(&gDmaStatMemTypeVmalloc); - - /* printk(KERN_ERR "%s: vmalloc'd pages are not supported\n", __func__); */ - - /* vmalloc'd pages are not physically contiguous */ - - rc = -EINVAL; - break; - } - - case DMA_MEM_TYPE_KMALLOC: - { - atomic_inc(&gDmaStatMemTypeKmalloc); - - /* kmalloc'd pages are physically contiguous, so they'll have exactly */ - /* one segment */ - -#if ALLOW_MAP_OF_KMALLOC_MEMORY - physAddr = - dma_map_single(NULL, mem, numBytes, memMap->dir); - rc = dma_map_add_segment(memMap, region, mem, physAddr, - numBytes); -#else - rc = -EINVAL; -#endif - break; - } - - case DMA_MEM_TYPE_DMA: - { - /* dma_alloc_xxx pages are physically contiguous */ - - atomic_inc(&gDmaStatMemTypeCoherent); - - physAddr = (vmalloc_to_pfn(mem) << PAGE_SHIFT) + offset; - - dma_sync_single_for_cpu(NULL, physAddr, numBytes, - memMap->dir); - rc = dma_map_add_segment(memMap, region, mem, physAddr, - numBytes); - break; - } - - case DMA_MEM_TYPE_USER: - { - size_t firstPageOffset; - size_t firstPageSize; - struct page **pages; - struct task_struct *userTask; - - atomic_inc(&gDmaStatMemTypeUser); - -#if 1 - /* If the pages are user pages, then the dma_mem_map_set_user_task function */ - /* must have been previously called. */ - - if (memMap->userTask == NULL) { - printk(KERN_ERR - "%s: must call dma_mem_map_set_user_task when using user-mode memory\n", - __func__); - return -EINVAL; - } - - /* User pages need to be locked. */ - - firstPageOffset = - (unsigned long)region->virtAddr & (PAGE_SIZE - 1); - firstPageSize = PAGE_SIZE - firstPageOffset; - - region->numLockedPages = (firstPageOffset - + region->numBytes + - PAGE_SIZE - 1) / PAGE_SIZE; - pages = - kmalloc(region->numLockedPages * - sizeof(struct page *), GFP_KERNEL); - - if (pages == NULL) { - region->numLockedPages = 0; - return -ENOMEM; - } - - userTask = memMap->userTask; - - down_read(&userTask->mm->mmap_sem); - rc = get_user_pages(userTask, /* task */ - userTask->mm, /* mm */ - (unsigned long)region->virtAddr, /* start */ - region->numLockedPages, /* len */ - memMap->dir == DMA_FROM_DEVICE, /* write */ - 0, /* force */ - pages, /* pages (array of pointers to page) */ - NULL); /* vmas */ - up_read(&userTask->mm->mmap_sem); - - if (rc != region->numLockedPages) { - kfree(pages); - region->numLockedPages = 0; - - if (rc >= 0) { - rc = -EINVAL; - } - } else { - uint8_t *virtAddr = region->virtAddr; - size_t bytesRemaining; - int pageIdx; - - rc = 0; /* Since get_user_pages returns +ve number */ - - region->lockedPages = pages; - - /* We've locked the user pages. Now we need to walk them and figure */ - /* out the physical addresses. */ - - /* The first page may be partial */ - - dma_map_add_segment(memMap, - region, - virtAddr, - PFN_PHYS(page_to_pfn - (pages[0])) + - firstPageOffset, - firstPageSize); - - virtAddr += firstPageSize; - bytesRemaining = - region->numBytes - firstPageSize; - - for (pageIdx = 1; - pageIdx < region->numLockedPages; - pageIdx++) { - size_t bytesThisPage = - (bytesRemaining > - PAGE_SIZE ? PAGE_SIZE : - bytesRemaining); - - DMA_MAP_PRINT - ("pageIdx:%d pages[pageIdx]=%p pfn=%u phys=%u\n", - pageIdx, pages[pageIdx], - page_to_pfn(pages[pageIdx]), - PFN_PHYS(page_to_pfn - (pages[pageIdx]))); - - dma_map_add_segment(memMap, - region, - virtAddr, - PFN_PHYS(page_to_pfn - (pages - [pageIdx])), - bytesThisPage); - - virtAddr += bytesThisPage; - bytesRemaining -= bytesThisPage; - } - } -#else - printk(KERN_ERR - "%s: User mode pages are not yet supported\n", - __func__); - - /* user pages are not physically contiguous */ - - rc = -EINVAL; -#endif - break; - } - - default: - { - printk(KERN_ERR "%s: Unsupported memory type: %d\n", - __func__, region->memType); - - rc = -EINVAL; - break; - } - } - - if (rc != 0) { - memMap->numRegionsUsed--; - } - -out: - - DMA_MAP_PRINT("returning %d\n", rc); - - up(&memMap->lock); - - return rc; -} - -EXPORT_SYMBOL(dma_map_add_segment); - -/****************************************************************************/ -/** -* Maps in a memory region such that it can be used for performing a DMA. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */ - void *mem, /* Virtual address that we want to get a map of */ - size_t numBytes, /* Number of bytes being mapped */ - enum dma_data_direction dir /* Direction that the mapping will be going */ - ) { - int rc; - - rc = dma_map_start(memMap, dir); - if (rc == 0) { - rc = dma_map_add_region(memMap, mem, numBytes); - if (rc < 0) { - /* Since the add fails, this function will fail, and the caller won't */ - /* call unmap, so we need to do it here. */ - - dma_unmap(memMap, 0); - } - } - - return rc; -} - -EXPORT_SYMBOL(dma_map_mem); - -/****************************************************************************/ -/** -* Setup a descriptor ring for a given memory map. -* -* It is assumed that the descriptor ring has already been initialized, and -* this routine will only reallocate a new descriptor ring if the existing -* one is too small. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */ - DMA_MemMap_t *memMap, /* Memory map that will be used */ - dma_addr_t devPhysAddr /* Physical address of device */ - ) { - int rc; - int numDescriptors; - DMA_DeviceAttribute_t *devAttr; - DMA_Region_t *region; - DMA_Segment_t *segment; - dma_addr_t srcPhysAddr; - dma_addr_t dstPhysAddr; - int regionIdx; - int segmentIdx; - - devAttr = &DMA_gDeviceAttribute[dev]; - - down(&memMap->lock); - - /* Figure out how many descriptors we need */ - - numDescriptors = 0; - for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) { - region = &memMap->region[regionIdx]; - - for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed; - segmentIdx++) { - segment = ®ion->segment[segmentIdx]; - - if (memMap->dir == DMA_TO_DEVICE) { - srcPhysAddr = segment->physAddr; - dstPhysAddr = devPhysAddr; - } else { - srcPhysAddr = devPhysAddr; - dstPhysAddr = segment->physAddr; - } - - rc = - dma_calculate_descriptor_count(dev, srcPhysAddr, - dstPhysAddr, - segment-> - numBytes); - if (rc < 0) { - printk(KERN_ERR - "%s: dma_calculate_descriptor_count failed: %d\n", - __func__, rc); - goto out; - } - numDescriptors += rc; - } - } - - /* Adjust the size of the ring, if it isn't big enough */ - - if (numDescriptors > devAttr->ring.descriptorsAllocated) { - dma_free_descriptor_ring(&devAttr->ring); - rc = - dma_alloc_descriptor_ring(&devAttr->ring, - numDescriptors); - if (rc < 0) { - printk(KERN_ERR - "%s: dma_alloc_descriptor_ring failed: %d\n", - __func__, rc); - goto out; - } - } else { - rc = - dma_init_descriptor_ring(&devAttr->ring, - numDescriptors); - if (rc < 0) { - printk(KERN_ERR - "%s: dma_init_descriptor_ring failed: %d\n", - __func__, rc); - goto out; - } - } - - /* Populate the descriptors */ - - for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) { - region = &memMap->region[regionIdx]; - - for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed; - segmentIdx++) { - segment = ®ion->segment[segmentIdx]; - - if (memMap->dir == DMA_TO_DEVICE) { - srcPhysAddr = segment->physAddr; - dstPhysAddr = devPhysAddr; - } else { - srcPhysAddr = devPhysAddr; - dstPhysAddr = segment->physAddr; - } - - rc = - dma_add_descriptors(&devAttr->ring, dev, - srcPhysAddr, dstPhysAddr, - segment->numBytes); - if (rc < 0) { - printk(KERN_ERR - "%s: dma_add_descriptors failed: %d\n", - __func__, rc); - goto out; - } - } - } - - rc = 0; - -out: - - up(&memMap->lock); - return rc; -} - -EXPORT_SYMBOL(dma_map_create_descriptor_ring); - -/****************************************************************************/ -/** -* Maps in a memory region such that it can be used for performing a DMA. -* -* @return -*/ -/****************************************************************************/ - -int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */ - int dirtied /* non-zero if any of the pages were modified */ - ) { - - int rc = 0; - int regionIdx; - int segmentIdx; - DMA_Region_t *region; - DMA_Segment_t *segment; - - down(&memMap->lock); - - for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) { - region = &memMap->region[regionIdx]; - - for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed; - segmentIdx++) { - segment = ®ion->segment[segmentIdx]; - - switch (region->memType) { - case DMA_MEM_TYPE_VMALLOC: - { - printk(KERN_ERR - "%s: vmalloc'd pages are not yet supported\n", - __func__); - rc = -EINVAL; - goto out; - } - - case DMA_MEM_TYPE_KMALLOC: - { -#if ALLOW_MAP_OF_KMALLOC_MEMORY - dma_unmap_single(NULL, - segment->physAddr, - segment->numBytes, - memMap->dir); -#endif - break; - } - - case DMA_MEM_TYPE_DMA: - { - dma_sync_single_for_cpu(NULL, - segment-> - physAddr, - segment-> - numBytes, - memMap->dir); - break; - } - - case DMA_MEM_TYPE_USER: - { - /* Nothing to do here. */ - - break; - } - - default: - { - printk(KERN_ERR - "%s: Unsupported memory type: %d\n", - __func__, region->memType); - rc = -EINVAL; - goto out; - } - } - - segment->virtAddr = NULL; - segment->physAddr = 0; - segment->numBytes = 0; - } - - if (region->numLockedPages > 0) { - int pageIdx; - - /* Some user pages were locked. We need to go and unlock them now. */ - - for (pageIdx = 0; pageIdx < region->numLockedPages; - pageIdx++) { - struct page *page = - region->lockedPages[pageIdx]; - - if (memMap->dir == DMA_FROM_DEVICE) { - SetPageDirty(page); - } - page_cache_release(page); - } - kfree(region->lockedPages); - region->numLockedPages = 0; - region->lockedPages = NULL; - } - - region->memType = DMA_MEM_TYPE_NONE; - region->virtAddr = NULL; - region->numBytes = 0; - region->numSegmentsUsed = 0; - } - memMap->userTask = NULL; - memMap->numRegionsUsed = 0; - memMap->inUse = 0; - -out: - up(&memMap->lock); - - return rc; -} - -EXPORT_SYMBOL(dma_unmap); diff --git a/arch/arm/mach-bcmring/include/mach/dma.h b/arch/arm/mach-bcmring/include/mach/dma.h index 1f2c5319c056..72543781207b 100644 --- a/arch/arm/mach-bcmring/include/mach/dma.h +++ b/arch/arm/mach-bcmring/include/mach/dma.h @@ -26,15 +26,9 @@ /* ---- Include Files ---------------------------------------------------- */ #include <linux/kernel.h> -#include <linux/wait.h> #include <linux/semaphore.h> #include <csp/dmacHw.h> #include <mach/timer.h> -#include <linux/scatterlist.h> -#include <linux/dma-mapping.h> -#include <linux/mm.h> -#include <linux/vmalloc.h> -#include <linux/pagemap.h> /* ---- Constants and Types ---------------------------------------------- */ @@ -113,78 +107,6 @@ typedef struct { /**************************************************************************** * -* The DMA_MemType_t and DMA_MemMap_t are helper structures used to setup -* DMA chains from a variety of memory sources. -* -*****************************************************************************/ - -#define DMA_MEM_MAP_MIN_SIZE 4096 /* Pages less than this size are better */ - /* off not being DMA'd. */ - -typedef enum { - DMA_MEM_TYPE_NONE, /* Not a valid setting */ - DMA_MEM_TYPE_VMALLOC, /* Memory came from vmalloc call */ - DMA_MEM_TYPE_KMALLOC, /* Memory came from kmalloc call */ - DMA_MEM_TYPE_DMA, /* Memory came from dma_alloc_xxx call */ - DMA_MEM_TYPE_USER, /* Memory came from user space. */ - -} DMA_MemType_t; - -/* A segment represents a physically and virtually contiguous chunk of memory. */ -/* i.e. each segment can be DMA'd */ -/* A user of the DMA code will add memory regions. Each region may need to be */ -/* represented by one or more segments. */ - -typedef struct { - void *virtAddr; /* Virtual address used for this segment */ - dma_addr_t physAddr; /* Physical address this segment maps to */ - size_t numBytes; /* Size of the segment, in bytes */ - -} DMA_Segment_t; - -/* A region represents a virtually contiguous chunk of memory, which may be */ -/* made up of multiple segments. */ - -typedef struct { - DMA_MemType_t memType; - void *virtAddr; - size_t numBytes; - - /* Each region (virtually contiguous) consists of one or more segments. Each */ - /* segment is virtually and physically contiguous. */ - - int numSegmentsUsed; - int numSegmentsAllocated; - DMA_Segment_t *segment; - - /* When a region corresponds to user memory, we need to lock all of the pages */ - /* down before we can figure out the physical addresses. The lockedPage array contains */ - /* the pages that were locked, and which subsequently need to be unlocked once the */ - /* memory is unmapped. */ - - unsigned numLockedPages; - struct page **lockedPages; - -} DMA_Region_t; - -typedef struct { - int inUse; /* Is this mapping currently being used? */ - struct semaphore lock; /* Acquired when using this structure */ - enum dma_data_direction dir; /* Direction this transfer is intended for */ - - /* In the event that we're mapping user memory, we need to know which task */ - /* the memory is for, so that we can obtain the correct mm locks. */ - - struct task_struct *userTask; - - int numRegionsUsed; - int numRegionsAllocated; - DMA_Region_t *region; - -} DMA_MemMap_t; - -/**************************************************************************** -* * The DMA_DeviceAttribute_t contains information which describes a * particular DMA device (or peripheral). * @@ -570,124 +492,6 @@ int dma_alloc_double_dst_descriptors(DMA_Handle_t handle, /* DMA Handle */ /****************************************************************************/ /** -* Initializes a DMA_MemMap_t data structure -*/ -/****************************************************************************/ - -int dma_init_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */ - ); - -/****************************************************************************/ -/** -* Releases any memory currently being held by a memory mapping structure. -*/ -/****************************************************************************/ - -int dma_term_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */ - ); - -/****************************************************************************/ -/** -* Looks at a memory address and categorizes it. -* -* @return One of the values from the DMA_MemType_t enumeration. -*/ -/****************************************************************************/ - -DMA_MemType_t dma_mem_type(void *addr); - -/****************************************************************************/ -/** -* Sets the process (aka userTask) associated with a mem map. This is -* required if user-mode segments will be added to the mapping. -*/ -/****************************************************************************/ - -static inline void dma_mem_map_set_user_task(DMA_MemMap_t *memMap, - struct task_struct *task) -{ - memMap->userTask = task; -} - -/****************************************************************************/ -/** -* Looks at a memory address and determines if we support DMA'ing to/from -* that type of memory. -* -* @return boolean - -* return value != 0 means dma supported -* return value == 0 means dma not supported -*/ -/****************************************************************************/ - -int dma_mem_supports_dma(void *addr); - -/****************************************************************************/ -/** -* Initializes a memory map for use. Since this function acquires a -* sempaphore within the memory map, it is VERY important that dma_unmap -* be called when you're finished using the map. -*/ -/****************************************************************************/ - -int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */ - enum dma_data_direction dir /* Direction that the mapping will be going */ - ); - -/****************************************************************************/ -/** -* Adds a segment of memory to a memory map. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */ - void *mem, /* Virtual address that we want to get a map of */ - size_t numBytes /* Number of bytes being mapped */ - ); - -/****************************************************************************/ -/** -* Creates a descriptor ring from a memory mapping. -* -* @return 0 on success, error code otherwise. -*/ -/****************************************************************************/ - -int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */ - DMA_MemMap_t *memMap, /* Memory map that will be used */ - dma_addr_t devPhysAddr /* Physical address of device */ - ); - -/****************************************************************************/ -/** -* Maps in a memory region such that it can be used for performing a DMA. -* -* @return -*/ -/****************************************************************************/ - -int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */ - void *addr, /* Virtual address that we want to get a map of */ - size_t count, /* Number of bytes being mapped */ - enum dma_data_direction dir /* Direction that the mapping will be going */ - ); - -/****************************************************************************/ -/** -* Maps in a memory region such that it can be used for performing a DMA. -* -* @return -*/ -/****************************************************************************/ - -int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */ - int dirtied /* non-zero if any of the pages were modified */ - ); - -/****************************************************************************/ -/** * Initiates a transfer when the descriptors have already been setup. * * This is a special case, and normally, the dma_transfer_xxx functions should diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S index 94c950d783ba..2f316f0e6e69 100644 --- a/arch/arm/mach-bcmring/include/mach/entry-macro.S +++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S @@ -21,9 +21,6 @@ #include <mach/hardware.h> #include <mach/csp/mm_io.h> - .macro disable_fiq - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \base, =(MM_IO_BASE_INTC0) ldr \irqstat, [\base, #0] @ get status @@ -77,6 +74,3 @@ .macro get_irqnr_preamble, base, tmp .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h deleted file mode 100644 index dae5e9b166ea..000000000000 --- a/arch/arm/mach-bcmring/include/mach/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include <mach/hardware.h> - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h deleted file mode 100644 index cb78250db649..000000000000 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index ab1711b9b4d6..8736c1acc166 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c @@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd) { soft_restart(0); } + +static void clps711x_idle(void) +{ + clps_writel(1, HALT); + __asm__ __volatile__( + "mov r0, r0\n\ + mov r0, r0"); +} + +static int __init clps711x_idle_init(void) +{ + arm_pm_idle = clps711x_idle; + return 0; +} + +arch_initcall(clps711x_idle_init); diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S index 90fa2f70489f..125af59d7a29 100644 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S @@ -10,15 +10,9 @@ #include <mach/hardware.h> #include <asm/hardware/clps7111.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) #error INTSR stride != INTMR stride #endif diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h deleted file mode 100644 index 2e0b3ced8f07..000000000000 --- a/arch/arm/mach-clps711x/include/mach/io.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * arch/arm/mach-clps711x/include/mach/io.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -/* - * We don't support ins[lb]/outs[lb]. Make them fault. - */ -#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0) - -#endif diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h deleted file mode 100644 index 23d6ef8c84da..000000000000 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-clps711x/include/mach/system.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <linux/io.h> -#include <mach/hardware.h> -#include <asm/hardware/clps7111.h> - -static inline void arch_idle(void) -{ - clps_writel(1, HALT); - __asm__ __volatile__( - "mov r0, r0\n\ - mov r0, r0"); -} - -#endif diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h index 7164310dea7c..35ed731b9f16 100644 --- a/arch/arm/mach-clps711x/include/mach/uncompress.h +++ b/arch/arm/mach-clps711x/include/mach/uncompress.h @@ -17,7 +17,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <mach/io.h> #include <mach/hardware.h> #include <asm/hardware/clps7111.h> diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 941a308e1253..031805b1428d 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -72,13 +72,13 @@ void __init cns3xxx_map_io(void) /* used by entry-macro.S */ void __init cns3xxx_init_irq(void) { - gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), - __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); + gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), + IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); } void cns3xxx_power_off(void) { - u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT); + u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT); u32 clkctrl; printk(KERN_INFO "powering system down...\n"); @@ -237,7 +237,7 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq) static void __init cns3xxx_timer_init(void) { - cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT); + cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT); __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0); } diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c index 79d1fb02c23f..1e40c99b015f 100644 --- a/arch/arm/mach-cns3xxx/devices.c +++ b/arch/arm/mach-cns3xxx/devices.c @@ -98,7 +98,7 @@ static struct platform_device cns3xxx_sdhci_pdev = { void __init cns3xxx_sdhci_init(void) { - u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014); + u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014); u32 gpioa_pins = __raw_readl(gpioa); /* MMC/SD pins share with GPIOA */ diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S deleted file mode 100644 index 01c57df5f716..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Low-level IRQ helper macros for Cavium Networks platforms - * - * Copyright 2008 Cavium Networks - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, Version 2, as - * published by the Free Software Foundation. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-cns3xxx/include/mach/io.h b/arch/arm/mach-cns3xxx/include/mach/io.h deleted file mode 100644 index 33b6fc1ece7c..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/io.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright 2008 Cavium Networks - * Copyright 2003 ARM Limited - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, Version 2, as - * published by the Free Software Foundation. - */ -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h deleted file mode 100644 index 9e56b7dc133a..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright 2000 Deep Blue Solutions Ltd - * Copyright 2003 ARM Limited - * Copyright 2008 Cavium Networks - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, Version 2, as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_SYSTEM_H -#define __MACH_SYSTEM_H - -#include <asm/proc-fns.h> - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 6b22b543a83f..d5088900af6c 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -44,7 +44,7 @@ #include <mach/aemif.h> #include <mach/spi.h> -#define DA850_EVM_PHY_ID "0:00" +#define DA850_EVM_PHY_ID "davinci_mdio-0:00" #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 346e1de2f5a8..849311d3cb7c 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -54,7 +54,7 @@ static inline int have_tvp7002(void) return 0; } -#define DM365_EVM_PHY_ID "0:01" +#define DM365_EVM_PHY_ID "davinci_mdio-0:01" /* * A MAX-II CPLD is used for various board control functions. */ diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index a64b49cfedca..1247ecdcf752 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -40,7 +40,7 @@ #include <mach/usb.h> #include <mach/aemif.h> -#define DM644X_EVM_PHY_ID "0:01" +#define DM644X_EVM_PHY_ID "davinci_mdio-0:01" #define LXT971_PHY_ID (0x001378e2) #define LXT971_PHY_MASK (0xfffffff0) diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 64017558860b..872ac69fa049 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -736,7 +736,7 @@ static struct davinci_uart_config uart_config __initdata = { .enabled_uarts = (1 << 0), }; -#define DM646X_EVM_PHY_ID "0:01" +#define DM646X_EVM_PHY_ID "davinci_mdio-0:01" /* * The following EDMA channels/slots are not being used by drivers (for * example: Timer, GPIO, UART events etc) on dm646x, hence they are being diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 6c4a16415d47..8d34f513d415 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -39,7 +39,7 @@ #include <mach/mmc.h> #include <mach/usb.h> -#define NEUROS_OSD2_PHY_ID "0:01" +#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01" #define LXT971_PHY_ID 0x001378e2 #define LXT971_PHY_MASK 0xfffffff0 diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index e7c0c7c53493..45e815760a27 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -21,7 +21,7 @@ #include <mach/da8xx.h> #include <mach/mux.h> -#define HAWKBOARD_PHY_ID "0:07" +#define HAWKBOARD_PHY_ID "davinci_mdio-0:07" #define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) #define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 0b136a831c59..31da3c5b2ba3 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c @@ -42,7 +42,7 @@ #include <mach/mux.h> #include <mach/usb.h> -#define SFFSDR_PHY_ID "0:01" +#define SFFSDR_PHY_ID "davinci_mdio-0:01" static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { /* U-Boot Environment: Block 0 * UBL: Block 1 diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 0ed7fdb64efb..992c4c410185 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -153,34 +153,6 @@ static struct clk pll1_sysclk3 = { .div_reg = PLLDIV3, }; -static struct clk pll1_sysclk4 = { - .name = "pll1_sysclk4", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV4, -}; - -static struct clk pll1_sysclk5 = { - .name = "pll1_sysclk5", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV5, -}; - -static struct clk pll1_sysclk6 = { - .name = "pll0_sysclk6", - .parent = &pll0_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV6, -}; - -static struct clk pll1_sysclk7 = { - .name = "pll1_sysclk7", - .parent = &pll1_clk, - .flags = CLK_PLL, - .div_reg = PLLDIV7, -}; - static struct clk i2c0_clk = { .name = "i2c0", .parent = &pll0_aux_clk, @@ -397,10 +369,6 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "pll1_aux", &pll1_aux_clk), CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), - CLK(NULL, "pll1_sysclk4", &pll1_sysclk4), - CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), - CLK(NULL, "pll1_sysclk6", &pll1_sysclk6), - CLK(NULL, "pll1_sysclk7", &pll1_sysclk7), CLK("i2c_davinci.1", NULL, &i2c0_clk), CLK(NULL, "timer0", &timerp64_0_clk), CLK("watchdog", NULL, &timerp64_1_clk), diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S index e14c0dc0e12c..768b3c060214 100644 --- a/arch/arm/mach-davinci/include/mach/entry-macro.S +++ b/arch/arm/mach-davinci/include/mach/entry-macro.S @@ -8,20 +8,13 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ -#include <mach/io.h> #include <mach/irqs.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =davinci_intc_base ldr \base, [\base] .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) ldr \tmp, =davinci_intc_type diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index 414e0b93e741..0be260bff9d5 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h @@ -32,10 +32,4 @@ #define __IO_ADDRESS(x) ((x) + IO_OFFSET) #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) -#ifdef __ASSEMBLER__ -#define IOMEM(x) x -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h deleted file mode 100644 index b2267d1e1a71..000000000000 --- a/arch/arm/mach-davinci/include/mach/io.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * DaVinci IO address definitions - * - * Copied from include/asm/arm/arch-omap/io.h - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) -#define __mem_isa(a) (a) - -#endif /* __ASM_ARCH_IO_H */ diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h deleted file mode 100644 index fcb7a015aba5..000000000000 --- a/arch/arm/mach-davinci/include/mach/system.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * DaVinci system defines - * - * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <mach/common.h> - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 9dc7cf9664fe..da2fb2c2155a 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h @@ -25,6 +25,8 @@ #include <mach/serial.h> +#define IOMEM(x) ((void __force __iomem *)(x)) + u32 *uart; /* PORT_16C550A, in polled non-fifo mode */ diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c index 98b8c83b09ab..2a06c0163418 100644 --- a/arch/arm/mach-dove/addr-map.c +++ b/arch/arm/mach-dove/addr-map.c @@ -14,6 +14,7 @@ #include <linux/io.h> #include <asm/mach/arch.h> #include <asm/setup.h> +#include <mach/dove.h> #include <plat/addr-map.h> #include "common.h" diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S index e84c78c2a8b7..72d622baaad3 100644 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ b/arch/arm/mach-dove/include/mach/entry-macro.S @@ -10,12 +10,6 @@ #include <mach/bridge-regs.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h index eb4936ff90ad..29c8b85355a5 100644 --- a/arch/arm/mach-dove/include/mach/io.h +++ b/arch/arm/mach-dove/include/mach/io.h @@ -15,6 +15,5 @@ #define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \ DOVE_PCIE0_IO_VIRT_BASE)) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h deleted file mode 100644 index 3027954f6162..000000000000 --- a/arch/arm/mach-dove/include/mach/system.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 294aad07f7a0..b049edbdf152 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -119,6 +119,20 @@ static void __init ebsa110_map_io(void) iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc)); } +static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size, + unsigned int flags, void *caller) +{ + return (void __iomem *)cookie; +} + +static void ebsa110_iounmap(volatile void __iomem *io_addr) +{} + +static void __init ebsa110_init_early(void) +{ + arch_ioremap_caller = ebsa110_ioremap_caller; + arch_iounmap = ebsa110_iounmap; +} #define PIT_CTRL (PIT_BASE + 0x0d) #define PIT_T2 (PIT_BASE + 0x09) @@ -271,8 +285,33 @@ static struct platform_device *ebsa110_devices[] = { &am79c961_device, }; +/* + * EBSA110 idling methodology: + * + * We can not execute the "wait for interrupt" instruction since that + * will stop our MCLK signal (which provides the clock for the glue + * logic, and therefore the timer interrupt). + * + * Instead, we spin, polling the IRQ_STAT register for the occurrence + * of any interrupt with core clock down to the memory clock. + */ +static void ebsa110_idle(void) +{ + const char *irq_stat = (char *)0xff000000; + + /* disable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); + + /* wait for an interrupt to occur */ + while (!*irq_stat); + + /* enable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); +} + static int __init ebsa110_init(void) { + arm_pm_idle = ebsa110_idle; return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); } @@ -290,6 +329,7 @@ MACHINE_START(EBSA110, "EBSA110") .reserve_lp2 = 1, .restart_mode = 's', .map_io = ebsa110_map_io, + .init_early = ebsa110_init_early, .init_irq = ebsa110_init_irq, .timer = &ebsa110_timer, .restart = ebsa110_restart, diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S index cc3e5992f6b3..14b110de78a9 100644 --- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S @@ -12,16 +12,10 @@ #define IRQ_STAT 0xff000000 /* read */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mov \base, #IRQ_STAT .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, stat, base, tmp ldrb \stat, [\base] @ get interrupts mov \irqnr, #0 diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h index 44679db672fb..11bb0799424b 100644 --- a/arch/arm/mach-ebsa110/include/mach/io.h +++ b/arch/arm/mach-ebsa110/include/mach/io.h @@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr); #define writew(v,b) __writew(v,b) #define writel(v,b) __writel(v,b) -static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size, - unsigned int flags) -{ - return (void __iomem *)cookie; -} - -#define __arch_ioremap __arch_ioremap -#define __arch_iounmap(cookie) do { } while (0) - extern void insb(unsigned int port, void *buf, int sz); extern void insw(unsigned int port, void *buf, int sz); extern void insl(unsigned int port, void *buf, int sz); diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h deleted file mode 100644 index 2e4af65edb6f..000000000000 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/arm/mach-ebsa110/include/mach/system.h - * - * Copyright (C) 1996-2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -/* - * EBSA110 idling methodology: - * - * We can not execute the "wait for interrupt" instruction since that - * will stop our MCLK signal (which provides the clock for the glue - * logic, and therefore the timer interrupt). - * - * Instead, we spin, polling the IRQ_STAT register for the occurrence - * of any interrupt with core clock down to the memory clock. - */ -static inline void arch_idle(void) -{ - const char *irq_stat = (char *)0xff000000; - - /* disable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); - - /* wait for an interrupt to occur */ - while (!*irq_stat); - - /* enable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); -} - -#endif diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 24203f9a6796..903edb02fe4f 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = { .set_mctrl = ep93xx_uart_set_mctrl, }; -static struct amba_device uart1_device = { - .dev = { - .init_name = "apb:uart1", - .platform_data = &ep93xx_uart_data, - }, - .res = { - .start = EP93XX_UART1_PHYS_BASE, - .end = EP93XX_UART1_PHYS_BASE + 0x0fff, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_EP93XX_UART1, NO_IRQ }, - .periphid = 0x00041010, -}; - -static struct amba_device uart2_device = { - .dev = { - .init_name = "apb:uart2", - .platform_data = &ep93xx_uart_data, - }, - .res = { - .start = EP93XX_UART2_PHYS_BASE, - .end = EP93XX_UART2_PHYS_BASE + 0x0fff, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_EP93XX_UART2, NO_IRQ }, - .periphid = 0x00041010, -}; +static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, + { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); -static struct amba_device uart3_device = { - .dev = { - .init_name = "apb:uart3", - .platform_data = &ep93xx_uart_data, - }, - .res = { - .start = EP93XX_UART3_PHYS_BASE, - .end = EP93XX_UART3_PHYS_BASE + 0x0fff, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_EP93XX_UART3, NO_IRQ }, - .periphid = 0x00041010, -}; +static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, + { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); +static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, + { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); static struct resource ep93xx_rtc_resource[] = { { diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S deleted file mode 100644 index 9be6edcf9045..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-ep93xx/include/mach/entry-macro.S - * IRQ demultiplexing for EP93xx - * - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h deleted file mode 100644 index 594b77f21054..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-ep93xx/include/mach/io.h - */ - -#ifndef __ASM_MACH_IO_H -#define __ASM_MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(p) __typesafe_io(p) -#define __mem_pci(p) (p) - -/* - * A typesafe __io() variation for variable initialisers - */ -#ifdef __ASSEMBLER__ -#define IOMEM(p) p -#else -#define IOMEM(p) ((void __iomem __force *)(p)) -#endif - -#endif /* __ASM_MACH_IO_H */ diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h deleted file mode 100644 index b5bec7cb9b52..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * arch/arm/mach-ep93xx/include/mach/system.h - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index c59e18871006..031c1e5b3dfe 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = { }, }; -static void exynos_idle(void) -{ - if (!need_resched()) - cpu_do_idle(); - - local_irq_enable(); -} - void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init); int __init exynos_init(void) { printk(KERN_INFO "EXYNOS: Initializing architecture\n"); - - /* set idle function */ - pm_idle = exynos_idle; - return device_register(&exynos4_dev); } diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index b10fcd270f07..91370def4a70 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c @@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { .peri_id = pdma0_peri, }; -struct amba_device exynos4_device_pdma0 = { - .dev = { - .init_name = "dma-pl330.0", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &exynos4_pdma0_pdata, - }, - .res = { - .start = EXYNOS4_PA_PDMA0, - .end = EXYNOS4_PA_PDMA0 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA0, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, + {IRQ_PDMA0}, &exynos4_pdma0_pdata); u8 pdma1_peri[] = { DMACH_PCM0_RX, @@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { .peri_id = pdma1_peri, }; -struct amba_device exynos4_device_pdma1 = { - .dev = { - .init_name = "dma-pl330.1", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &exynos4_pdma1_pdata, - }, - .res = { - .start = EXYNOS4_PA_PDMA1, - .end = EXYNOS4_PA_PDMA1 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA1, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, + {IRQ_PDMA1}, &exynos4_pdma1_pdata); static int __init exynos4_dma_init(void) { @@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void) dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); - amba_device_register(&exynos4_device_pdma0, &iomem_resource); + amba_device_register(&exynos4_pdma0_device, &iomem_resource); dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); - amba_device_register(&exynos4_device_pdma1, &iomem_resource); + amba_device_register(&exynos4_pdma1_device, &iomem_resource); return 0; } diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S deleted file mode 100644 index 3ba4f547534b..000000000000 --- a/arch/arm/mach-exynos/include/mach/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -/* arch/arm/mach-exynos4/include/mach/entry-macro.S - * - * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for EXYNOS4 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-exynos/include/mach/io.h b/arch/arm/mach-exynos/include/mach/io.h deleted file mode 100644 index d5478d247535..000000000000 --- a/arch/arm/mach-exynos/include/mach/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/io.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> - * - * Based on arch/arm/mach-s5p6442/include/mach/io.h - * - * Default IO routines for EXYNOS4 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H __FILE__ - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h deleted file mode 100644 index 0063a6de3dc8..000000000000 --- a/arch/arm/mach-exynos/include/mach/system.h +++ /dev/null @@ -1,20 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/system.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - system support header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -static void arch_idle(void) -{ - /* nothing here yet */ -} -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S index d3847be0c667..dabbd5c54a78 100644 --- a/arch/arm/mach-footbridge/include/mach/entry-macro.S +++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S @@ -14,9 +14,6 @@ .equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mov \base, #dc21285_high .if dc21285_low @@ -24,9 +21,6 @@ .endif .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base, #0x180] @ get interrupts diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h index 15a70396c27d..aba531eebbc6 100644 --- a/arch/arm/mach-footbridge/include/mach/io.h +++ b/arch/arm/mach-footbridge/include/mach/io.h @@ -27,18 +27,5 @@ * Translation of various region addresses to virtual addresses */ #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#if 1 -#define __mem_pci(a) (a) -#else - -static inline void __iomem *___mem_pci(void __iomem *p) -{ - unsigned long a = (unsigned long)p; - BUG_ON(a <= 0xc0000000 || a >= 0xe0000000); - return p; -} - -#define __mem_pci(a) ___mem_pci(a) -#endif #endif diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h deleted file mode 100644 index a174a5841bc2..000000000000 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-footbridge/include/mach/system.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index c5b24b95a76e..7355c0bbcb5e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := irq.o mm.o time.o devices.o gpio.o +obj-y := irq.o mm.o time.o devices.o gpio.o idle.o # Board-specific support obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c new file mode 100644 index 000000000000..92bbd6bb600a --- /dev/null +++ b/arch/arm/mach-gemini/idle.c @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-gemini/idle.c + */ + +#include <linux/init.h> +#include <asm/system.h> +#include <asm/proc-fns.h> + +static void gemini_idle(void) +{ + /* + * Because of broken hardware we have to enable interrupts or the CPU + * will never wakeup... Acctualy it is not very good to enable + * interrupts first since scheduler can miss a tick, but there is + * no other way around this. Platforms that needs it for power saving + * should call enable_hlt() in init code, since by default it is + * disabled. + */ + local_irq_enable(); + cpu_do_idle(); +} + +static int __init gemini_idle_init(void) +{ + arm_pm_idle = gemini_idle; + return 0; +} + +arch_initcall(gemini_idle_init); diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S index 1624f91a2b8b..f044e430bfa4 100644 --- a/arch/arm/mach-gemini/include/mach/entry-macro.S +++ b/arch/arm/mach-gemini/include/mach/entry-macro.S @@ -12,15 +12,9 @@ #define IRQ_STATUS 0x14 - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) ldr \irqnr, [\irqstat] diff --git a/arch/arm/mach-gemini/include/mach/io.h b/arch/arm/mach-gemini/include/mach/io.h deleted file mode 100644 index c548056b98b2..000000000000 --- a/arch/arm/mach-gemini/include/mach/io.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2001-2006 Storlink, Corp. - * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif /* __MACH_IO_H */ diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h index 4d9c1f872472..a33b5a1f8ab4 100644 --- a/arch/arm/mach-gemini/include/mach/system.h +++ b/arch/arm/mach-gemini/include/mach/system.h @@ -14,20 +14,6 @@ #include <mach/hardware.h> #include <mach/global_reg.h> -static inline void arch_idle(void) -{ - /* - * Because of broken hardware we have to enable interrupts or the CPU - * will never wakeup... Acctualy it is not very good to enable - * interrupts here since scheduler can miss a tick, but there is - * no other way around this. Platforms that needs it for power saving - * should call enable_hlt() in init code, since by default it is - * disabled. - */ - local_irq_enable(); - cpu_do_idle(); -} - static inline void arch_reset(char mode, const char *cmd) { __raw_writel(RESET_GLOBAL | RESET_CPU1, diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 9485a8fdf851..ca70e5fcc7ac 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c @@ -73,8 +73,8 @@ void __init gemini_init_irq(void) unsigned int i, mode = 0, level = 0; /* - * Disable arch_idle() by default since it is buggy - * For more info see arch/arm/mach-gemini/include/mach/system.h + * Disable the idle handler by default since it is buggy + * For more info see arch/arm/mach-gemini/idle.c */ disable_hlt(); diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index f8a2f6bb5483..e756d1ac00c2 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd) { CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; } + +static void h720x__idle(void) +{ + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; + nop(); + nop(); + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; + nop(); + nop(); +} + +static int __init h720x_idle_init(void) +{ + arm_pm_idle = h720x__idle; + return 0; +} + +arch_initcall(h720x_idle_init); diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S index c3948e5ba4a0..75267fad7012 100644 --- a/arch/arm/mach-h720x/include/mach/entry-macro.S +++ b/arch/arm/mach-h720x/include/mach/entry-macro.S @@ -8,15 +8,9 @@ * warranty of any kind, whether express or implied. */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) @ we could use the id register on H7202, but this is not diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h deleted file mode 100644 index 2c8659c21a93..000000000000 --- a/arch/arm/mach-h720x/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-h720x/include/mach/io.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * - * 09-19-2001 JJKIM - * Created from arch/arm/mach-l7200/include/mach/io.h - * - * 03-27-2003 Robert Schwebel <r.schwebel@pengutronix.de>: - * re-unified header files for h720x - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h deleted file mode 100644 index 16ac46e239aa..000000000000 --- a/arch/arm/mach-h720x/include/mach/system.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-h720x/include/mach/system.h - * - * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * arch/arm/mach-h720x/include/mach/system.h - * - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H -#include <mach/hardware.h> - -static void arch_idle(void) -{ - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; - nop(); - nop(); - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; - nop(); - nop(); -} - -#endif diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-highbank/include/mach/entry-macro.S +++ /dev/null @@ -1,5 +0,0 @@ - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-highbank/include/mach/io.h b/arch/arm/mach-highbank/include/mach/io.h deleted file mode 100644 index 70cfa3ba7697..000000000000 --- a/arch/arm/mach-highbank/include/mach/io.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#define __io(a) ({ (void)(a); __typesafe_io(0); }) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h deleted file mode 100644 index b1d8b5fbe373..000000000000 --- a/arch/arm/mach-highbank/include/mach/system.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright 2010-2011 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ -#ifndef __MACH_SYSTEM_H -#define __MACH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7b..04be18d87e45 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -34,35 +34,33 @@ static void imx3_idle(void) { unsigned long reg = 0; - if (!need_resched()) - __asm__ __volatile__( - /* disable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "bic %0, %0, #0x00001000\n" - "bic %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - /* invalidate I cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c5, 0\n" - /* clear and invalidate D cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c14, 0\n" - /* WFI */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c0, 4\n" - "nop\n" "nop\n" "nop\n" "nop\n" - "nop\n" "nop\n" "nop\n" - /* enable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - : "=r" (reg)); - local_irq_enable(); + __asm__ __volatile__( + /* disable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "bic %0, %0, #0x00001000\n" + "bic %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + /* invalidate I cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c5, 0\n" + /* clear and invalidate D cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c14, 0\n" + /* WFI */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c0, 4\n" + "nop\n" "nop\n" "nop\n" "nop\n" + "nop\n" "nop\n" "nop\n" + /* enable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "orr %0, %0, #0x00001000\n" + "orr %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + : "=r" (reg)); } -static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, - unsigned int mtype) +static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size, + unsigned int mtype, void *caller) { if (mtype == MT_DEVICE) { /* @@ -75,7 +73,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, mtype = MT_DEVICE_NONSHARED; } - return __arm_ioremap(phys_addr, size, mtype); + return __arm_ioremap_caller(phys_addr, size, mtype, caller); } void imx3_init_l2x0(void) @@ -134,8 +132,8 @@ void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); - pm_idle = imx3_idle; - imx_ioremap = imx3_ioremap; + arch_ioremap_caller = imx3_ioremap_caller; + arm_pm_idle = imx3_idle; } void __init mx31_init_irq(void) @@ -197,8 +195,8 @@ void __init imx35_init_early(void) mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - pm_idle = imx3_idle; - imx_ioremap = imx3_ioremap; + arm_pm_idle = imx3_idle; + arch_ioremap_caller = imx3_ioremap_caller; } void __init mx35_init_irq(void) diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index bc17dfea3817..49549a72dc7d 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { - if (!need_resched()) { - /* gpc clock is needed for SRPG */ - if (gpc_dvfs_clk == NULL) { - gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); - if (IS_ERR(gpc_dvfs_clk)) - goto err0; - } - clk_enable(gpc_dvfs_clk); - mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); - if (tzic_enable_wake()) - goto err1; - cpu_do_idle(); -err1: - clk_disable(gpc_dvfs_clk); + /* gpc clock is needed for SRPG */ + if (gpc_dvfs_clk == NULL) { + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); + if (IS_ERR(gpc_dvfs_clk)) + return; } -err0: - local_irq_enable(); + clk_enable(gpc_dvfs_clk); + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + if (tzic_enable_wake() != 0) + cpu_do_idle(); + clk_disable(gpc_dvfs_clk); } /* @@ -108,7 +102,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); - pm_idle = imx5_idle; + arm_pm_idle = imx5_idle; } void __init imx53_init_early(void) diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index e455d2f855bf..6fcffa7db978 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c @@ -10,7 +10,6 @@ #include <linux/kernel.h> #include <linux/suspend.h> #include <linux/io.h> -#include <mach/system.h> #include <mach/hardware.h> static int mx27_suspend_enter(suspend_state_t state) @@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) cscr &= 0xFFFFFFFC; __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); /* Executes WFI */ - arch_idle(); + cpu_do_idle(); break; default: diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 019f0ab08f66..15b87f26ac96 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -35,67 +35,23 @@ static struct amba_pl010_data integrator_uart_data; -static struct amba_device rtc_device = { - .dev = { - .init_name = "mb:15", - }, - .res = { - .start = INTEGRATOR_RTC_BASE, - .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_RTCINT, NO_IRQ }, -}; +#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } +#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } +#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } +#define KMI0_IRQ { IRQ_KMIINT0 } +#define KMI1_IRQ { IRQ_KMIINT1 } -static struct amba_device uart0_device = { - .dev = { - .init_name = "mb:16", - .platform_data = &integrator_uart_data, - }, - .res = { - .start = INTEGRATOR_UART0_BASE, - .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_UARTINT0, NO_IRQ }, -}; +static AMBA_APB_DEVICE(rtc, "mb:15", 0, + INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); -static struct amba_device uart1_device = { - .dev = { - .init_name = "mb:17", - .platform_data = &integrator_uart_data, - }, - .res = { - .start = INTEGRATOR_UART1_BASE, - .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_UARTINT1, NO_IRQ }, -}; +static AMBA_APB_DEVICE(uart0, "mb:16", 0, + INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); -static struct amba_device kmi0_device = { - .dev = { - .init_name = "mb:18", - }, - .res = { - .start = KMI0_BASE, - .end = KMI0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_KMIINT0, NO_IRQ }, -}; +static AMBA_APB_DEVICE(uart1, "mb:17", 0, + INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); -static struct amba_device kmi1_device = { - .dev = { - .init_name = "mb:19", - }, - .res = { - .start = KMI1_BASE, - .end = KMI1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_KMIINT1, NO_IRQ }, -}; +static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); +static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); static struct amba_device *amba_devs[] __initdata = { &rtc_device, diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 8cbb75a96bd4..3e538da6cb1f 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c @@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev) pc_base = dev->resource.start + idev->offset; - d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); + d = amba_device_alloc(NULL, pc_base, SZ_4K); if (!d) continue; dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); d->dev.parent = &dev->dev; - d->res.start = dev->resource.start + idev->offset; - d->res.end = d->res.start + SZ_4K - 1; - d->res.flags = IORESOURCE_MEM; d->irq[0] = dev->irq; d->irq[1] = dev->irq; d->periphid = idev->id; d->dev.platform_data = idev->platform_data; - ret = amba_device_register(d, &dev->resource); + ret = amba_device_add(d, &dev->resource); if (ret) { dev_err(&d->dev, "unable to register device: %d\n", ret); - kfree(d); + amba_device_put(d); } } diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S index 3d029c9f3ef6..5cc7b85ad9df 100644 --- a/arch/arm/mach-integrator/include/mach/entry-macro.S +++ b/arch/arm/mach-integrator/include/mach/entry-macro.S @@ -11,15 +11,9 @@ #include <mach/platform.h> #include <mach/irqs.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp /* FIXME: should not be using soo many LDRs here */ ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h index 37beed3fa3ed..8de70de3dd0a 100644 --- a/arch/arm/mach-integrator/include/mach/io.h +++ b/arch/arm/mach-integrator/include/mach/io.h @@ -29,6 +29,5 @@ #define PCI_IO_VADDR 0xee000000 #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h deleted file mode 100644 index 901514eba4a6..000000000000 --- a/arch/arm/mach-integrator/include/mach/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-integrator/include/mach/system.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a8b6aa6003f3..be9ead4a3bcc 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = { .gpio_cd = -1, }; -static struct amba_device mmc_device = { - .dev = { - .init_name = "mb:1c", - .platform_data = &mmc_data, - }, - .res = { - .start = INTEGRATOR_CP_MMC_BASE, - .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, - .periphid = 0, -}; +#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } +#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } -static struct amba_device aaci_device = { - .dev = { - .init_name = "mb:1d", - }, - .res = { - .start = INTEGRATOR_CP_AACI_BASE, - .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_CP_AACIINT, NO_IRQ }, - .periphid = 0, -}; +static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, + INTEGRATOR_CP_MMC_IRQS, &mmc_data); + +static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, + INTEGRATOR_CP_AACI_IRQS, NULL); /* @@ -425,21 +407,8 @@ static struct clcd_board clcd_data = { .remove = versatile_clcd_remove_dma, }; -static struct amba_device clcd_device = { - .dev = { - .init_name = "mb:c0", - .coherent_dma_mask = ~0, - .platform_data = &clcd_data, - }, - .res = { - .start = INTCP_PA_CLCD_BASE, - .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .dma_mask = ~0, - .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, - .periphid = 0, -}; +static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, + { IRQ_CP_CLCDCINT }, &clcd_data); static struct amba_device *amba_devs[] __initdata = { &mmc_device, diff --git a/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/arch/arm/mach-iop13xx/include/mach/entry-macro.S index a624a7870c64..1a2d603488d8 100644 --- a/arch/arm/mach-iop13xx/include/mach/entry-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/entry-macro.S @@ -16,9 +16,6 @@ * Place - Suite 330, Boston, MA 02111-1307 USA. * */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h index dffb234bb967..f13188518025 100644 --- a/arch/arm/mach-iop13xx/include/mach/io.h +++ b/arch/arm/mach-iop13xx/include/mach/io.h @@ -22,20 +22,7 @@ #define IO_SPACE_LIMIT 0xffffffff #define __io(a) __iop13xx_io(a) -#define __mem_pci(a) (a) -#define __mem_isa(a) (a) extern void __iomem * __iop13xx_io(unsigned long io_addr); -extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop13xx_iounmap(void __iomem *addr); - -extern u32 iop13xx_atue_mem_base; -extern u32 iop13xx_atux_mem_base; -extern size_t iop13xx_atue_mem_size; -extern size_t iop13xx_atux_mem_size; - -#define __arch_ioremap __iop13xx_ioremap -#define __arch_iounmap __iop13xx_iounmap #endif diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h index 07e9ff7adafb..e190dcd7d72d 100644 --- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h +++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h @@ -5,6 +5,7 @@ /* The ATU offsets can change based on the strapping */ extern u32 iop13xx_atux_pmmr_offset; extern u32 iop13xx_atue_pmmr_offset; +void iop13xx_init_early(void); void iop13xx_init_irq(void); void iop13xx_map_io(void); void iop13xx_platform_init(void); diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h deleted file mode 100644 index 1f31ed3f8ae2..000000000000 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop13xx/include/mach/system.h - * - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index 48642e66c566..3c364198db9c 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c @@ -21,6 +21,8 @@ #include <linux/io.h> #include <mach/hardware.h> +#include "pci.h" + void * __iomem __iop13xx_io(unsigned long io_addr) { void __iomem * io_virt; @@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr) } EXPORT_SYMBOL(__iop13xx_io); -void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype) +static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie, + size_t size, unsigned int mtype, void *caller) { void __iomem * retval; @@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, break; default: retval = __arm_ioremap_caller(cookie, size, mtype, - __builtin_return_address(0)); + caller); } return retval; } -EXPORT_SYMBOL(__iop13xx_ioremap); -void __iop13xx_iounmap(void __iomem *addr) +static void __iop13xx_iounmap(volatile void __iomem *addr) { - extern void __iounmap(volatile void __iomem *addr); - if (iop13xx_atue_mem_base) if (addr >= (void __iomem *) iop13xx_atue_mem_base && addr < (void __iomem *) (iop13xx_atue_mem_base + @@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr) skip: return; } -EXPORT_SYMBOL(__iop13xx_iounmap); + +void __init iop13xx_init_early(void) +{ + arch_ioremap_caller = __iop13xx_ioremap_caller; + arch_iounmap = __iop13xx_iounmap; +} diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index abaee8833588..5c96b73e6964 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = { MACHINE_START(IQ81340MC, "Intel IQ81340MC") /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ .atag_offset = 0x100, + .init_early = iop13xx_init_early, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, .timer = &iq81340mc_timer, diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 690916a09dc6..aa4dd750135a 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = { MACHINE_START(IQ81340SC, "Intel IQ81340SC") /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ .atag_offset = 0x100, + .init_early = iop13xx_init_early, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, .timer = &iq81340sc_timer, diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h new file mode 100644 index 000000000000..c70cf5b41e31 --- /dev/null +++ b/arch/arm/mach-iop13xx/pci.h @@ -0,0 +1,6 @@ +#include <linux/types.h> + +extern u32 iop13xx_atue_mem_base; +extern u32 iop13xx_atux_mem_base; +extern size_t iop13xx_atue_mem_size; +extern size_t iop13xx_atux_mem_size; diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S index b02fb56bafcc..ea13ae02d9b1 100644 --- a/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S @@ -9,9 +9,6 @@ */ #include <mach/iop32x.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h index 2d88264b9863..e2ada265bb8d 100644 --- a/arch/arm/mach-iop32x/include/mach/io.h +++ b/arch/arm/mach-iop32x/include/mach/io.h @@ -15,6 +15,5 @@ #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h deleted file mode 100644 index 4a88727bca98..000000000000 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/system.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-iop33x/include/mach/entry-macro.S b/arch/arm/mach-iop33x/include/mach/entry-macro.S index 4e1f7282b354..0a398fe1fba4 100644 --- a/arch/arm/mach-iop33x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop33x/include/mach/entry-macro.S @@ -9,9 +9,6 @@ */ #include <mach/iop33x.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h index a8a66fc8fbdb..f7c1b6595660 100644 --- a/arch/arm/mach-iop33x/include/mach/io.h +++ b/arch/arm/mach-iop33x/include/mach/io.h @@ -15,6 +15,5 @@ #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h deleted file mode 100644 index 4f98e765397c..000000000000 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop33x/include/mach/system.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S index 5850ffc8c751..c4444dff9202 100644 --- a/arch/arm/mach-ixp2000/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/entry-macro.S @@ -9,15 +9,9 @@ */ #include <mach/irqs.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \irqnr, #0x0 @clear out irqnr as default diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h index 859e584914d9..f6552d6f35ab 100644 --- a/arch/arm/mach-ixp2000/include/mach/io.h +++ b/arch/arm/mach-ixp2000/include/mach/io.h @@ -18,7 +18,6 @@ #include <mach/hardware.h> #define IO_SPACE_LIMIT 0xffffffff -#define __mem_pci(a) (a) /* * The A? revisions of the IXP2000s assert byte lanes for PCI I/O diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h deleted file mode 100644 index a7fb08b2b8e7..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-ixp2000/include/mach/system.h - * - * Copyright (C) 2002 Intel Corp. - * Copyricht (C) 2003-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 0923bb905cc0..7c1495e4fe7a 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = { void __init ixp23xx_sys_init(void) { + /* by default, the idle code is disabled */ + disable_hlt(); + *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S index 3f5338a7bbdd..3fd2cb984e42 100644 --- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S @@ -2,15 +2,9 @@ * arch/arm/mach-ixp23xx/include/mach/entry-macro.S */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) ldr \irqnr, [\irqnr] @ get interrupt number diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h index 4ce4353b9f72..a7aceb55c130 100644 --- a/arch/arm/mach-ixp23xx/include/mach/io.h +++ b/arch/arm/mach-ixp23xx/include/mach/io.h @@ -18,6 +18,5 @@ #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h deleted file mode 100644 index 277dda7334b9..000000000000 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/system.h - * - * Copyright (C) 2003 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ -#if 0 - if (!hlt_counter) - cpu_do_idle(); -#endif -} diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index a7277ad470a5..90e42e9982cb 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c @@ -165,6 +165,7 @@ static void __init avila_init(void) MACHINE_START(AVILA, "Gateworks Avila Network Platform") /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, @@ -184,6 +185,7 @@ MACHINE_END MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 3841ab4146ba..c60e7b86192c 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,6 +31,7 @@ #include <mach/udc.h> #include <mach/hardware.h> +#include <mach/io.h> #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -236,6 +237,12 @@ void __init ixp4xx_init_irq(void) { int i = 0; + /* + * ixp4xx does not implement the XScale PWRMODE register + * so it must not call cpu_do_idle(). + */ + disable_hlt(); + /* Route all sources to IRQ instead of FIQ */ *IXP4XX_ICLR = 0x0; @@ -511,3 +518,35 @@ void ixp4xx_restart(char mode, const char *cmd) *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; } } + +#ifdef CONFIG_IXP4XX_INDIRECT_PCI +/* + * In the case of using indirect PCI, we simply return the actual PCI + * address and our read/write implementation use that to drive the + * access registers. If something outside of PCI is ioremap'd, we + * fallback to the default. + */ + +static void __iomem *ixp4xx_ioremap_caller(unsigned long addr, size_t size, + unsigned int mtype, void *caller) +{ + if (!is_pci_memory(addr)) + return __arm_ioremap_caller(addr, size, mtype, caller); + + return (void __iomem *)addr; +} + +static void ixp4xx_iounmap(void __iomem *addr) +{ + if (!is_pci_memory((__force u32)addr)) + __iounmap(addr); +} + +void __init ixp4xx_init_early(void) +{ + arch_ioremap_caller = ixp4xx_ioremap_caller; + arch_iounmap = ixp4xx_iounmap; +} +#else +void __init ixp4xx_init_early(void) {} +#endif diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index a74f86ce8bcc..1b83110028d6 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c @@ -110,6 +110,7 @@ static void __init coyote_init(void) MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, @@ -129,6 +130,7 @@ MACHINE_END MACHINE_START(IXDPG425, "Intel IXDPG425") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 67be177b336a..97a0af8f1955 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") /* Maintainer: www.nslu2-linux.org */ .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &dsmg600_timer, .init_machine = dsmg600_init, diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 6d5818285af8..9175a25a7511 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c @@ -270,6 +270,7 @@ static void __init fsg_init(void) MACHINE_START(FSG, "Freecom FSG-3") /* Maintainer: www.nslu2-linux.org */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c index 7ecf9b28f1c0..033c71758953 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-setup.c +++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c @@ -97,6 +97,7 @@ static void __init gateway7001_init(void) MACHINE_START(GATEWAY7001, "Gateway 7001 AP") /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index c0e3d69a8aec..0dda8f6d7805 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -497,6 +497,7 @@ subsys_initcall(gmlr_pci_init); MACHINE_START(GORAMO_MLR, "MultiLink") /* Maintainer: Krzysztof Halasa */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index a23f89391458..18ebc6be7969 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -165,6 +165,7 @@ static void __init gtwx5715_init(void) MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") /* Maintainer: George Joseph */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S index f2e14e94ed15..79adf83e2c3d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S @@ -9,15 +9,9 @@ */ #include <mach/hardware.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) ldr \irqstat, [\irqstat] @ get interrupts diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h index c30e7e923a73..034bb2a1b805 100644 --- a/arch/arm/mach-ixp4xx/include/mach/hardware.h +++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h @@ -23,8 +23,6 @@ #define PCIBIOS_MAX_MEM 0x4BFFFFFF #endif -#define ARCH_HAS_DMA_SET_COHERENT_MASK - /* Register locations and bits */ #include "ixp4xx-regs.h" diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index ffb9d6afb89f..5cf30d1b78d2 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h @@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * but in some cases the performance hit is acceptable. In addition, you * cannot mmap() PCI devices in this case. */ -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - -#define __mem_pci(a) (a) - -#else +#ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI @@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr) return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); } -static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size, - unsigned int mtype) -{ - if (!is_pci_memory(addr)) - return __arm_ioremap(addr, size, mtype); - - return (void __iomem *)addr; -} - -static inline void __indirect_iounmap(void __iomem *addr) -{ - if (!is_pci_memory((__force u32)addr)) - __iounmap(addr); -} - -#define __arch_ioremap __indirect_ioremap -#define __arch_iounmap __indirect_iounmap - #define writeb(v, p) __indirect_writeb(v, p) #define writew(v, p) __indirect_writew(v, p) #define writel(v, p) __indirect_writel(v, p) diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h index df9250bbf13d..b66bedc64de1 100644 --- a/arch/arm/mach-ixp4xx/include/mach/platform.h +++ b/arch/arm/mach-ixp4xx/include/mach/platform.h @@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq; * Functions used by platform-level setup code */ extern void ixp4xx_map_io(void); +extern void ixp4xx_init_early(void); extern void ixp4xx_init_irq(void); extern void ixp4xx_sys_init(void); extern void ixp4xx_timer_init(void); diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h deleted file mode 100644 index 140a9bef4466..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-ixp4xx/include/mach/system.h - * - * Copyright (C) 2002 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -static inline void arch_idle(void) -{ - /* ixp4xx does not implement the XScale PWRMODE register, - * so it must not call cpu_do_idle() here. - */ -#if 0 - cpu_do_idle(); -#endif -} diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 8a38b39999f8..3d742aee1773 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -254,6 +254,7 @@ static void __init ixdp425_init(void) MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, @@ -269,6 +270,7 @@ MACHINE_END MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, @@ -283,6 +285,7 @@ MACHINE_END MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, @@ -297,6 +300,7 @@ MACHINE_END MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index 1010eb7b0083..33cb0955b6bf 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d") /* Maintainer: www.nslu2-linux.org */ .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = nas100d_init, diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index aa355c360d57..e2903faaebb3 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2") /* Maintainer: www.nslu2-linux.org */ .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &nslu2_timer, .init_machine = nslu2_init, diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c index 0940869fcfdd..158ddb79821d 100644 --- a/arch/arm/mach-ixp4xx/omixp-setup.c +++ b/arch/arm/mach-ixp4xx/omixp-setup.c @@ -243,6 +243,7 @@ static void __init omixp_init(void) MACHINE_START(DEVIXP, "Omicron DEVIXP") .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = omixp_init, @@ -254,6 +255,7 @@ MACHINE_END MACHINE_START(MICCPT, "Omicron MICCPT") .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = omixp_init, @@ -268,6 +270,7 @@ MACHINE_END MACHINE_START(MIC256, "Omicron MIC256") .atag_offset = 0x100, .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = omixp_init, diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index 9dec20683291..2798f435aaf4 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c @@ -237,6 +237,7 @@ static void __init vulcan_init(void) MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") /* Maintainer: Marc Zyngier <maz@misterjones.org> */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c index 5ac0f0a0fd8c..a785175b115b 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c @@ -98,6 +98,7 @@ static void __init wg302v2_init(void) MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ .map_io = ixp4xx_map_io, + .init_early = ixp4xx_init_early, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .atag_offset = 0x100, diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 8939d36f893c..82db29f7af8f 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S @@ -10,12 +10,6 @@ #include <mach/bridge-regs.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h index 49dd0cb5e166..5d0ab61700d2 100644 --- a/arch/arm/mach-kirkwood/include/mach/io.h +++ b/arch/arm/mach-kirkwood/include/mach/io.h @@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) } #define __io(a) __io(a) -#define __mem_pci(a) (a) - #endif diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h deleted file mode 100644 index 5fddde002b5e..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S index b4fe0c11c6ce..8315b34f32ff 100644 --- a/arch/arm/mach-ks8695/include/mach/entry-macro.S +++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S @@ -14,16 +14,10 @@ #include <mach/hardware.h> #include <mach/regs-irq.h> - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h deleted file mode 100644 index a7a63ac3ba4e..000000000000 --- a/arch/arm/mach-ks8695/include/mach/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-ks8695/include/mach/io.h - * - * Copyright (C) 2006 Andrew Victor - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h deleted file mode 100644 index 59fe992395bf..000000000000 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-s3c2410/include/mach/system.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * KS8695 - System function defines and includes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks, - */ - cpu_do_idle(); - -} - -#endif diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S index b725f6c93975..24ca11b377c8 100644 --- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S @@ -21,16 +21,10 @@ #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - /* * Return IRQ number in irqnr. Also return processor Z flag status in CPSR * as set if an interrupt is pending. diff --git a/arch/arm/mach-lpc32xx/include/mach/io.h b/arch/arm/mach-lpc32xx/include/mach/io.h deleted file mode 100644 index 9b59ab5cef89..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/io.h - * - * Author: Kevin Wells <kevin.wells@nxp.com> - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h deleted file mode 100644 index bf176c991520..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/system.h - * - * Author: Kevin Wells <kevin.wells@nxp.com> - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bfee5b455105..5d51c102c255 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = { .remove = lpc32xx_clcd_remove, }; -static struct amba_device lpc32xx_clcd_device = { - .dev = { - .coherent_dma_mask = ~0, - .init_name = "dev:clcd", - .platform_data = &lpc32xx_clcd_data, - }, - .res = { - .start = LPC32XX_LCD_BASE, - .end = (LPC32XX_LCD_BASE + SZ_4K - 1), - .flags = IORESOURCE_MEM, - }, - .dma_mask = ~0, - .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, -}; +static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, + LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); /* * AMBA SSP (SPI) @@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { .enable_dma = 0, }; -static struct amba_device lpc32xx_ssp0_device = { - .dev = { - .coherent_dma_mask = ~0, - .init_name = "dev:ssp0", - .platform_data = &lpc32xx_ssp0_data, - }, - .res = { - .start = LPC32XX_SSP0_BASE, - .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), - .flags = IORESOURCE_MEM, - }, - .dma_mask = ~0, - .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, -}; +static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, + LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); /* AT25 driver registration */ static int __init phy3250_spi_board_register(void) diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h index 3e404acd6ff4..b1ece08174e8 100644 --- a/arch/arm/mach-mmp/include/mach/addr-map.h +++ b/arch/arm/mach-mmp/include/mach/addr-map.h @@ -11,12 +11,6 @@ #ifndef __ASM_MACH_ADDR_MAP_H #define __ASM_MACH_ADDR_MAP_H -#ifndef __ASSEMBLER__ -#define IOMEM(x) ((void __iomem *)(x)) -#else -#define IOMEM(x) (x) -#endif - /* APB - Application Subsystem Peripheral Bus * * NOTE: the DMA controller registers are actually on the AXI fabric #1 diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S index c42d9d4e892d..9cff9e7a2b26 100644 --- a/arch/arm/mach-mmp/include/mach/entry-macro.S +++ b/arch/arm/mach-mmp/include/mach/entry-macro.S @@ -8,12 +8,6 @@ #include <mach/regs-icu.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c0, c0, 0 @ CPUID and \tmp, \tmp, #0xff00 diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h deleted file mode 100644 index e7adf3d012c1..000000000000 --- a/arch/arm/mach-mmp/include/mach/io.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/io.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_IO_H -#define __ASM_MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif /* __ASM_MACH_IO_H */ diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h deleted file mode 100644 index 1d001eab81e1..000000000000 --- a/arch/arm/mach-mmp/include/mach/system.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/system.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_SYSTEM_H -#define __ASM_MACH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} -#endif /* __ASM_MACH_SYSTEM_H */ diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index a60ab6d04ec5..3698a370d636 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = { extern struct sys_timer msm_timer; +static void __init halibut_init_early(void) +{ + arch_ioremap_caller = __msm_ioremap_caller; +} + static void __init halibut_init_irq(void) { msm_init_irq(); @@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") .atag_offset = 0x100, .fixup = halibut_fixup, .map_io = halibut_map_io, + .init_early = halibut_init_early, .init_irq = halibut_init_irq, .init_machine = halibut_init, .timer = &msm_timer, diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c index 6b9b227c87c5..5414f76ec0a9 100644 --- a/arch/arm/mach-msm/board-trout.c +++ b/arch/arm/mach-msm/board-trout.c @@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = { extern struct sys_timer msm_timer; +static void __init trout_init_early(void) +{ + arch_ioremap_caller = __msm_ioremap_caller; +} + static void __init trout_init_irq(void) { msm_init_irq(); @@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream") .atag_offset = 0x100, .fixup = trout_fixup, .map_io = trout_map_io, + .init_early = trout_init_early, .init_irq = trout_init_irq, .init_machine = trout_init, .timer = &msm_timer, diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S deleted file mode 100644 index 6a94f0527137..000000000000 --- a/arch/arm/mach-msm/idle.S +++ /dev/null @@ -1,36 +0,0 @@ -/* arch/arm/mach-msm/include/mach/idle.S - * - * Idle processing for MSM7K - work around bugs with SWFI. - * - * Copyright (c) 2007 QUALCOMM Incorporated. - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/linkage.h> -#include <asm/assembler.h> - -ENTRY(arch_idle) -#ifdef CONFIG_MSM7X00A_IDLE - mrc p15, 0, r1, c1, c0, 0 /* read current CR */ - bic r0, r1, #(1 << 2) /* clear dcache bit */ - bic r0, r0, #(1 << 12) /* clear icache bit */ - mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ - - mov r0, #0 /* prepare wfi value */ - mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ - mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ - mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ - - mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ -#endif - mov pc, lr diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c new file mode 100644 index 000000000000..0c9e13c65743 --- /dev/null +++ b/arch/arm/mach-msm/idle.c @@ -0,0 +1,49 @@ +/* arch/arm/mach-msm/idle.c + * + * Idle processing for MSM7K - work around bugs with SWFI. + * + * Copyright (c) 2007 QUALCOMM Incorporated. + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/init.h> +#include <asm/system.h> + +static void msm_idle(void) +{ +#ifdef CONFIG_MSM7X00A_IDLE + asm volatile ( + + "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" + "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" + "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" + "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" + + "mov r0, #0 /* prepare wfi value */ \n\t" + "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" + "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" + "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" + + "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" + + : : : "r0","r1" ); +#endif +} + +static int __init msm_idle_init(void) +{ + arm_pm_idle = msm_idle; + return 0; +} + +arch_initcall(msm_idle_init); diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S index 41f7003ef34f..f2ae9087f654 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/arch/arm/mach-msm/include/mach/entry-macro.S @@ -16,12 +16,6 @@ * */ - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - #if !defined(CONFIG_ARM_GIC) #include <mach/msm_iomap.h> diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h deleted file mode 100644 index dc1b928745e9..000000000000 --- a/arch/arm/mach-msm/include/mach/io.h +++ /dev/null @@ -1,36 +0,0 @@ -/* arch/arm/mach-msm/include/mach/io.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __arch_ioremap __msm_ioremap -#define __arch_iounmap __iounmap - -void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype); - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -void msm_map_qsd8x50_io(void); -void msm_map_msm7x30_io(void); -void msm_map_msm8x60_io(void); -void msm_map_msm8960_io(void); - -extern unsigned int msm_shared_ram_phys; - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 8af46123dab6..6c4046c21296 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h @@ -38,12 +38,6 @@ * */ -#ifdef __ASSEMBLY__ -#define IOMEM(x) x -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - #define MSM_VIC_BASE IOMEM(0xE0000000) #define MSM_VIC_PHYS 0xC0000000 #define MSM_VIC_SIZE SZ_4K @@ -111,5 +105,11 @@ #define MSM_AD5_PHYS 0xAC000000 #define MSM_AD5_SIZE (SZ_1M*13) +#ifndef __ASSEMBLY__ + +extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size, + unsigned int mtype, void *caller); + +#endif #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 198202c267c8..f944fe65a657 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h @@ -100,4 +100,8 @@ #define MSM_HSUSB_PHYS 0xA3600000 #define MSM_HSUSB_SIZE SZ_1K +#ifndef __ASSEMBLY__ +extern void msm_map_msm7x30_io(void); +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h index 800b55767e6b..a1752c0284fc 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h @@ -50,4 +50,8 @@ #define MSM_DEBUG_UART_PHYS 0x16440000 #endif +#ifndef __ASSEMBLY__ +extern void msm_map_msm8960_io(void); +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index 0faa894729b7..da77cc1d545d 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -122,4 +122,8 @@ #define MSM_SDC4_PHYS 0xA0600000 #define MSM_SDC4_SIZE SZ_4K +#ifndef __ASSEMBLY__ +extern void msm_map_qsd8x50_io(void); +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 54e12caa8d86..5aed57dc808c 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -67,4 +67,8 @@ #define MSM_DEBUG_UART_PHYS 0x19C40000 #endif +#ifndef __ASSEMBLY__ +extern void msm_map_msm8x60_io(void); +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 90682f4599d3..00afdfb8c38f 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -37,12 +37,6 @@ * */ -#ifdef __ASSEMBLY__ -#define IOMEM(x) x -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - #if defined(CONFIG_ARCH_MSM7X30) #include "msm_iomap-7x30.h" #elif defined(CONFIG_ARCH_QSD8X50) diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index 311db2b35da0..f5fb2ec87ffe 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h @@ -12,7 +12,6 @@ * GNU General Public License for more details. * */ -void arch_idle(void); /* low level hardware reset hook -- for example, hitting the * PSHOLD line on the PMIC to hard reset the system diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 578b04e42deb..a1e7b1168850 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void) } #endif /* CONFIG_ARCH_MSM7X30 */ -void __iomem * -__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) +void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size, + unsigned int mtype, void *caller) { if (mtype == MT_DEVICE) { /* The peripherals in the 88000000 - D0000000 range @@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) mtype = MT_DEVICE_NONSHARED; } - return __arm_ioremap_caller(phys_addr, size, mtype, - __builtin_return_address(0)); + return __arm_ioremap_caller(phys_addr, size, mtype, caller); } -EXPORT_SYMBOL(__msm_ioremap); diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index 66ae2d29e773..6b1f088e0597 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -10,12 +10,6 @@ #include <mach/bridge-regs.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h index 450e0e1ad092..c7d9d00d8fc1 100644 --- a/arch/arm/mach-mv78xx0/include/mach/io.h +++ b/arch/arm/mach-mv78xx0/include/mach/io.h @@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) } #define __io(a) __io(a) -#define __mem_pci(a) (a) - #endif diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h deleted file mode 100644 index 8c3a5387cec7..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index fe3e847930c9..01faffec3064 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c @@ -77,16 +77,18 @@ err: int __init mxs_add_amba_device(const struct amba_device *dev) { - struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); + struct amba_device *adev = amba_device_alloc(dev->dev.init_name, + dev->res.start, resource_size(&dev->res)); if (!adev) { pr_err("%s: failed to allocate memory", __func__); return -ENOMEM; } - *adev = *dev; + adev->irq[0] = dev->irq[0]; + adev->irq[1] = dev->irq[1]; - return amba_device_register(adev, &iomem_resource); + return amba_device_add(adev, &iomem_resource); } struct device mxs_apbh_bus = { diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c index a559db09b49c..a5479f766046 100644 --- a/arch/arm/mach-mxs/devices/amba-duart.c +++ b/arch/arm/mach-mxs/devices/amba-duart.c @@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ .flags = IORESOURCE_MEM, \ }, \ - .irq = {soc ## _INT_DUART, NO_IRQ}, \ + .irq = {soc ## _INT_DUART}, \ } #ifdef CONFIG_SOC_IMX23 diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S index 9f0da12e657a..0c14259705b9 100644 --- a/arch/arm/mach-mxs/include/mach/entry-macro.S +++ b/arch/arm/mach-mxs/include/mach/entry-macro.S @@ -23,9 +23,6 @@ #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) #define HW_ICOLL_STAT_OFFSET 0x70 - .macro disable_fiq - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] cmp \irqnr, #0x7F @@ -36,6 +33,3 @@ .macro get_irqnr_preamble, base, tmp ldr \base, =MXS_ICOLL_VBASE .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-mxs/include/mach/hardware.h b/arch/arm/mach-mxs/include/mach/hardware.h index 53e89a09bf0d..4c0e8a64d8c7 100644 --- a/arch/arm/mach-mxs/include/mach/hardware.h +++ b/arch/arm/mach-mxs/include/mach/hardware.h @@ -20,10 +20,4 @@ #ifndef __MACH_MXS_HARDWARE_H__ #define __MACH_MXS_HARDWARE_H__ -#ifdef __ASSEMBLER__ -#define IOMEM(addr) (addr) -#else -#define IOMEM(addr) ((void __force __iomem *)(addr)) -#endif - #endif /* __MACH_MXS_HARDWARE_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/io.h b/arch/arm/mach-mxs/include/mach/io.h deleted file mode 100644 index 289b7227e072..000000000000 --- a/arch/arm/mach-mxs/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_MXS_IO_H__ -#define __MACH_MXS_IO_H__ - -/* Allow IO space to be anywhere in the memory */ -#define IO_SPACE_LIMIT 0xffffffff - -/* io address mapping macro */ -#define __io(a) __typesafe_io(a) - -#define __mem_pci(a) (a) - -#endif /* __MACH_MXS_IO_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h deleted file mode 100644 index e7ad1bb29423..000000000000 --- a/arch/arm/mach-mxs/include/mach/system.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_MXS_SYSTEM_H__ -#define __MACH_MXS_SYSTEM_H__ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif /* __MACH_MXS_SYSTEM_H__ */ diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c index fb042da29bda..a9b4bbcdafb4 100644 --- a/arch/arm/mach-mxs/pm.c +++ b/arch/arm/mach-mxs/pm.c @@ -15,13 +15,12 @@ #include <linux/kernel.h> #include <linux/suspend.h> #include <linux/io.h> -#include <mach/system.h> static int mxs_suspend_enter(suspend_state_t state) { switch (state) { case PM_SUSPEND_MEM: - arch_idle(); + cpu_do_idle(); break; default: diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index b9913234bbf6..2cdf6ef69bee 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c @@ -92,18 +92,7 @@ void clk_put(struct clk *clk) { } -static struct amba_device fb_device = { - .dev = { - .init_name = "fb", - .coherent_dma_mask = ~0, - }, - .res = { - .start = 0x00104000, - .end = 0x00104fff, - .flags = IORESOURCE_MEM, - }, - .irq = { NETX_IRQ_LCD, NO_IRQ }, -}; +static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) { diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 59e67979f197..aa627465d914 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -168,7 +168,7 @@ void __init netx_init_irq(void) { int irq; - vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); + vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0); for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { irq_set_chip_and_handler(irq, &netx_hif_chip, diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S deleted file mode 100644 index 6e9f1cbe1634..000000000000 --- a/arch/arm/mach-netx/include/mach/entry-macro.S +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Hilscher netX based platforms - * - * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-netx/include/mach/hardware.h b/arch/arm/mach-netx/include/mach/hardware.h index 517a2bd37842..b661af2f2145 100644 --- a/arch/arm/mach-netx/include/mach/hardware.h +++ b/arch/arm/mach-netx/include/mach/hardware.h @@ -33,7 +33,7 @@ #define XMAC_MEM_SIZE 0x1000 #define SRAM_MEM_SIZE 0x8000 -#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT) +#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT) #define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) #endif diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h deleted file mode 100644 index c3921cb3b6a6..000000000000 --- a/arch/arm/mach-netx/include/mach/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/io.h - * - * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h index 5a03e7ccb01a..fdde22b58ac3 100644 --- a/arch/arm/mach-netx/include/mach/netx-regs.h +++ b/arch/arm/mach-netx/include/mach/netx-regs.h @@ -115,7 +115,7 @@ *********************************/ /* Registers */ -#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs)) +#define NETX_SYSTEM_REG(ofs) IOMEM(NETX_VA_SYSTEM + (ofs)) #define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) #define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) #define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) @@ -185,7 +185,7 @@ *******************************/ /* Registers */ -#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs)) +#define NETX_GPIO_REG(ofs) IOMEM(NETX_VA_GPIO + (ofs)) #define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) #define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) #define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) @@ -230,7 +230,7 @@ *******************************/ /* Registers */ -#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs)) +#define NETX_PIO_REG(ofs) IOMEM(NETX_VA_PIO + (ofs)) #define NETX_PIO_INPIO NETX_PIO_REG(0x0) #define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) #define NETX_PIO_OEPIO NETX_PIO_REG(0x8) @@ -240,7 +240,7 @@ *******************************/ /* Registers */ -#define NETX_MIIMU __io(NETX_VA_MIIMU) +#define NETX_MIIMU IOMEM(NETX_VA_MIIMU) /* Bits */ #define MIIMU_SNRDY (1<<0) @@ -317,7 +317,7 @@ *******************************/ /* Registers */ -#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs)) +#define NETX_PFIFO_REG(ofs) IOMEM(NETX_VA_PFIFO + (ofs)) #define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) #define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) #define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) @@ -334,7 +334,7 @@ *******************************/ /* Registers */ -#define NETX_MEMCR_REG(ofs) __io(NETX_VA_MEMCR + (ofs)) +#define NETX_MEMCR_REG(ofs) IOMEM(NETX_VA_MEMCR + (ofs)) #define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */ #define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40) #define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44) @@ -355,7 +355,7 @@ *******************************/ /* Registers */ -#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs)) +#define NETX_DPMAS_REG(ofs) IOMEM(NETX_VA_DPMAS + (ofs)) #define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) #define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) #define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) @@ -425,7 +425,7 @@ /******************************* * I2C * *******************************/ -#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs)) +#define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs)) #define NETX_I2C_CTRL NETX_I2C_REG(0x0) #define NETX_I2C_DATA NETX_I2C_REG(0x4) diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h deleted file mode 100644 index b38fa36d58c4..000000000000 --- a/arch/arm/mach-netx/include/mach/system.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/system.h - * - * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif - diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 7c878bf00340..f6f74adbe8c4 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void) #endif } -#define __MEM_4K_RESOURCE(x) \ - .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} +static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, + { IRQ_UART0 }, NULL); -static struct amba_device uart0_device = { - .dev = { .init_name = "uart0" }, - __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), - .irq = {IRQ_UART0, NO_IRQ}, -}; - -static struct amba_device uart1_device = { - .dev = { .init_name = "uart1" }, - __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), - .irq = {IRQ_UART1, NO_IRQ}, -}; +static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, + { IRQ_UART1 }, NULL); static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 65df7b4fdd3e..27f43a46985e 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = { GPIO_DEVICE(3), }; -static struct amba_device cpu8815_amba_rng = { - .dev = { - .init_name = "rng", - }, - __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), -}; +static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); static struct platform_device *platform_devs[] __initdata = { cpu8815_platform_gpio + 0, @@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = { }; static struct amba_device *amba_devs[] __initdata = { - &cpu8815_amba_rng + &cpu8815_amba_rng_device }; static int __init cpu8815_init(void) diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S deleted file mode 100644 index 98ea1c1fbbab..000000000000 --- a/arch/arm/mach-nomadik/include/mach/entry-macro.S +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Low-level IRQ helper macros for Nomadik platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-nomadik/include/mach/io.h b/arch/arm/mach-nomadik/include/mach/io.h deleted file mode 100644 index 2e1eca1b8243..000000000000 --- a/arch/arm/mach-nomadik/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-nomadik/include/mach/io.h (copied from mach-sa1100) - * - * Copyright (C) 1997-1999 Russell King - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h deleted file mode 100644 index 25e198b8976c..000000000000 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * mach-nomadik/include/mach/system.h - * - * Copyright (C) 2008 STMicroelectronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index c1c5fb6a5b4c..a051cb8ae57f 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -14,12 +14,14 @@ */ #include <linux/linkage.h> +#include <asm/assembler.h> -#include <plat/io.h> #include <plat/board-ams-delta.h> #include <mach/ams-delta-fiq.h> +#include "iomap.h" + /* * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c. * Unfortunately, those were not placed in a separate header file. diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 152b32c15e28..fcce7ff37630 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -22,6 +22,7 @@ #include <plat/board-ams-delta.h> #include <asm/fiq.h> + #include <mach/ams-delta-fiq.h> static struct fiq_handler fh = { diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 88909cc0b254..ac65d7d7c7a1 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -20,25 +20,27 @@ #include <linux/platform_device.h> #include <linux/serial_8250.h> #include <linux/export.h> +#include <linux/io.h> #include <media/soc_camera.h> #include <asm/serial.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/io.h> #include <plat/board-ams-delta.h> #include <plat/keypad.h> #include <plat/mux.h> #include <plat/usb.h> #include <plat/board.h> -#include "common.h" -#include <mach/camera.h> +#include <mach/hardware.h> #include <mach/ams-delta-fiq.h> +#include <mach/camera.h> + +#include "iomap.h" +#include "common.h" static u8 ams_delta_latch1_reg; static u16 ams_delta_latch2_reg; diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 0b9464b41212..079292cca584 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -22,7 +22,6 @@ #include <linux/input.h> #include <linux/smc91x.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -32,9 +31,13 @@ #include <plat/flash.h> #include <plat/fpga.h> #include <plat/keypad.h> -#include "common.h" #include <plat/board.h> +#include <mach/hardware.h> + +#include "iomap.h" +#include "common.h" + /* fsample is pretty close to p2-sample */ #define fsample_cpld_read(reg) __raw_readb(reg) diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 00ad6b22d60a..03e0050a8961 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -31,8 +31,6 @@ #include <linux/i2c/tps65010.h> #include <linux/smc91x.h> -#include <mach/hardware.h> - #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -43,9 +41,11 @@ #include <plat/irda.h> #include <plat/usb.h> #include <plat/keypad.h> -#include "common.h" #include <plat/flash.h> +#include <mach/hardware.h> + +#include "common.h" #include "board-h2.h" /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4a7f25149703..f304fe211b1a 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -33,21 +33,21 @@ #include <asm/setup.h> #include <asm/page.h> -#include <mach/hardware.h> - #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/irqs.h> #include <plat/mux.h> #include <plat/tc.h> #include <plat/usb.h> #include <plat/keypad.h> #include <plat/dma.h> -#include "common.h" #include <plat/flash.h> +#include <mach/hardware.h> +#include <mach/irqs.h> + +#include "common.h" #include "board-h3.h" /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 731cc3db7ab3..fa52d145d7b6 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -27,7 +27,7 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/input.h> -#include <linux/io.h> +#include <linux/delay.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> #include <linux/i2c.h> @@ -41,7 +41,6 @@ #include <asm/mach/arch.h> #include <plat/omap7xx.h> -#include "common.h" #include <plat/board.h> #include <plat/keypad.h> #include <plat/usb.h> @@ -49,7 +48,7 @@ #include <mach/irqs.h> -#include <linux/delay.h> +#include "common.h" /* LCD register definition */ #define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 309369ea6978..289a6b82c5f7 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -26,7 +26,6 @@ #include <linux/input.h> #include <linux/smc91x.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -37,9 +36,13 @@ #include <plat/tc.h> #include <plat/usb.h> #include <plat/keypad.h> -#include "common.h" #include <plat/mmc.h> +#include <mach/hardware.h> + +#include "iomap.h" +#include "common.h" + /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define INNOVATOR1610_ETHR_START 0x04000300 diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index f9efc036ba96..abdbdb08644f 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -21,7 +21,6 @@ #include <linux/workqueue.h> #include <linux/delay.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -30,12 +29,15 @@ #include <plat/usb.h> #include <plat/board.h> #include <plat/keypad.h> -#include "common.h" #include <plat/hwa742.h> #include <plat/lcd_mipid.h> #include <plat/mmc.h> #include <plat/clock.h> +#include <mach/hardware.h> + +#include "common.h" + #define ADS7846_PENDOWN_GPIO 15 static const unsigned int nokia770_keymap[] = { diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 675de06557aa..e2d7ae4418f2 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -34,15 +34,11 @@ #include <linux/i2c.h> #include <linux/leds.h> #include <linux/smc91x.h> - #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> - #include <linux/i2c/tps65010.h> -#include <mach/hardware.h> - #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -51,6 +47,9 @@ #include <plat/usb.h> #include <plat/mux.h> #include <plat/tc.h> + +#include <mach/hardware.h> + #include "common.h" /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 81fa27f88369..04efa7e61149 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -28,7 +28,6 @@ #include <linux/interrupt.h> #include <linux/apm-emulation.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -41,6 +40,9 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> + +#include <mach/hardware.h> + #include "common.h" #define PALMTE_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 81cb82178388..acd1f3645ba0 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -24,8 +24,9 @@ #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> #include <linux/leds.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -39,10 +40,10 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> -#include "common.h" -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> +#include <mach/hardware.h> + +#include "common.h" #define PALMTT_USBDETECT_GPIO 0 #define PALMTT_CABLE_GPIO 1 diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index e881945ce8ec..c1cd0f2d6866 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -27,8 +27,9 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -41,10 +42,10 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> -#include "common.h" -#include <linux/spi/spi.h> -#include <linux/spi/ads7846.h> +#include <mach/hardware.h> + +#include "common.h" #define PALMZ71_USBDETECT_GPIO 0 #define PALMZ71_PENIRQ_GPIO 6 diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index c000bed76276..83f5b765c5b6 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -22,7 +22,6 @@ #include <linux/input.h> #include <linux/smc91x.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -32,9 +31,13 @@ #include <plat/fpga.h> #include <plat/flash.h> #include <plat/keypad.h> -#include "common.h" #include <plat/board.h> +#include <mach/hardware.h> + +#include "iomap.h" +#include "common.h" + static const unsigned int p2_keymap[] = { KEY(0, 0, KEY_UP), KEY(1, 0, KEY_RIGHT), diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 7bcd82ab0fd0..fed4435f5d43 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -28,7 +28,6 @@ #include <linux/errno.h> #include <linux/export.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -40,10 +39,13 @@ #include <plat/usb.h> #include <plat/tc.h> #include <plat/board.h> -#include "common.h" #include <plat/keypad.h> #include <plat/board-sx1.h> +#include <mach/hardware.h> + +#include "common.h" + /* Write to I2C device */ int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) { diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index f83a502dc93c..659d0f75de2c 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -27,18 +27,20 @@ #include <linux/smc91x.h> #include <linux/export.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <plat/board-voiceblue.h> -#include "common.h" #include <plat/flash.h> #include <plat/mux.h> #include <plat/tc.h> #include <plat/usb.h> +#include <mach/hardware.h> + +#include "common.h" + static struct plat_serial8250_port voiceblue_ports[] = { { .mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000), diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 0c50df05d135..67382ddd8c83 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -15,8 +15,8 @@ #include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> -#include <linux/clk.h> #include <linux/io.h> +#include <linux/clk.h> #include <linux/clkdev.h> #include <asm/mach-types.h> @@ -27,6 +27,9 @@ #include <plat/sram.h> #include <plat/clkdev_omap.h> +#include <mach/hardware.h> + +#include "iomap.h" #include "clock.h" #include "opp.h" diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 94699a82a734..c6ce93f71d08 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -15,10 +15,10 @@ */ #include <linux/kernel.h> +#include <linux/io.h> #include <linux/clk.h> #include <linux/cpufreq.h> #include <linux/delay.h> -#include <linux/io.h> #include <asm/mach-types.h> /* for machine_is_* */ @@ -28,6 +28,9 @@ #include <plat/sram.h> /* for omap_sram_reprogram_clock() */ #include <plat/usb.h> /* for OTG_BASE */ +#include <mach/hardware.h> + +#include "iomap.h" #include "clock.h" /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index a9a5146dd2d4..af658ad338ec 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -58,5 +58,6 @@ void omap1_restart(char, const char *); extern struct sys_timer omap1_timer; extern bool omap_32k_timer_init(void); +extern void __init omap_init_consistent_dma_size(void); #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 1d76a63c0983..d06c7140392c 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -15,14 +15,10 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> -#include <linux/io.h> #include <linux/spi/spi.h> -#include <mach/camera.h> -#include <mach/hardware.h> #include <asm/mach/map.h> -#include "common.h" #include <plat/tc.h> #include <plat/board.h> #include <plat/mux.h> @@ -30,6 +26,10 @@ #include <plat/omap7xx.h> #include <plat/mcbsp.h> +#include <mach/camera.h> +#include <mach/hardware.h> + +#include "common.h" #include "clock.h" /*-------------------------------------------------------------------------*/ diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index f5a52204b89f..3ef7d52316b4 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -19,11 +19,11 @@ */ #include <linux/err.h> -#include <linux/io.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/init.h> #include <linux/device.h> +#include <linux/io.h> #include <plat/dma.h> #include <plat/tc.h> diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 1749cb37dda0..f9bf78d4fdfb 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c @@ -6,13 +6,15 @@ * published by the Free Software Foundation. */ +#include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> -#include <plat/io.h> #include <plat/tc.h> #include <plat/flash.h> +#include <mach/hardware.h> + void omap1_set_vpp(struct platform_device *pdev, int enable) { static int count; diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 0a17a1a7e00d..76c67b3f9f61 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -24,12 +24,15 @@ #include <linux/errno.h> #include <linux/io.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <plat/fpga.h> +#include <mach/hardware.h> + +#include "iomap.h" + static void fpga_mask_irq(struct irq_data *d) { unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 0f399bd0e70e..99cabc498ab5 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -218,6 +218,13 @@ static int __init omap16xx_gpio_init(void) if (!cpu_is_omap16xx()) return -EINVAL; + /* + * Enable system clock for GPIO module. + * The CAM_CLK_CTRL *is* really the right place. + */ + omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, + ULPD_CAM_CLK_CTRL); + for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) platform_device_register(omap16xx_gpio_dev[i]); diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index a0e3560b39db..f24c1e2c5044 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -15,8 +15,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> + #include <plat/cpu.h> +#include <mach/hardware.h> + #define OMAP_DIE_ID_0 0xfffe1800 #define OMAP_DIE_ID_1 0xfffe1804 #define OMAP_PRODUCTION_ID_0 0xfffe2000 diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index bfb4fb1d7382..88f08cab1717 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -9,20 +9,15 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ + #include <mach/hardware.h> -#include <mach/io.h> #include <mach/irqs.h> -#include <asm/hardware/gic.h> - .macro disable_fiq - .endm +#include "../../iomap.h" .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index a3f6287b2007..01e35fa106b8 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -2,4 +2,40 @@ * arch/arm/mach-omap1/include/mach/hardware.h */ +#ifndef __MACH_HARDWARE_H +#define __MACH_HARDWARE_H + +#ifndef __ASSEMBLER__ +/* + * NOTE: Please use ioremap + __raw_read/write where possible instead of these + */ +extern u8 omap_readb(u32 pa); +extern u16 omap_readw(u32 pa); +extern u32 omap_readl(u32 pa); +extern void omap_writeb(u8 v, u32 pa); +extern void omap_writew(u16 v, u32 pa); +extern void omap_writel(u32 v, u32 pa); + +#include <plat/tc.h> + +/* Almost all documentation for chip and board memory maps assumes + * BM is clear. Most devel boards have a switch to control booting + * from NOR flash (using external chipselect 3) rather than mask ROM, + * which uses BM to interchange the physical CS0 and CS3 addresses. + */ +static inline u32 omap_cs0m_phys(void) +{ + return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) + ? OMAP_CS3_PHYS : 0; +} + +static inline u32 omap_cs3_phys(void) +{ + return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) + ? 0 : OMAP_CS3_PHYS; +} + +#endif +#endif + #include <plat/hardware.h> diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h deleted file mode 100644 index 57bdf74a3e64..000000000000 --- a/arch/arm/mach-omap1/include/mach/io.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/io.h - */ - -#include <plat/io.h> diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index c6337645ba8a..901082def9bd 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -18,7 +18,8 @@ * Note that the is_lbus_device() test is not very efficient on 1510 * because of the strncmp(). */ -#ifdef CONFIG_ARCH_OMAP15XX +#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) +#include <plat/cpu.h> /* * OMAP-1510 Local Bus address offset diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h deleted file mode 100644 index a6c1b3a16dfc..000000000000 --- a/arch/arm/mach-omap1/include/mach/system.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/system.h - */ - -#include <plat/system.h> diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 8e55b6fb3478..56fb444a5f11 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -15,9 +15,12 @@ #include <asm/tlb.h> #include <asm/mach/map.h> + #include <plat/mux.h> #include <plat/tc.h> +#include "iomap.h" +#include "common.h" #include "clock.h" extern void omap_check_revision(void); diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h new file mode 100644 index 000000000000..330c4716b028 --- /dev/null +++ b/arch/arm/mach-omap1/iomap.h @@ -0,0 +1,36 @@ +/* + * IO mappings for OMAP1 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) + +/* + * ---------------------------------------------------------------------------- + * Omap1 specific IO mapping + * ---------------------------------------------------------------------------- + */ + +#define OMAP1_IO_PHYS 0xFFFB0000 +#define OMAP1_IO_SIZE 0x40000 +#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index e5b104b7fce6..4448114fab72 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -42,11 +42,13 @@ #include <linux/interrupt.h> #include <linux/io.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach/irq.h> + #include <plat/cpu.h> +#include <mach/hardware.h> + #define IRQ_BANK(irq) ((irq) >> 5) #define IRQ_BIT(irq) ((irq) & 0x1f) diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c index 453809359ba6..123a0df63d48 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/arch/arm/mach-omap1/lcd_dma.c @@ -27,9 +27,10 @@ #include <linux/interrupt.h> #include <linux/io.h> +#include <plat/dma.h> + #include <mach/hardware.h> #include <mach/lcdc.h> -#include <plat/dma.h> int omap_lcd_dma_running(void) { diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 91f9abbd3250..3082d60af082 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -19,12 +19,15 @@ #include <linux/platform_device.h> #include <linux/slab.h> -#include <mach/irqs.h> #include <plat/dma.h> #include <plat/mux.h> #include <plat/cpu.h> #include <plat/mcbsp.h> +#include <mach/irqs.h> + +#include "iomap.h" + #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 89ea20ca0ccc..306beaca14c5 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -42,14 +42,13 @@ #include <linux/sysfs.h> #include <linux/module.h> #include <linux/io.h> +#include <linux/atomic.h> #include <asm/irq.h> -#include <linux/atomic.h> #include <asm/mach/time.h> #include <asm/mach/irq.h> #include <plat/cpu.h> -#include <mach/irqs.h> #include <plat/clock.h> #include <plat/sram.h> #include <plat/tc.h> @@ -57,6 +56,9 @@ #include <plat/dma.h> #include <plat/dmtimer.h> +#include <mach/irqs.h> + +#include "iomap.h" #include "pm.h" static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; @@ -108,13 +110,7 @@ void omap1_pm_idle(void) __u32 use_idlect1 = arm_idlect1_mask; int do_sleep = 0; - local_irq_disable(); local_fiq_disable(); - if (need_resched()) { - local_fiq_enable(); - local_irq_enable(); - return; - } #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) #warning Enable 32kHz OS timer in order to allow sleep states in idle @@ -157,14 +153,12 @@ void omap1_pm_idle(void) omap_writel(saved_idlect1, ARM_IDLECT1); local_fiq_enable(); - local_irq_enable(); return; } omap_sram_suspend(omap_readl(ARM_IDLECT1), omap_readl(ARM_IDLECT2)); local_fiq_enable(); - local_irq_enable(); } /* @@ -583,8 +577,6 @@ static void omap_pm_init_proc(void) #endif /* DEBUG && CONFIG_PROC_FS */ -static void (*saved_idle)(void) = NULL; - /* * omap_pm_prepare - Do preliminary suspend work. * @@ -592,8 +584,7 @@ static void (*saved_idle)(void) = NULL; static int omap_pm_prepare(void) { /* We cannot sleep in idle until we have resumed */ - saved_idle = pm_idle; - pm_idle = NULL; + disable_hlt(); return 0; } @@ -630,7 +621,7 @@ static int omap_pm_enter(suspend_state_t state) static void omap_pm_finish(void) { - pm_idle = saved_idle; + enable_hlt(); } @@ -687,7 +678,7 @@ static int __init omap_pm_init(void) return -ENODEV; } - pm_idle = omap1_pm_idle; + arm_pm_idle = omap1_pm_idle; if (cpu_is_omap7xx()) setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index 91d199b64979..f255b153b863 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -4,9 +4,10 @@ #include <linux/kernel.h> #include <linux/io.h> -#include <mach/hardware.h> #include <plat/prcm.h> +#include <mach/hardware.h> + void omap1_restart(char mode, const char *cmd) { /* diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index c875bdc902c5..0e628743bd03 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -33,8 +33,10 @@ */ #include <linux/linkage.h> + #include <asm/assembler.h> -#include <mach/io.h> + +#include "iomap.h" #include "pm.h" .text diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 692587d07ea5..00e9d9e9adf1 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -9,10 +9,13 @@ */ #include <linux/linkage.h> + #include <asm/assembler.h> -#include <mach/io.h> + #include <mach/hardware.h> +#include "iomap.h" + .text /* diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index b8faffa44f9e..2fae6a2740f1 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -45,14 +45,15 @@ #include <linux/io.h> #include <asm/system.h> -#include <mach/hardware.h> #include <asm/leds.h> #include <asm/irq.h> #include <asm/sched_clock.h> +#include <mach/hardware.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> +#include "iomap.h" #include "common.h" #ifdef CONFIG_OMAP_MPU_TIMER diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 9a54ef4dcf5e..a2e6d0709df2 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -47,14 +47,17 @@ #include <linux/io.h> #include <asm/system.h> -#include <mach/hardware.h> #include <asm/leds.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include "common.h" + #include <plat/dmtimer.h> +#include <mach/hardware.h> + +#include "common.h" + /* * --------------------------------------------------------------------------- * 32KHz OS timer diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 41e6612ecbaf..d965da45160e 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -213,13 +213,12 @@ config MACH_OMAP3_PANDORA depends on ARCH_OMAP3 default y select OMAP_PACKAGE_CBB - select REGULATOR_FIXED_VOLTAGE + select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_OMAP3_TOUCHBOOK bool "OMAP3 Touch Book" depends on ARCH_OMAP3 default y - select BACKLIGHT_CLASS_DEVICE config MACH_OMAP_3430SDP bool "OMAP 3430 SDP board" @@ -265,7 +264,7 @@ config MACH_OMAP_ZOOM2 select SERIAL_8250 select SERIAL_CORE_CONSOLE select SERIAL_8250_CONSOLE - select REGULATOR_FIXED_VOLTAGE + select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_OMAP_ZOOM3 bool "OMAP3630 Zoom3 board" @@ -275,7 +274,7 @@ config MACH_OMAP_ZOOM3 select SERIAL_8250 select SERIAL_CORE_CONSOLE select SERIAL_8250_CONSOLE - select REGULATOR_FIXED_VOLTAGE + select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_CM_T35 bool "CompuLab CM-T35/CM-T3730 modules" @@ -334,7 +333,7 @@ config MACH_OMAP_4430SDP depends on ARCH_OMAP4 select OMAP_PACKAGE_CBL select OMAP_PACKAGE_CBS - select REGULATOR_FIXED_VOLTAGE + select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_OMAP4_PANDA bool "OMAP4 Panda Board" @@ -342,7 +341,7 @@ config MACH_OMAP4_PANDA depends on ARCH_OMAP4 select OMAP_PACKAGE_CBL select OMAP_PACKAGE_CBS - select REGULATOR_FIXED_VOLTAGE + select REGULATOR_FIXED_VOLTAGE if REGULATOR config OMAP3_EMU bool "OMAP3 debugging peripherals" diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 39fba9df17fb..21fc87648660 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -52,8 +52,9 @@ #define ETH_KS8851_QUART 138 #define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 #define OMAP4_SFH7741_ENABLE_GPIO 188 -#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ +#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */ #define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ +#define HDMI_GPIO_HPD 63 /* Hotplug detect */ #define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */ #define DLP_POWER_ON_GPIO 40 @@ -603,8 +604,9 @@ static void __init omap_sfh7741prox_init(void) } static struct gpio sdp4430_hdmi_gpios[] = { - { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, + { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" }, { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, + { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" }, }; static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) @@ -621,8 +623,7 @@ static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev) { - gpio_free(HDMI_GPIO_LS_OE); - gpio_free(HDMI_GPIO_HPD); + gpio_free_array(sdp4430_hdmi_gpios, ARRAY_SIZE(sdp4430_hdmi_gpios)); } static struct nokia_dsi_panel_data dsi1_panel = { @@ -738,6 +739,10 @@ static void sdp4430_lcd_init(void) pr_err("%s: Could not get lcd2_reset_gpio\n", __func__); } +static struct omap_dss_hdmi_data sdp4430_hdmi_data = { + .hpd_gpio = HDMI_GPIO_HPD, +}; + static struct omap_dss_device sdp4430_hdmi_device = { .name = "hdmi", .driver_name = "hdmi_panel", @@ -745,6 +750,7 @@ static struct omap_dss_device sdp4430_hdmi_device = { .platform_enable = sdp4430_panel_enable_hdmi, .platform_disable = sdp4430_panel_disable_hdmi, .channel = OMAP_DSS_CHANNEL_DIGIT, + .data = &sdp4430_hdmi_data, }; static struct picodlp_panel_data sdp4430_picodlp_pdata = { @@ -829,6 +835,10 @@ static void omap_4430sdp_display_init(void) omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); else omap_hdmi_init(0); + + omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT); + omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT); + omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN); } #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index e921e3be24a4..d839c0506d8e 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -280,7 +280,6 @@ static struct omap_dss_board_info cm_t35_dss_data = { static struct omap2_mcspi_device_config tdo24m_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, /* 0: slave, 1: master */ }; static struct tdo24m_platform_data tdo24m_config = { diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 42a4d11fad23..a9e983e01199 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -137,7 +137,6 @@ static void __init n8x0_usb_init(void) {} static struct omap2_mcspi_device_config p54spi_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, }; static struct spi_board_info n800_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 30ad40db2cf3..b7779c206a90 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -51,8 +51,9 @@ #define GPIO_HUB_NRESET 62 #define GPIO_WIFI_PMENA 43 #define GPIO_WIFI_IRQ 53 -#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ +#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */ #define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ +#define HDMI_GPIO_HPD 63 /* Hotplug detect */ /* wl127x BT, FM, GPS connectivity chip */ static int wl1271_gpios[] = {46, -1, -1}; @@ -413,8 +414,9 @@ int __init omap4_panda_dvi_init(void) } static struct gpio panda_hdmi_gpios[] = { - { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, + { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" }, { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, + { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" }, }; static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) @@ -431,10 +433,13 @@ static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev) { - gpio_free(HDMI_GPIO_LS_OE); - gpio_free(HDMI_GPIO_HPD); + gpio_free_array(panda_hdmi_gpios, ARRAY_SIZE(panda_hdmi_gpios)); } +static struct omap_dss_hdmi_data omap4_panda_hdmi_data = { + .hpd_gpio = HDMI_GPIO_HPD, +}; + static struct omap_dss_device omap4_panda_hdmi_device = { .name = "hdmi", .driver_name = "hdmi_panel", @@ -442,6 +447,7 @@ static struct omap_dss_device omap4_panda_hdmi_device = { .platform_enable = omap4_panda_panel_enable_hdmi, .platform_disable = omap4_panda_panel_disable_hdmi, .channel = OMAP_DSS_CHANNEL_DIGIT, + .data = &omap4_panda_hdmi_data, }; static struct omap_dss_device *omap4_panda_dss_devices[] = { @@ -473,6 +479,10 @@ void omap4_panda_display_init(void) omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); else omap_hdmi_init(0); + + omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT); + omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT); + omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN); } static void __init omap4_panda_init(void) diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index acb4e77b39ef..0a668916e3c1 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -138,17 +138,14 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = { static struct omap2_mcspi_device_config wl1251_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, }; static struct omap2_mcspi_device_config mipid_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, }; static struct omap2_mcspi_device_config tsc2005_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, }; static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index d4683ba5f721..281829036758 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c @@ -117,7 +117,6 @@ static struct omap_dss_board_info zoom_dss_data = { static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { .turbo_mode = 1, - .single_channel = 1, /* 0: slave, 1: master */ }; static struct spi_board_info nec_8048_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 39f9d5a58d0c..7072e0d651b1 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -33,6 +33,7 @@ #include <linux/cpufreq.h> #include <linux/slab.h> +#include <plat/cpu.h> #include <plat/clock.h> #include <plat/sram.h> #include <plat/sdrc.h> diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index e069a9be93df..cd7fd0f91149 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -22,6 +22,7 @@ #include <asm/div64.h> #include <plat/clock.h> +#include <plat/cpu.h> #include "clock.h" #include "cm-regbits-24xx.h" diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 61ad3855f10a..bace9308a4db 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -14,11 +14,14 @@ */ #include <linux/kernel.h> +#include <linux/io.h> #include <linux/clk.h> #include <linux/list.h> +#include <plat/hardware.h> #include <plat/clkdev_omap.h> +#include "iomap.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index d87bc9cb2a36..dfda9a3f2cb2 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c @@ -21,8 +21,10 @@ #include <linux/clk.h> #include <linux/io.h> +#include <plat/hardware.h> #include <plat/clock.h> +#include "iomap.h" #include "clock.h" #include "clock2xxx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 0cc12879e7b9..3b4d09a50399 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -17,8 +17,10 @@ #include <linux/clk.h> #include <linux/list.h> +#include <plat/hardware.h> #include <plat/clkdev_omap.h> +#include "iomap.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index 80bb0f0e92e6..12500097378d 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -22,6 +22,7 @@ #include <linux/clk.h> #include <linux/io.h> +#include <plat/cpu.h> #include <plat/clock.h> #include "clock.h" diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index 952c3e01c9eb..794d82702c85 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -21,6 +21,7 @@ #include <linux/clk.h> #include <linux/io.h> +#include <plat/hardware.h> #include <plat/clock.h> #include "clock.h" diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index d75e5f6b8a01..480fb8f09aed 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -19,15 +19,17 @@ #include <linux/kernel.h> #include <linux/clk.h> #include <linux/list.h> +#include <linux/io.h> +#include <plat/hardware.h> #include <plat/clkdev_omap.h> +#include "iomap.h" #include "clock.h" #include "clock3xxx.h" #include "clock34xx.h" #include "clock36xx.h" #include "clock3517.h" - #include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 08e86d793a1f..c03c1108468e 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -26,8 +26,12 @@ #include <linux/kernel.h> #include <linux/list.h> #include <linux/clk.h> +#include <linux/io.h> + +#include <plat/hardware.h> #include <plat/clkdev_omap.h> +#include "iomap.h" #include "clock.h" #include "clock44xx.h" #include "cm1_44xx.h" diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 04d39cdd2112..c79ed63601ca 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c @@ -18,8 +18,8 @@ #include <linux/err.h> #include <linux/io.h> +#include "iomap.h" #include "common.h" - #include "cm.h" #include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c index 6a836303252c..535d66e2822c 100644 --- a/arch/arm/mach-omap2/cm44xx.c +++ b/arch/arm/mach-omap2/cm44xx.c @@ -18,8 +18,8 @@ #include <linux/err.h> #include <linux/io.h> +#include "iomap.h" #include "common.h" - #include "cm.h" #include "cm1_44xx.h" #include "cm2_44xx.h" diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 6204deaf85b1..bd8810c3753f 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -20,8 +20,8 @@ #include <linux/err.h> #include <linux/io.h> +#include "iomap.h" #include "common.h" - #include "cm.h" #include "cm1_44xx.h" #include "cm2_44xx.h" diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index bcb0c5817167..2d1d775f2c3e 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c @@ -33,7 +33,6 @@ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) static struct omap2_mcspi_device_config ads7846_mcspi_config = { .turbo_mode = 0, - .single_channel = 1, /* 0: slave, 1: master */ }; static struct ads7846_platform_data ads7846_config = { diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index aaf421178c91..93419de4534a 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -17,12 +17,12 @@ #include <linux/clk.h> #include <linux/io.h> -#include "common.h" #include <plat/board.h> #include <plat/mux.h> - #include <plat/clock.h> +#include "iomap.h" +#include "common.h" #include "sdrc.h" #include "control.h" diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index febffde2ff10..f78ec4e6a5c7 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -133,6 +133,8 @@ void am33xx_map_io(void); void omap4_map_io(void); void ti81xx_map_io(void); +extern void __init omap_init_consistent_dma_size(void); + /** * omap_test_timeout - busy-loop, testing a condition * @cond: condition to test until it evaluates to true @@ -235,5 +237,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void) return 0; } #endif + +struct omap_sdrc_params; +extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, + struct omap_sdrc_params *sdrc_cs1); + #endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 114c037e433c..2fd5fd1abb4f 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -15,9 +15,10 @@ #include <linux/kernel.h> #include <linux/io.h> -#include "common.h" #include <plat/sdrc.h> +#include "iomap.h" +#include "common.h" #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index 0ba68d3764bc..03149de08544 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -16,7 +16,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H #define __ARCH_ARM_MACH_OMAP2_CONTROL_H -#include <mach/io.h> #include <mach/ctrl_module_core_44xx.h> #include <mach/ctrl_module_wkup_44xx.h> #include <mach/ctrl_module_pad_core_44xx.h> diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 0b510ad01a00..e13644c11260 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -24,7 +24,7 @@ #include <asm/mach/map.h> #include <asm/pmu.h> -#include <plat/tc.h> +#include "iomap.h" #include <plat/board.h> #include <plat/mcbsp.h> #include <plat/mmc.h> @@ -405,6 +405,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) break; default: pr_err("Invalid McSPI Revision value\n"); + kfree(pdata); return -EINVAL; } diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 3c446d1a1781..28d16a4bb615 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -30,6 +30,7 @@ #include <plat/omap-pm.h> #include "common.h" +#include "iomap.h" #include "mux.h" #include "control.h" #include "display.h" @@ -103,12 +104,8 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags) u32 reg; u16 control_i2c_1; - /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */ - omap_mux_init_signal("hdmi_hpd", - OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("hdmi_cec", OMAP_PIN_INPUT_PULLUP); - /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */ omap_mux_init_signal("hdmi_ddc_scl", OMAP_PIN_INPUT_PULLUP); omap_mux_init_signal("hdmi_ddc_sda", diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c index 9c442e290ccb..e28e761b7ab9 100644 --- a/arch/arm/mach-omap2/emu.c +++ b/arch/arm/mach-omap2/emu.c @@ -21,6 +21,10 @@ #include <linux/clk.h> #include <linux/err.h> +#include <mach/hardware.h> + +#include "iomap.h" + MODULE_LICENSE("GPL"); MODULE_AUTHOR("Alexander Shishkin"); @@ -30,29 +34,8 @@ MODULE_AUTHOR("Alexander Shishkin"); #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) -static struct amba_device omap3_etb_device = { - .dev = { - .init_name = "etb", - }, - .res = { - .start = ETB_BASE, - .end = ETB_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .periphid = 0x000bb907, -}; - -static struct amba_device omap3_etm_device = { - .dev = { - .init_name = "etm", - }, - .res = { - .start = ETM_BASE, - .end = ETM_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .periphid = 0x102bb921, -}; +static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); +static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); static int __init emu_init(void) { @@ -66,4 +49,3 @@ static int __init emu_init(void) } subsys_initcall(emu_init); - diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 8ad210bda9a9..386dec8d2351 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -16,6 +16,7 @@ #include <asm/mach/flash.h> +#include <plat/cpu.h> #include <plat/nand.h> #include <plat/board.h> #include <plat/gpmc.h> diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 5cdce10d6183..385b3e02c4a6 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -18,6 +18,7 @@ #include <asm/mach/flash.h> +#include <plat/cpu.h> #include <plat/onenand.h> #include <plat/board.h> #include <plat/gpmc.h> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 130034bf01d5..dfffbbf4c009 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -528,7 +528,13 @@ int gpmc_cs_configure(int cs, int cmd, int wval) case GPMC_CONFIG_DEV_SIZE: regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + /* clear 2 target bits */ + regval &= ~GPMC_CONFIG1_DEVICESIZE(3); + + /* set the proper value */ regval |= GPMC_CONFIG1_DEVICESIZE(wval); + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); break; diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index bd844af13af5..ad0adb5a1e0e 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -175,14 +175,15 @@ static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc) { u32 reg; - if (mmc->slots[0].internal_clock) { - reg = omap_ctrl_readl(control_devconf1_offset); + reg = omap_ctrl_readl(control_devconf1_offset); + if (mmc->slots[0].internal_clock) reg |= OMAP2_MMCSDIO2ADPCLKISEL; - omap_ctrl_writel(reg, control_devconf1_offset); - } + else + reg &= ~OMAP2_MMCSDIO2ADPCLKISEL; + omap_ctrl_writel(reg, control_devconf1_offset); } -static void hsmmc23_before_set_reg(struct device *dev, int slot, +static void hsmmc2_before_set_reg(struct device *dev, int slot, int power_on, int vdd) { struct omap_mmc_platform_data *mmc = dev->platform_data; @@ -407,14 +408,13 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, c->caps &= ~MMC_CAP_8_BIT_DATA; c->caps |= MMC_CAP_4_BIT_DATA; } - /* FALLTHROUGH */ - case 3: if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { /* off-chip level shifting, or none */ - mmc->slots[0].before_set_reg = hsmmc23_before_set_reg; + mmc->slots[0].before_set_reg = hsmmc2_before_set_reg; mmc->slots[0].after_set_reg = NULL; } break; + case 3: case 4: case 5: mmc->slots[0].before_set_reg = NULL; diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S deleted file mode 100644 index 56964a0c4c7e..000000000000 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ /dev/null @@ -1,18 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for OMAP-based platforms - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h deleted file mode 100644 index fd78f31aa1ad..000000000000 --- a/arch/arm/mach-omap2/include/mach/io.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap2/include/mach/io.h - */ - -#include <plat/io.h> diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h deleted file mode 100644 index d488721ab90b..000000000000 --- a/arch/arm/mach-omap2/include/mach/system.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap2/include/mach/system.h - */ - -#include <plat/system.h> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 3f174d51f67f..3203128eef7d 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -24,26 +24,23 @@ #include <linux/omapfb.h> #include <asm/tlb.h> - #include <asm/mach/map.h> #include <plat/sram.h> #include <plat/sdrc.h> #include <plat/serial.h> - -#include "clock2xxx.h" -#include "clock3xxx.h" -#include "clock44xx.h" - -#include "common.h" #include <plat/omap-pm.h> +#include <plat/omap_hwmod.h> +#include <plat/multi.h> + +#include "iomap.h" #include "voltage.h" #include "powerdomain.h" - #include "clockdomain.h" -#include <plat/omap_hwmod.h> -#include <plat/multi.h> #include "common.h" +#include "clock2xxx.h" +#include "clock3xxx.h" +#include "clock44xx.h" /* * The machine specific code may provide the extra mapping besides the @@ -388,7 +385,7 @@ static void __init omap_hwmod_init_postsetup(void) omap_pm_if_early_init(); } -#ifdef CONFIG_ARCH_OMAP2 +#ifdef CONFIG_SOC_OMAP2420 void __init omap2420_init_early(void) { omap2_set_globals_242x(); @@ -400,7 +397,9 @@ void __init omap2420_init_early(void) omap_hwmod_init_postsetup(); omap2420_clk_init(); } +#endif +#ifdef CONFIG_SOC_OMAP2430 void __init omap2430_init_early(void) { omap2_set_globals_243x(); @@ -488,43 +487,3 @@ void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, _omap2_init_reprogram_sdrc(); } } - -/* - * NOTE: Please use ioremap + __raw_read/write where possible instead of these - */ - -u8 omap_readb(u32 pa) -{ - return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_readb); - -u16 omap_readw(u32 pa) -{ - return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_readw); - -u32 omap_readl(u32 pa) -{ - return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_readl); - -void omap_writeb(u8 v, u32 pa) -{ - __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_writeb); - -void omap_writew(u16 v, u32 pa) -{ - __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_writew); - -void omap_writel(u32 v, u32 pa) -{ - __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); -} -EXPORT_SYMBOL(omap_writel); diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/mach-omap2/iomap.h index 0696bae1818b..0812b154f5b5 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/mach-omap2/iomap.h @@ -1,13 +1,5 @@ /* - * arch/arm/plat-omap/include/mach/io.h - * - * IO definitions for TI OMAP processors and boards - * - * Copied from arch/arm/mach-sa1100/include/mach/io.h - * Copyright (C) 1997-1999 Russell King - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> + * IO mappings for OMAP2+ * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -25,48 +17,14 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include <mach/hardware.h> - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -/* - * ---------------------------------------------------------------------------- - * I/O mapping - * ---------------------------------------------------------------------------- - */ - -#ifdef __ASSEMBLER__ -#define IOMEM(x) (x) -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - -#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) #define OMAP2_L3_IO_OFFSET 0x90000000 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ - #define OMAP2_L4_IO_OFFSET 0xb2000000 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ @@ -87,16 +45,6 @@ /* * ---------------------------------------------------------------------------- - * Omap1 specific IO mapping - * ---------------------------------------------------------------------------- - */ - -#define OMAP1_IO_PHYS 0xFFFB0000 -#define OMAP1_IO_SIZE 0x40000 -#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) - -/* - * ---------------------------------------------------------------------------- * Omap2 specific IO mapping * ---------------------------------------------------------------------------- */ @@ -247,31 +195,3 @@ /* 0x4e000000 --> 0xfd300000 */ #define OMAP44XX_DMM_SIZE SZ_1M #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) -/* - * ---------------------------------------------------------------------------- - * Omap specific register access - * ---------------------------------------------------------------------------- - */ - -#ifndef __ASSEMBLER__ - -/* - * NOTE: Please use ioremap + __raw_read/write where possible instead of these - */ - -extern u8 omap_readb(u32 pa); -extern u16 omap_readw(u32 pa); -extern u32 omap_readl(u32 pa); -extern void omap_writeb(u8 v, u32 pa); -extern void omap_writew(u16 v, u32 pa); -extern void omap_writel(u32 v, u32 pa); - -struct omap_sdrc_params; -extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, - struct omap_sdrc_params *sdrc_cs1); - -extern void __init omap_init_consistent_dma_size(void); - -#endif - -#endif diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 1fef061f7927..6da2d0edee11 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -14,10 +14,13 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <mach/hardware.h> + #include <asm/exception.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> + +#include "iomap.h" /* selected INTC register offsets */ diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index c1bf3ef0ba02..deffbf1c9627 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -23,11 +23,12 @@ #include <asm/cacheflush.h> #include <asm/hardware/gic.h> #include <asm/smp_scu.h> + #include <mach/hardware.h> #include <mach/omap-secure.h> +#include "iomap.h" #include "common.h" - #include "clockdomain.h" /* SCU base address */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index c11273da5dcc..f08e442af397 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -56,27 +56,6 @@ struct omap_hwmod_class omap2_dss_hwmod_class = { }; /* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -struct omap_hwmod_class omap2_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2_dispc_sysc, -}; - -/* * 'rfbi' class * remote frame buffer interface */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 177dee20faef..2a6729741b06 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -28,6 +28,28 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .dma_req = -1 } }; + +/* + * 'dispc' class + * display controller + */ + +static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dispc_hwmod_class = { + .name = "dispc", + .sysc = &omap2_dispc_sysc, +}; + /* OMAP2xxx Timer Common */ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { .rev_offs = 0x0000, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 5324e8d93bc0..3c8dd928628e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1480,6 +1480,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), }; +/* + * 'dispc' class + * display controller + */ + +static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSC_HAS_ENAWAKEUP), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap3_dispc_hwmod_class = { + .name = "dispc", + .sysc = &omap3_dispc_sysc, +}; + /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .master = &omap3xxx_l4_core_hwmod, @@ -1503,7 +1525,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2_dispc_hwmod_class, + .class = &omap3_dispc_hwmod_class, .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_alwon_fck", .prcm = { @@ -3523,12 +3545,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_uart2_hwmod, &omap3xxx_uart3_hwmod, - /* dss class */ - &omap3xxx_dss_dispc_hwmod, - &omap3xxx_dss_dsi1_hwmod, - &omap3xxx_dss_rfbi_hwmod, - &omap3xxx_dss_venc_hwmod, - /* i2c class */ &omap3xxx_i2c1_hwmod, &omap3xxx_i2c2_hwmod, @@ -3635,6 +3651,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = { NULL }; +static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = { + /* dss class */ + &omap3xxx_dss_dispc_hwmod, + &omap3xxx_dss_dsi1_hwmod, + &omap3xxx_dss_rfbi_hwmod, + &omap3xxx_dss_venc_hwmod, + NULL +}; + int __init omap3xxx_hwmod_init(void) { int r; @@ -3708,6 +3733,21 @@ int __init omap3xxx_hwmod_init(void) if (h) r = omap_hwmod_register(h); + if (r < 0) + return r; + + /* + * DSS code presumes that dss_core hwmod is handled first, + * _before_ any other DSS related hwmods so register common + * DSS hwmods last to ensure that dss_core is already registered. + * Otherwise some change things may happen, for ex. if dispc + * is handled before dss_core and DSS is enabled in bootloader + * DIPSC will be reset with outputs enabled which sometimes leads + * to unrecoverable L3 error. + * XXX The long-term fix to this is to ensure modules are set up + * in dependency order in the hwmod core code. + */ + r = omap_hwmod_register(omap3xxx_dss_hwmods); return r; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index f9f151081760..ef0524c10a84 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1031,6 +1031,7 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { { + .name = "mpu", .pa_start = 0x4012e000, .pa_end = 0x4012e07f, .flags = ADDR_TYPE_RT @@ -1049,6 +1050,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { { + .name = "dma", .pa_start = 0x4902e000, .pa_end = 0x4902e07f, .flags = ADDR_TYPE_RT diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c index e6dda694fd5c..5037e76e4e23 100644 --- a/arch/arm/mach-omap2/opp2420_data.c +++ b/arch/arm/mach-omap2/opp2420_data.c @@ -28,6 +28,8 @@ * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ */ +#include <plat/hardware.h> + #include "opp2xxx.h" #include "sdrc.h" #include "clock.h" diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c index 1b9596ae201e..750805c528d8 100644 --- a/arch/arm/mach-omap2/opp2430_data.c +++ b/arch/arm/mach-omap2/opp2430_data.c @@ -26,6 +26,8 @@ * This is technically part of the OMAP2xxx clock code. */ +#include <plat/hardware.h> + #include "opp2xxx.h" #include "sdrc.h" #include "clock.h" diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index b8822f8b2891..bee8bb9111eb 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -26,7 +26,6 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/clk.h> -#include <linux/io.h> #include <linux/irq.h> #include <linux/time.h> #include <linux/gpio.h> @@ -35,12 +34,13 @@ #include <asm/mach/irq.h> #include <asm/mach-types.h> -#include <mach/irqs.h> #include <plat/clock.h> #include <plat/sram.h> #include <plat/dma.h> #include <plat/board.h> +#include <mach/irqs.h> + #include "common.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" @@ -49,7 +49,6 @@ #include "sdrc.h" #include "pm.h" #include "control.h" - #include "powerdomain.h" #include "clockdomain.h" @@ -232,7 +231,6 @@ static int omap2_can_sleep(void) static void omap2_pm_idle(void) { - local_irq_disable(); local_fiq_disable(); if (!omap2_can_sleep()) { @@ -249,7 +247,6 @@ static void omap2_pm_idle(void) out: local_fiq_enable(); - local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -260,26 +257,6 @@ static int omap2_pm_begin(suspend_state_t state) return 0; } -static int omap2_pm_suspend(void) -{ - u32 wken_wkup, mir1; - - wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); - wken_wkup &= ~OMAP24XX_EN_GPT1_MASK; - omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); - - /* Mask GPT1 */ - mir1 = omap_readl(0x480fe0a4); - omap_writel(1 << 5, 0x480fe0ac); - - omap2_enter_full_retention(); - - omap_writel(mir1, 0x480fe0a4); - omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); - - return 0; -} - static int omap2_pm_enter(suspend_state_t state) { int ret = 0; @@ -287,7 +264,7 @@ static int omap2_pm_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_STANDBY: case PM_SUSPEND_MEM: - ret = omap2_pm_suspend(); + omap2_enter_full_retention(); break; default: ret = -EINVAL; @@ -468,7 +445,7 @@ static int __init omap2_pm_init(void) } suspend_set_ops(&omap_pm_ops); - pm_idle = omap2_pm_idle; + arm_pm_idle = omap2_pm_idle; return 0; } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fc6987578920..b77df735fa6c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -418,10 +418,9 @@ void omap_sram_idle(void) static void omap3_pm_idle(void) { - local_irq_disable(); local_fiq_disable(); - if (omap_irq_pending() || need_resched()) + if (omap_irq_pending()) goto out; trace_power_start(POWER_CSTATE, 1, smp_processor_id()); @@ -434,7 +433,6 @@ static void omap3_pm_idle(void) out: local_fiq_enable(); - local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -848,7 +846,7 @@ static int __init omap3_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - pm_idle = omap3_pm_idle; + arm_pm_idle = omap3_pm_idle; omap3_idle_init(); /* diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index c264ef7219c1..c840689df24a 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) * omap_default_idle - OMAP4 default ilde routine.' * * Implements OMAP4 memory, IO ordering requirements which can't be addressed - * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and + * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and * by secondary CPU with CONFIG_CPUIDLE. */ static void omap_default_idle(void) { - local_irq_disable(); local_fiq_disable(); omap_do_wfi(); local_fiq_enable(); - local_irq_enable(); } /** @@ -255,8 +253,8 @@ static int __init omap4_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - /* Overwrite the default arch_idle() */ - pm_idle = omap_default_idle; + /* Overwrite the default cpu_do_idle() */ + arm_pm_idle = omap_default_idle; omap4_idle_init(); diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index ca669b50f390..928dbd4f20ed 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c @@ -15,8 +15,8 @@ #include <linux/err.h> #include <linux/io.h> +#include "iomap.h" #include "common.h" - #include "prcm_mpu44xx.h" #include "cm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index c1c4d86a79a8..9ce765407ad5 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -19,6 +19,7 @@ #include "common.h" #include <plat/cpu.h> #include <plat/prcm.h> +#include <plat/irqs.h> #include "vp.h" diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 33dd655e6aab..f4c151989c91 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -17,10 +17,11 @@ #include <linux/err.h> #include <linux/io.h> -#include "common.h" #include <plat/cpu.h> #include <plat/prcm.h> +#include "iomap.h" +#include "common.h" #include "vp.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 860118ab43e2..873b51d494ea 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -24,7 +24,6 @@ #include <linux/interrupt.h> #include <linux/slab.h> -#include <mach/system.h> #include <plat/common.h> #include <plat/prcm.h> #include <plat/irqs.h> diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index f6de5bc6b12a..9b3898a3ac9b 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -16,8 +16,8 @@ #include <linux/err.h> #include <linux/io.h> +#include "iomap.h" #include "common.h" - #include "prm44xx.h" #include "prminst44xx.h" #include "prm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c index 7479d7ea1379..845c4fd2b125 100644 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ b/arch/arm/mach-omap2/sdram-nokia.c @@ -17,7 +17,6 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/io.h> #include "common.h" #include <plat/clock.h> #include <plat/sdrc.h> diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 791a63cdceb2..2c329a6f4778 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -24,13 +24,14 @@ #include <linux/clk.h> #include <linux/io.h> -#include "common.h" #include <plat/clock.h> #include <plat/sram.h> +#include <plat/sdrc.h> +#include "iomap.h" +#include "common.h" #include "prm2xxx_3xxx.h" #include "clock.h" -#include <plat/sdrc.h> #include "sdrc.h" /* Memory timing, DLL mode flags */ diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S index b5071a47ec39..d4bf904d84ab 100644 --- a/arch/arm/mach-omap2/sleep24xx.S +++ b/arch/arm/mach-omap2/sleep24xx.S @@ -27,7 +27,6 @@ #include <linux/linkage.h> #include <asm/assembler.h> -#include <mach/io.h> #include <plat/omap24xx.h> diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index f2ea1bd1c691..1f62f23673fb 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -23,10 +23,13 @@ * MA 02111-1307 USA */ #include <linux/linkage.h> + #include <asm/assembler.h> + +#include <plat/hardware.h> #include <plat/sram.h> -#include <mach/io.h> +#include "iomap.h" #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 9dd93453e563..7e755bb0ffc4 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -897,7 +897,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) ret = sr_late_init(sr_info); if (ret) { pr_warning("%s: Error in SR late init\n", __func__); - return ret; + goto err_iounmap; } } diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index ff9b9dbcb30e..ee0bfcc1410f 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S @@ -29,10 +29,12 @@ * These crashes may be intermittent. */ #include <linux/linkage.h> + #include <asm/assembler.h> -#include <mach/io.h> + #include <mach/hardware.h> +#include "iomap.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index 76730209fa0e..d4d39ef04769 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S @@ -29,10 +29,12 @@ * These crashes may be intermittent. */ #include <linux/linkage.h> + #include <asm/assembler.h> -#include <mach/io.h> + #include <mach/hardware.h> +#include "iomap.h" #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 6f5849aaa7c0..df5a21322b0a 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -26,11 +26,12 @@ * MA 02111-1307 USA */ #include <linux/linkage.h> + #include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/io.h> +#include <mach/hardware.h> +#include "iomap.h" #include "sdrc.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 6eeff0e0ae01..5c9acea95761 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -270,7 +270,7 @@ static struct clocksource clocksource_gpt = { static u32 notrace dmtimer_read_sched_clock(void) { if (clksrc.reserved) - return __omap_dm_timer_read_counter(clksrc.io_base, 1); + return __omap_dm_timer_read_counter(&clksrc, 1); return 0; } diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index d2513ac79ff5..2e6454c8d4ba 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -57,5 +57,14 @@ struct meminfo; struct tag; extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); +/***************************************************************************** + * Helpers to access Orion registers + ****************************************************************************/ +/* + * These are not preempt-safe. Locks, if needed, must be taken + * care of by the caller. + */ +#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r)) +#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r)) #endif diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S index d658992e5401..79eb502a1e64 100644 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S @@ -10,12 +10,6 @@ #include <mach/bridge-regs.h> - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_preamble, base, tmp ldr \base, =MAIN_IRQ_CAUSE .endm diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h deleted file mode 100644 index e9d9afdc2659..000000000000 --- a/arch/arm/mach-orion5x/include/mach/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/io.h - * - * Tzachi Perelstein <tzachi@marvell.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "orion5x.h" - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - - -/***************************************************************************** - * Helpers to access Orion registers - ****************************************************************************/ -/* - * These are not preempt-safe. Locks, if needed, must be taken - * care of by the caller. - */ -#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r)) -#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r)) - - -#endif diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h deleted file mode 100644 index 825a2650cefa..000000000000 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/system.h - * - * Tzachi Perelstein <tzachi@marvell.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index 09a045f0c406..a9d21510c974 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -19,6 +19,7 @@ #include <asm/mach/pci.h> #include <plat/pcie.h> #include <plat/addr-map.h> +#include <mach/orion5x.h> #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c index c9abb8fbfa70..7189827d641d 100644 --- a/arch/arm/mach-orion5x/tsx09-common.c +++ b/arch/arm/mach-orion5x/tsx09-common.c @@ -15,6 +15,7 @@ #include <linux/mv643xx_eth.h> #include <linux/timex.h> #include <linux/serial_reg.h> +#include <mach/orion5x.h> #include "tsx09-common.h" #include "common.h" diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S deleted file mode 100644 index 9b505ac00be9..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * entry-macro.S - * - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * Low-level IRQ helper macros for picoXcell platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-picoxcell/include/mach/io.h b/arch/arm/mach-picoxcell/include/mach/io.h deleted file mode 100644 index 7573ec7d10a3..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* No ioports, but needed for driver compatibility. */ -#define __io(a) __typesafe_io(a) -/* No PCI possible on picoxcell. */ -#define __mem_pci(a) (a) - -#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h deleted file mode 100644 index 1a5d8cb57df4..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching and wait for interrupt - * tricks. - */ - cpu_do_idle(); -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/arch/arm/mach-pnx4008/include/mach/entry-macro.S index db7eeebf30d7..77a555846719 100644 --- a/arch/arm/mach-pnx4008/include/mach/entry-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/entry-macro.S @@ -25,15 +25,9 @@ #define SIC1_BASE_INT 32 #define SIC2_BASE_INT 64 - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp /* decode the MIC interrupt numbers */ ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h deleted file mode 100644 index cbf0904540ea..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/io.h +++ /dev/null @@ -1,21 +0,0 @@ - -/* - * arch/arm/mach-pnx4008/include/mach/io.h - * - * Author: Dmitry Chigirev <chigirev@ru.mvista.com> - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h deleted file mode 100644 index 60cfe7188091..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * arch/arm/mach-pnx4008/include/mach/system.h - * - * Copyright (C) 2003 Philips Semiconductors - * Copyright (C) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S index 1c8a50f102a7..86434e7a5be9 100644 --- a/arch/arm/mach-prima2/include/mach/entry-macro.S +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S @@ -20,10 +20,3 @@ cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f movges \irqnr, #0 .endm - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - diff --git a/arch/arm/mach-prima2/include/mach/io.h b/arch/arm/mach-prima2/include/mach/io.h deleted file mode 100644 index 6c31e9ec279e..000000000000 --- a/arch/arm/mach-prima2/include/mach/io.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/mach-prima2/include/mach/io.h - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __MACH_PRIMA2_IO_H -#define __MACH_PRIMA2_IO_H - -#define IO_SPACE_LIMIT ((resource_size_t)0) - -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h deleted file mode 100644 index 2c7d2a9d0c92..000000000000 --- a/arch/arm/mach-prima2/include/mach/system.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-prima2/include/mach/system.h - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __MACH_SYSTEM_H__ -#define __MACH_SYSTEM_H__ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 61d3c72ded84..109ccd2a8885 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -108,6 +108,7 @@ config CSB726_CSB701 config MACH_ARMCORE bool "CompuLab CM-X255/CM-X270 modules" + select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI select PXA27x select IWMMXT select PXA25x diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c index 1d5859d9a0e3..9ee2ad6a0a07 100644 --- a/arch/arm/mach-pxa/clock-pxa2xx.c +++ b/arch/arm/mach-pxa/clock-pxa2xx.c @@ -9,6 +9,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/syscore_ops.h> #include <mach/pxa2xx-regs.h> diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 39e265cfc86d..048c4299473c 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -19,6 +19,7 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/apm-emulation.h> +#include <linux/io.h> #include <asm/irq.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c index 88fbec05ec50..b85b4ab7aac6 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/cpufreq.h> #include <linux/slab.h> +#include <linux/io.h> #include <mach/pxa3xx-regs.h> diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S deleted file mode 100644 index 260c0c17692a..000000000000 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ /dev/null @@ -1,15 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for PXA-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 8184669dde28..56d92e5cad85 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -40,7 +40,6 @@ #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) #ifndef __ASSEMBLY__ -# define IOMEM(x) ((void __iomem *)(x)) # define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) /* With indexed regs we don't want to feed the index through io_p2v() @@ -52,7 +51,6 @@ #else -# define IOMEM(x) x # define __REG(x) io_p2v(x) # define __PREG(x) io_v2p(x) @@ -337,8 +335,4 @@ extern unsigned int get_memclk_frequency_10khz(void); extern unsigned long get_clock_tick_rate(void); #endif -#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) -#define ARCH_HAS_DMA_SET_COHERENT_MASK -#endif - #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h deleted file mode 100644 index fdca3be47d9b..000000000000 --- a/arch/arm/mach-pxa/include/mach/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/io.h - * - * Copied from asm/arch/sa1100/io.h - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include <mach/hardware.h> - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h deleted file mode 100644 index c5afacd3cc0b..000000000000 --- a/arch/arm/mach-pxa/include/mach/system.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/system.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index f14775536b83..b029562da41e 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -17,6 +17,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/syscore_ops.h> #include <mach/pxa2xx-regs.h> diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c index 868270421b8c..f8ec85450c42 100644 --- a/arch/arm/mach-pxa/pxa2xx.c +++ b/arch/arm/mach-pxa/pxa2xx.c @@ -13,6 +13,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/device.h> +#include <linux/io.h> #include <mach/hardware.h> #include <mach/pxa2xx-regs.h> diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 40bb16501d86..17cbc0c7bdb8 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c @@ -16,6 +16,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/pxa300.h> diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 8d614ecd8e99..6dc99d4f2dc6 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c @@ -16,6 +16,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/pxa320.h> diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 8d5168d253a9..6d3b39f82ea5 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -24,6 +24,7 @@ #include <linux/leds.h> #include <linux/suspend.h> #include <linux/gpio.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <mach/pm.h> diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 735b57aaf2d6..f8f2c0ac4c01 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h @@ -28,21 +28,11 @@ #include <asm/setup.h> #include <asm/leds.h> -#define AMBA_DEVICE(name,busid,base,plat) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = REALVIEW_##base##_BASE, \ - .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ - .flags = IORESOURCE_MEM, \ - }, \ - .dma_mask = ~0, \ - .irq = base##_IRQ, \ -} +#define APB_DEVICE(name, busid, base, plat) \ +static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) + +#define AHB_DEVICE(name, busid, base, plat) \ +static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) struct machine_desc; diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S deleted file mode 100644 index e8a5179c2653..000000000000 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for RealView platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h index 8a638d15797f..281e71c97525 100644 --- a/arch/arm/mach-realview/include/mach/hardware.h +++ b/arch/arm/mach-realview/include/mach/hardware.h @@ -37,6 +37,6 @@ #else #define IO_ADDRESS(x) (x) #endif -#define __io_address(n) __io(IO_ADDRESS(n)) +#define __io_address(n) IOMEM(IO_ADDRESS(n)) #endif diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h deleted file mode 100644 index f05bcdf605d8..000000000000 --- a/arch/arm/mach-realview/include/mach/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 5c3c625e3e04..708f84156f2c 100644 --- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h @@ -40,6 +40,7 @@ #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ +#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ @@ -73,7 +74,6 @@ #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ -#define IRQ_PB1176_GPIO0 -1 #define IRQ_PB1176_SCTL -1 #define NR_GIC_PB1176 2 diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h deleted file mode 100644 index 471b671159ce..000000000000 --- a/arch/arm/mach-realview/include/mach/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 9578145f2df0..157e1bc6e83c 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * These devices are connected via the core APB bridge */ -#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } -#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } +#define GPIO2_IRQ { IRQ_EB_GPIO2 } +#define GPIO3_IRQ { IRQ_EB_GPIO3 } -#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } +#define AACI_IRQ { IRQ_EB_AACI } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } -#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } +#define KMI0_IRQ { IRQ_EB_KMI0 } +#define KMI1_IRQ { IRQ_EB_KMI1 } /* * These devices are connected directly to the multi-layer AHB switch */ -#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } -#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } +#define EB_SMC_IRQ { } +#define MPMC_IRQ { } +#define EB_CLCD_IRQ { IRQ_EB_CLCD } +#define DMAC_IRQ { IRQ_EB_DMA } /* * These devices are connected via the core APB bridge */ -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } -#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } -#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } -#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } +#define SCTL_IRQ { } +#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } +#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } +#define GPIO1_IRQ { IRQ_EB_GPIO1 } +#define EB_RTC_IRQ { IRQ_EB_RTC } /* * These devices are connected via the DMA APB bridge */ -#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } -#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } -#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } -#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } -#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } -#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } +#define SCI_IRQ { IRQ_EB_SCI } +#define EB_UART0_IRQ { IRQ_EB_UART0 } +#define EB_UART1_IRQ { IRQ_EB_UART1 } +#define EB_UART2_IRQ { IRQ_EB_UART2 } +#define EB_UART3_IRQ { IRQ_EB_UART3 } +#define EB_SSP_IRQ { IRQ_EB_SSP } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); +APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); +APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); -AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); -AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); -AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); -AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); -AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); -AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); -AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); +AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); +AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); +AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); +AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); +APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); +APB_DEVICE(sci0, "dev:sci0", SCI, NULL); +APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); +APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); +APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); +APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index e4abe94fb11a..b1d7cafa1a6d 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * RealView PB1176 AMBA devices */ -#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } -#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } +#define GPIO2_IRQ { IRQ_PB1176_GPIO2 } +#define GPIO3_IRQ { IRQ_PB1176_GPIO3 } +#define AACI_IRQ { IRQ_PB1176_AACI } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } -#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } -#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } -#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } -#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } -#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } -#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } -#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } -#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } -#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } -#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } -#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } -#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } +#define KMI0_IRQ { IRQ_PB1176_KMI0 } +#define KMI1_IRQ { IRQ_PB1176_KMI1 } +#define PB1176_SMC_IRQ { } +#define MPMC_IRQ { } +#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } +#define SCTL_IRQ { } +#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } +#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } +#define GPIO1_IRQ { IRQ_PB1176_GPIO1 } +#define PB1176_RTC_IRQ { IRQ_DC1176_RTC } +#define SCI_IRQ { IRQ_PB1176_SCI } +#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } +#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } +#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } +#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } +#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } +#define PB1176_SSP_IRQ { IRQ_DC1176_SSP } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); +APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); +APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); -AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); -AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); -AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); -AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); -AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); -AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); -AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); +AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); +AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); +APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); +APB_DEVICE(sci0, "dev:sci0", SCI, NULL); +APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); +APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); +APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); +APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); +APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); +AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 2147335f66f5..ae7fe54f6eb6 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB11MPCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } -#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } +#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } +#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } +#define AACI_IRQ { IRQ_TC11MP_AACI } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } -#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } -#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } -#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } -#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } -#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } -#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } -#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } -#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } -#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } -#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } -#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } -#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } +#define KMI0_IRQ { IRQ_TC11MP_KMI0 } +#define KMI1_IRQ { IRQ_TC11MP_KMI1 } +#define PB11MP_SMC_IRQ { } +#define MPMC_IRQ { } +#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } +#define DMAC_IRQ { IRQ_PB11MP_DMAC } +#define SCTL_IRQ { } +#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } +#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } +#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } +#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } +#define SCI_IRQ { IRQ_PB11MP_SCI } +#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } +#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } +#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } +#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } +#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); +APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); +APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); -AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); -AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); -AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); -AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); -AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); +AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); +AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); +APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); +APB_DEVICE(sci0, "dev:sci0", SCI, NULL); +APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); +APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); +APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); +APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); -AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); +AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 25b2e59296f8..59650174e6ed 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c @@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBA8Core AMBA devices */ -#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } -#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } +#define GPIO2_IRQ { IRQ_PBA8_GPIO2 } +#define GPIO3_IRQ { IRQ_PBA8_GPIO3 } +#define AACI_IRQ { IRQ_PBA8_AACI } #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } -#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } -#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } -#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } -#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } -#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } -#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } -#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } -#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } -#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } -#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } -#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } -#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } +#define KMI0_IRQ { IRQ_PBA8_KMI0 } +#define KMI1_IRQ { IRQ_PBA8_KMI1 } +#define PBA8_SMC_IRQ { } +#define MPMC_IRQ { } +#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } +#define DMAC_IRQ { IRQ_PBA8_DMAC } +#define SCTL_IRQ { } +#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } +#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } +#define GPIO1_IRQ { IRQ_PBA8_GPIO1 } +#define PBA8_RTC_IRQ { IRQ_PBA8_RTC } +#define SCI_IRQ { IRQ_PBA8_SCI } +#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } +#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } +#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } +#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } +#define PBA8_SSP_IRQ { IRQ_PBA8_SSP } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); +APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); +APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); -AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); -AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); -AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); -AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); -AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); +AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); +AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); +APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); +APB_DEVICE(sci0, "dev:sci0", SCI, NULL); +APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); +APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); +APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); +APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); -AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); +AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index ac715645b860..1cd9956f5875 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBXCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } -#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } +#define GPIO2_IRQ { IRQ_PBX_GPIO2 } +#define GPIO3_IRQ { IRQ_PBX_GPIO3 } +#define AACI_IRQ { IRQ_PBX_AACI } #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } -#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } -#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } -#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } -#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } -#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } -#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } -#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } -#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } -#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } -#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } -#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } -#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } +#define KMI0_IRQ { IRQ_PBX_KMI0 } +#define KMI1_IRQ { IRQ_PBX_KMI1 } +#define PBX_SMC_IRQ { } +#define MPMC_IRQ { } +#define PBX_CLCD_IRQ { IRQ_PBX_CLCD } +#define DMAC_IRQ { IRQ_PBX_DMAC } +#define SCTL_IRQ { } +#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } +#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } +#define GPIO1_IRQ { IRQ_PBX_GPIO1 } +#define PBX_RTC_IRQ { IRQ_PBX_RTC } +#define SCI_IRQ { IRQ_PBX_SCI } +#define PBX_UART0_IRQ { IRQ_PBX_UART0 } +#define PBX_UART1_IRQ { IRQ_PBX_UART1 } +#define PBX_UART2_IRQ { IRQ_PBX_UART2 } +#define PBX_UART3_IRQ { IRQ_PBX_UART3 } +#define PBX_SSP_IRQ { IRQ_PBX_SSP } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); +APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); +APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); -AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); -AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); -AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); -AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); -AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); +AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); +AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); +APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); +APB_DEVICE(sci0, "dev:sci0", SCI, NULL); +APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); +APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); +APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); +APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); -AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); +AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile index aa77bc9efbbb..dfa405c0cfde 100644 --- a/arch/arm/mach-rpc/Makefile +++ b/arch/arm/mach-rpc/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := dma.o irq.o riscpc.o +obj-y := dma.o fiq.o irq.o riscpc.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S new file mode 100644 index 000000000000..48ddd57db16e --- /dev/null +++ b/arch/arm/mach-rpc/fiq.S @@ -0,0 +1,16 @@ +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <mach/hardware.h> +#include <mach/entry-macro.S> + + .text + + .global rpc_default_fiq_end +ENTRY(rpc_default_fiq_start) + mov r12, #ioc_base_high + .if ioc_base_low + orr r12, r12, #ioc_base_low + .endif + strb r12, [r12, #0x38] @ Disable FIQ register + subs pc, lr, #4 +rpc_default_fiq_end: diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S index 4e7e54144093..7178368d7062 100644 --- a/arch/arm/mach-rpc/include/mach/entry-macro.S +++ b/arch/arm/mach-rpc/include/mach/entry-macro.S @@ -10,7 +10,3 @@ orr \base, \base, #ioc_base_low .endif .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h index 050d63c74cc1..257166b21f3d 100644 --- a/arch/arm/mach-rpc/include/mach/hardware.h +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -14,12 +14,6 @@ #include <mach/memory.h> -#ifndef __ASSEMBLY__ -#define IOMEM(x) ((void __iomem *)(unsigned long)(x)) -#else -#define IOMEM(x) x -#endif /* __ASSEMBLY__ */ - /* * What hardware must be present */ diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h index 695f4ed2e11b..707071a7ea4e 100644 --- a/arch/arm/mach-rpc/include/mach/io.h +++ b/arch/arm/mach-rpc/include/mach/io.h @@ -28,9 +28,4 @@ */ #define __io(a) (PCIO_BASE + ((a) << 2)) -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - #endif diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h deleted file mode 100644 index 359bab94b6af..000000000000 --- a/arch/arm/mach-rpc/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-rpc/include/mach/system.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 2e1b5309fbab..cf0e669eaf1a 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -5,6 +5,7 @@ #include <asm/mach/irq.h> #include <asm/hardware/iomd.h> #include <asm/irq.h> +#include <asm/fiq.h> static void iomd_ack_irq_a(struct irq_data *d) { @@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = { .irq_unmask = iomd_unmask_irq_fiq, }; +extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; + void __init rpc_init_irq(void) { unsigned int irq, flags; @@ -121,6 +124,9 @@ void __init rpc_init_irq(void) iomd_writeb(0, IOMD_FIQMASK); iomd_writeb(0, IOMD_DMAMASK); + set_fiq_handler(&rpc_default_fiq_start, + &rpc_default_fiq_end - &rpc_default_fiq_start); + for (irq = 0; irq < NR_IRQS; irq++) { flags = IRQF_VALID; diff --git a/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/arch/arm/mach-s3c2410/include/mach/entry-macro.S index 473b3cd37d9b..7615a14773fa 100644 --- a/arch/arm/mach-s3c2410/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/entry-macro.S @@ -25,9 +25,6 @@ .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \base, #S3C24XX_VA_IRQ @@ -71,8 +68,3 @@ @@ exit here, Z flag unset if IRQ .endm - - /* currently don't need an disable_fiq macro */ - - .macro disable_fiq - .endm diff --git a/arch/arm/mach-s3c2410/include/mach/io.h b/arch/arm/mach-s3c2410/include/mach/io.h index 118749f37c4c..5dd1db4e2677 100644 --- a/arch/arm/mach-s3c2410/include/mach/io.h +++ b/arch/arm/mach-s3c2410/include/mach/io.h @@ -208,9 +208,4 @@ DECLARE_IO(int,l,"") #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) #define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - #endif diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h deleted file mode 100644 index 5e215c1a5c8f..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ /dev/null @@ -1,54 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/system.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - System function defines and includes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/io.h> -#include <mach/hardware.h> - -#include <mach/map.h> -#include <mach/idle.h> - -#include <mach/regs-clock.h> - -void (*s3c24xx_idle)(void); - -void s3c24xx_default_idle(void) -{ - unsigned long tmp; - int i; - - /* idle the system by using the idle mode which will wait for an - * interrupt to happen before restarting the system. - */ - - /* Warning: going into idle state upsets jtag scanning */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); - - /* the samsung port seems to do a loop and then unset idle.. */ - for (i = 0; i < 50; i++) { - tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ - } - - /* this bit is not cleared on re-start... */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); -} - -static void arch_idle(void) -{ - if (s3c24xx_idle != NULL) - (s3c24xx_idle)(); - else - s3c24xx_default_idle(); -} diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index aff6e85a97c6..c6eac9871093 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -32,8 +32,6 @@ #include <asm/proc-fns.h> #include <asm/irq.h> -#include <mach/idle.h> - #include <plat/cpu-freq.h> #include <mach/regs-clock.h> @@ -164,7 +162,7 @@ void __init s3c2412_map_io(void) /* set our idle function */ - s3c24xx_idle = s3c2412_idle; + arm_pm_idle = s3c2412_idle; /* register our io-tables */ diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 5287d2808d3e..08bb0355159d 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -44,7 +44,6 @@ #include <asm/proc-fns.h> #include <asm/irq.h> -#include <mach/idle.h> #include <mach/regs-s3c2443-clock.h> #include <plat/gpio-core.h> @@ -88,8 +87,6 @@ int __init s3c2416_init(void) { printk(KERN_INFO "S3C2416: Initializing architecture\n"); - /* s3c24xx_idle = s3c2416_idle; */ - /* change WDT IRQ number */ s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S deleted file mode 100644 index dc2bc15142ce..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ /dev/null @@ -1,19 +0,0 @@ -/* arch/arm/mach-s3c6400/include/mach/entry-macro.S - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * Low-level IRQ helper macros for the Samsung S3C64XX series - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h deleted file mode 100644 index de5716dbbd65..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/io.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s3c64xxinclude/mach/io.h - * - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben-linux@fluff.org> - * - * Default IO routines for S3C64XX based - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h deleted file mode 100644 index 353ed4389ae7..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/system.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - system implementation - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -static void arch_idle(void) -{ - /* nothing here yet */ -} - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 52b89a376447..9143f8b19962 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c @@ -146,15 +146,12 @@ static void s5p64x0_idle(void) { unsigned long val; - if (!need_resched()) { - val = __raw_readl(S5P64X0_PWR_CFG); - val &= ~(0x3 << 5); - val |= (0x1 << 5); - __raw_writel(val, S5P64X0_PWR_CFG); + val = __raw_readl(S5P64X0_PWR_CFG); + val &= ~(0x3 << 5); + val |= (0x1 << 5); + __raw_writel(val, S5P64X0_PWR_CFG); - cpu_do_idle(); - } - local_irq_enable(); + cpu_do_idle(); } /* @@ -286,7 +283,7 @@ int __init s5p64x0_init(void) printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); /* set idle function */ - pm_idle = s5p64x0_idle; + arm_pm_idle = s5p64x0_idle; return device_register(&s5p64x0_dev); } diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index f820c0744405..f7f68ad77910 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c @@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = { .peri_id = s5p6450_pdma_peri, }; -struct amba_device s5p64x0_device_pdma = { - .dev = { - .init_name = "dma-pl330", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .res = { - .start = S5P64X0_PA_PDMA, - .end = S5P64X0_PA_PDMA + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DMA0, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA, + {IRQ_DMA0}, NULL); static int __init s5p64x0_dma_init(void) { if (soc_is_s5p6450()) { dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); - s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; + s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; } else { dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); - s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; + s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; } - amba_device_register(&s5p64x0_device_pdma, &iomem_resource); + amba_device_register(&s5p64x0_pdma_device, &iomem_resource); return 0; } diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S deleted file mode 100644 index fbb246d0a3df..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Low-level IRQ helper macros for the Samsung S5P64X0 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h deleted file mode 100644 index a3e095c02fb5..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/io.h +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/io.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben-linux@fluff.org> - * - * Default IO routines for S5P64X0 based - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h deleted file mode 100644 index cf26e0954a2f..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/system.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - system support header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -static void arch_idle(void) -{ - /* nothing here yet */ -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index c9095730a7f5..ff71e2d467c6 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c @@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = { } }; -static void s5pc100_idle(void) -{ - if (!need_resched()) - cpu_do_idle(); - - local_irq_enable(); -} - /* * s5pc100_map_io * @@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init); int __init s5pc100_init(void) { printk(KERN_INFO "S5PC100: Initializing architecture\n"); - - /* set idle function */ - pm_idle = s5pc100_idle; - return device_register(&s5pc100_dev); } diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index c841f4d313f2..96b1ab3dcd48 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c @@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = { .peri_id = pdma0_peri, }; -struct amba_device s5pc100_device_pdma0 = { - .dev = { - .init_name = "dma-pl330.0", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pc100_pdma0_pdata, - }, - .res = { - .start = S5PC100_PA_PDMA0, - .end = S5PC100_PA_PDMA0 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA0, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0, + {IRQ_PDMA0}, &s5pc100_pdma0_pdata); u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = { .peri_id = pdma1_peri, }; -struct amba_device s5pc100_device_pdma1 = { - .dev = { - .init_name = "dma-pl330.1", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pc100_pdma1_pdata, - }, - .res = { - .start = S5PC100_PA_PDMA1, - .end = S5PC100_PA_PDMA1 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA1, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1, + {IRQ_PDMA1}, &s5pc100_pdma1_pdata); static int __init s5pc100_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); - amba_device_register(&s5pc100_device_pdma0, &iomem_resource); + amba_device_register(&s5pc100_pdma0_device, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); - amba_device_register(&s5pc100_device_pdma1, &iomem_resource); + amba_device_register(&s5pc100_pdma1_device, &iomem_resource); return 0; } diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index b8c242edfa22..bad0700457db 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S @@ -12,14 +12,8 @@ * warranty of any kind, whether express or implied. */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp .endm diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h deleted file mode 100644 index 819acf5eaf89..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/io.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/io.h - * - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben-linux@fluff.org> - * - * Default IO routines for S5PC100 systems - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h deleted file mode 100644 index afc96c298518..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/system.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - system implementation - * - * Based on mach-s3c6400/include/mach/system.h - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -static void arch_idle(void) -{ - /* nothing here yet */ -} - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 9c1bcdcc12c3..4c9e9027df9a 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { } }; -static void s5pv210_idle(void) -{ - if (!need_resched()) - cpu_do_idle(); - - local_irq_enable(); -} - void s5pv210_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init); int __init s5pv210_init(void) { printk(KERN_INFO "S5PV210: Initializing architecture\n"); - - /* set idle function */ - pm_idle = s5pv210_idle; - return device_register(&s5pv210_dev); } diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index a6113e0267f2..f6885d247d14 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c @@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = { .peri_id = pdma0_peri, }; -struct amba_device s5pv210_device_pdma0 = { - .dev = { - .init_name = "dma-pl330.0", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pv210_pdma0_pdata, - }, - .res = { - .start = S5PV210_PA_PDMA0, - .end = S5PV210_PA_PDMA0 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA0, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0, + {IRQ_PDMA0}, &s5pv210_pdma0_pdata); u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = { .peri_id = pdma1_peri, }; -struct amba_device s5pv210_device_pdma1 = { - .dev = { - .init_name = "dma-pl330.1", - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pv210_pdma1_pdata, - }, - .res = { - .start = S5PV210_PA_PDMA1, - .end = S5PV210_PA_PDMA1 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_PDMA1, NO_IRQ}, - .periphid = 0x00041330, -}; +AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1, + {IRQ_PDMA1}, &s5pv210_pdma1_pdata); static int __init s5pv210_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); - amba_device_register(&s5pv210_device_pdma0, &iomem_resource); + amba_device_register(&s5pv210_pdma0_device, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); - amba_device_register(&s5pv210_device_pdma1, &iomem_resource); + amba_device_register(&s5pv210_pdma1_device, &iomem_resource); return 0; } diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S deleted file mode 100644 index bebca1b5d0b1..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Low-level IRQ helper macros for the Samsung S5PV210 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h deleted file mode 100644 index 5ab9d560bc86..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/io.h - * - * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s5p6442/include/mach/io.h - * - * Default IO routines for S5PV210 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H __FILE__ - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h deleted file mode 100644 index bf288ced860a..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/system.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - system support header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -static void arch_idle(void) -{ - /* nothing here yet */ -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S index 6aa13c46c5d3..8cf7630bf024 100644 --- a/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ b/arch/arm/mach-sa1100/include/mach/entry-macro.S @@ -8,17 +8,11 @@ * warranty of any kind, whether express or implied. */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mov \base, #0xfa000000 @ ICIP = 0xfa050000 add \base, \base, #0x00050000 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base] @ get irqs ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h deleted file mode 100644 index dfc27ff08344..000000000000 --- a/arch/arm/mach-sa1100/include/mach/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/io.h - * - * Copyright (C) 1997-1999 Russell King - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* - * __io() is required to be an equivalent mapping to __mem_pci() for - * SOC_COMMON to work. - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h deleted file mode 100644 index e17b208f76d4..000000000000 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/system.h - * - * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a851c254ad6c..6a2a7f2c2557 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -149,10 +149,16 @@ static struct sys_timer shark_timer = { .init = shark_timer_init, }; +static void shark_init_early(void) +{ + disable_hlt(); +} + MACHINE_START(SHARK, "Shark") /* Maintainer: Alexander Schulz */ .atag_offset = 0x3000, .map_io = shark_map_io, + .init_early = shark_init_early, .init_irq = shark_init_irq, .timer = &shark_timer, .dma_zone_size = SZ_4M, diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S index 0bb6cc626eb7..5901b09fc96a 100644 --- a/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/arch/arm/mach-shark/include/mach/entry-macro.S @@ -7,16 +7,10 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp mov \base, #0xe0000000 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \irqstat, #0x0C diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h index 9ccbcecc430b..1a45fc01ff1d 100644 --- a/arch/arm/mach-shark/include/mach/io.h +++ b/arch/arm/mach-shark/include/mach/io.h @@ -15,6 +15,4 @@ #define __io(a) ((void __iomem *)(0xe0000000 + (a))) -#define __mem_pci(addr) (addr) - #endif diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h deleted file mode 100644 index 1b2f2c5050a8..000000000000 --- a/arch/arm/mach-shark/include/mach/system.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-shark/include/mach/system.h - * - * by Alexander Schulz - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ -} - -#endif diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index eff8a96c75ee..5346529e8bcc 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c @@ -615,7 +615,7 @@ static void __init ag5evm_init(void) #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*8way */ - l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff); + l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); #endif sh73a0_add_standard_devices(); platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices)); diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index 4d2201622323..91d4c221c9c4 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c @@ -394,7 +394,7 @@ static void __init bonito_init(void) #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ - l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff); + l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); #endif r8a7740_add_standard_devices(); diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index 857ceeec1bb0..4cf6100989db 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c @@ -530,7 +530,7 @@ static void __init kota2_init(void) #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ - l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff); + l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); #endif sh73a0_add_standard_devices(); platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices)); diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S deleted file mode 100644 index 2a57b2964ee9..000000000000 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2010 Paul Mundt - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h deleted file mode 100644 index 7339fe46cb7c..000000000000 --- a/arch/arm/mach-shmobile/include/mach/io.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_MACH_IO_H -#define __ASM_MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif /* __ASM_MACH_IO_H */ diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h index 956ac18ddbf9..3bbcb3fa0775 100644 --- a/arch/arm/mach-shmobile/include/mach/system.h +++ b/arch/arm/mach-shmobile/include/mach/system.h @@ -1,11 +1,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - static inline void arch_reset(char mode, const char *cmd) { soft_restart(0); diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c index 5d92fcde2bc3..550b23df4fd4 100644 --- a/arch/arm/mach-shmobile/intc-r8a7779.c +++ b/arch/arm/mach-shmobile/intc-r8a7779.c @@ -42,8 +42,8 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on) void __init r8a7779_init_irq(void) { - void __iomem *gic_dist_base = __io(0xf0001000); - void __iomem *gic_cpu_base = __io(0xf0000100); + void __iomem *gic_dist_base = IOMEM(0xf0001000); + void __iomem *gic_cpu_base = IOMEM(0xf0000100); /* use GIC to handle interrupts */ gic_init(0, 29, gic_dist_base, gic_cpu_base); diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 1eda6b0b69e3..dbb4357ea183 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c @@ -419,8 +419,8 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) void __init sh73a0_init_irq(void) { - void __iomem *gic_dist_base = __io(0xf0001000); - void __iomem *gic_cpu_base = __io(0xf0000100); + void __iomem *gic_dist_base = IOMEM(0xf0001000); + void __iomem *gic_cpu_base = IOMEM(0xf0000100); void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); int k, n; diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 6fcf304d3cdf..a83cf51fc099 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -662,6 +662,7 @@ static struct sh_dmae_pdata usb_dma0_platform_data = { .dmaor_is_32bit = 1, .needs_tend_set = 1, .no_dmars = 1, + .slave_only = 1, }; static struct resource sh7372_usb_dmae0_resources[] = { @@ -723,6 +724,7 @@ static struct sh_dmae_pdata usb_dma1_platform_data = { .dmaor_is_32bit = 1, .needs_tend_set = 1, .no_dmars = 1, + .slave_only = 1, }; static struct resource sh7372_usb_dmae1_resources[] = { diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 4fe2e9eaf501..6d5e57d350b7 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -30,7 +30,7 @@ #include <asm/smp_twd.h> #include <asm/hardware/gic.h> -#define AVECR 0xfe700040 +#define AVECR IOMEM(0xfe700040) static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ @@ -140,7 +140,7 @@ void __init r8a7779_smp_prepare_cpus(void) scu_enable(scu_base_addr()); /* Map the reset vector (in headsmp.S) */ - __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR)); + __raw_writel(__pa(shmobile_secondary_vector), AVECR); /* enable cache coherency on CPU0 */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 0d159d64a345..667d53dd7012 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -28,11 +28,11 @@ #include <asm/smp_twd.h> #include <asm/hardware/gic.h> -#define WUPCR 0xe6151010 -#define SRESCR 0xe6151018 -#define PSTR 0xe6151040 -#define SBAR 0xe6180020 -#define APARMBAREA 0xe6f10020 +#define WUPCR IOMEM(0xe6151010) +#define SRESCR IOMEM(0xe6151018) +#define PSTR IOMEM(0xe6151040) +#define SBAR IOMEM(0xe6180020) +#define APARMBAREA IOMEM(0xe6f10020) static void __iomem *scu_base_addr(void) { @@ -80,10 +80,10 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu) /* enable cache coherency */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); - if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3) - __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ + if (((__raw_readw(PSTR) >> (4 * cpu)) & 3) == 3) + __raw_writel(1 << cpu, WUPCR); /* wake up */ else - __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ + __raw_writel(1 << cpu, SRESCR); /* reset */ return 0; } @@ -95,8 +95,8 @@ void __init sh73a0_smp_prepare_cpus(void) scu_enable(scu_base_addr()); /* Map the reset vector (in headsmp.S) */ - __raw_writel(0, __io(APARMBAREA)); /* 4k */ - __raw_writel(__pa(shmobile_secondary_vector), __io(SBAR)); + __raw_writel(0, APARMBAREA); /* 4k */ + __raw_writel(__pa(shmobile_secondary_vector), SBAR); /* enable cache coherency on CPU0 */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index f67860cd649f..6c4841f55223 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -12,6 +12,7 @@ */ #include <linux/init.h> +#include <linux/io.h> #include <linux/kernel.h> #include <asm/mach-types.h> #include <plat/clock.h> diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S deleted file mode 100644 index de3bb41c8e9e..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ /dev/null @@ -1,18 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h deleted file mode 100644 index 30cff8a1f6b5..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/io.h - * - * IO definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#include <plat/io.h> - -#endif /* __MACH_IO_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h deleted file mode 100644 index 92cee6335c90..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/system.h - * - * SPEAr3xx Machine family specific architecture functions - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SYSTEM_H -#define __MACH_SYSTEM_H - -#include <plat/system.h> - -#endif /* __MACH_SYSTEM_H */ diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index a5e46b4ade20..9da50e281e98 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = { .irq_base = SPEAR300_GPIO1_INT_BASE, }; -struct amba_device spear300_gpio1_device = { - .dev = { - .init_name = "gpio1", - .platform_data = &gpio1_plat_data, - }, - .res = { - .start = SPEAR300_GPIO_BASE, - .end = SPEAR300_GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, -}; +AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, + {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); /* spear300 routines */ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 10af45da86a0..b1733c37f209 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = { .irq_base = SPEAR3XX_GPIO_INT_BASE, }; -struct amba_device spear3xx_gpio_device = { - .dev = { - .init_name = "gpio", - .platform_data = &gpio_plat_data, - }, - .res = { - .start = SPEAR3XX_ICM3_GPIO_BASE, - .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, -}; +AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, + {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); /* uart device registration */ -struct amba_device spear3xx_uart_device = { - .dev = { - .init_name = "uart", - }, - .res = { - .start = SPEAR3XX_ICM1_UART_BASE, - .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, -}; +AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, + {SPEAR3XX_IRQ_UART}, NULL); /* Do spear3xx familiy common initialization part here */ void __init spear3xx_init(void) diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index ac70e0d88fef..9281cf88a14a 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c @@ -12,6 +12,7 @@ */ #include <linux/init.h> +#include <linux/io.h> #include <linux/kernel.h> #include <plat/clock.h> #include <mach/misc_regs.h> diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S deleted file mode 100644 index d490a910d925..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ /dev/null @@ -1,18 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar<rajeev-dlh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-spear6xx/include/mach/io.h b/arch/arm/mach-spear6xx/include/mach/io.h deleted file mode 100644 index fb7c106cea94..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/io.h - * - * IO definitions for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#include <plat/io.h> - -#endif /* __MACH_IO_H */ - diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h deleted file mode 100644 index 0b1d2be81cfb..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/system.h - * - * SPEAr6xx Machine family specific architecture functions - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar<rajeev-dlh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SYSTEM_H -#define __MACH_SYSTEM_H - -#include <plat/system.h> - -#endif /* __MACH_SYSTEM_H */ diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index e0f6628c8b2c..b997b1b10ba0 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c @@ -34,7 +34,7 @@ struct amba_device uart_device[] = { .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_UART_0, NO_IRQ}, + .irq = {IRQ_UART_0}, }, { .dev = { .init_name = "uart1", @@ -44,7 +44,7 @@ struct amba_device uart_device[] = { .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_UART_1, NO_IRQ}, + .irq = {IRQ_UART_1}, } }; @@ -73,7 +73,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, + .irq = {IRQ_LOCAL_GPIO}, }, { .dev = { .init_name = "gpio1", @@ -84,7 +84,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_BASIC_GPIO, NO_IRQ}, + .irq = {IRQ_BASIC_GPIO}, }, { .dev = { .init_name = "gpio2", @@ -95,7 +95,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_APPL_GPIO, NO_IRQ}, + .irq = {IRQ_APPL_GPIO}, } }; diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d76b90..6ae78821fd8e 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -8,8 +8,16 @@ config ARCH_TEGRA_2x_SOC select ARM_GIC select ARCH_REQUIRE_GPIOLIB select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB_SUPPORT + select USB_ULPI if USB select USB_ULPI_VIEWPORT if USB_SUPPORT + select ARM_ERRATA_720789 + select ARM_ERRATA_742230 + select ARM_ERRATA_751472 + select ARM_ERRATA_754327 + select ARM_ERRATA_764369 + select PL310_ERRATA_727915 if CACHE_L2X0 + select PL310_ERRATA_769419 if CACHE_L2X0 + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -20,9 +28,15 @@ config ARCH_TEGRA_3x_SOC select ARM_GIC select ARCH_REQUIRE_GPIOLIB select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB_SUPPORT + select USB_ULPI if USB select USB_ULPI_VIEWPORT if USB_SUPPORT select USE_OF + select ARM_ERRATA_743622 + select ARM_ERRATA_751472 + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 + select PL310_ERRATA_769419 if CACHE_L2X0 + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra T30 processor family, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index fc4ebe35f484..7517efbcf927 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -16,7 +16,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o -obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 465808c8ac0b..1af85bccc0f1 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c @@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, - {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, @@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index fcf4f377b1dc..330afdfa2475 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .uartclk = 216000000, }, { /* serial port on mini-pcie */ - .membase = IO_ADDRESS(TEGRA_UARTD_BASE), - .mapbase = TEGRA_UARTD_BASE, - .irq = INT_UARTD, + .membase = IO_ADDRESS(TEGRA_UARTC_BASE), + .mapbase = TEGRA_UARTC_BASE, + .irq = INT_UARTC, .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, .type = PORT_TEGRA, .iotype = UPIO_MEM, @@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 216000000, true }, - { "uartd", "pll_p", 216000000, true }, + { "uartc", "pll_p", 216000000, true }, { "pll_p_out4", "pll_p", 24000000, true }, { "usbd", "clk_m", 12000000, false }, diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h index ffa83f580db6..3c9f8da37ea3 100644 --- a/arch/arm/mach-tegra/board-paz00.h +++ b/arch/arm/mach-tegra/board-paz00.h @@ -22,7 +22,7 @@ /* SDCARD */ #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 -#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 +#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PV1 /* ULPI */ #define TEGRA_ULPI_RST TEGRA_GPIO_PV0 diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 029558114236..6c93cd0e520c 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -27,7 +27,6 @@ #include <asm/hardware/gic.h> #include <mach/iomap.h> -#include <mach/system.h> #include "board.h" #include "clock.h" diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index 619abc63aee8..e28ce1675146 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S @@ -18,7 +18,6 @@ * */ -#include <mach/io.h> #include <mach/iomap.h> .macro addruart, rp, rv, tmp diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S deleted file mode 100644 index e577cfe27e72..000000000000 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-tegra/include/mach/entry-macro.S - * - * Copyright (C) 2009 Palm, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index f15defffb5d2..fe700f9ce7dc 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h @@ -23,56 +23,8 @@ #define IO_SPACE_LIMIT 0xffff -/* On TEGRA, many peripherals are very closely packed in - * two 256MB io windows (that actually only use about 64KB - * at the start of each). - * - * We will just map the first 1MB of each window (to minimize - * pt entries needed) and provide a macro to transform physical - * io addresses to an appropriate void __iomem *. - * - */ - -#ifdef __ASSEMBLY__ -#define IOMEM(x) (x) -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - -#define IO_IRAM_PHYS 0x40000000 -#define IO_IRAM_VIRT IOMEM(0xFE400000) -#define IO_IRAM_SIZE SZ_256K - -#define IO_CPU_PHYS 0x50040000 -#define IO_CPU_VIRT IOMEM(0xFE000000) -#define IO_CPU_SIZE SZ_16K - -#define IO_PPSB_PHYS 0x60000000 -#define IO_PPSB_VIRT IOMEM(0xFE200000) -#define IO_PPSB_SIZE SZ_1M - -#define IO_APB_PHYS 0x70000000 -#define IO_APB_VIRT IOMEM(0xFE300000) -#define IO_APB_SIZE SZ_1M - -#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) -#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst))) - -#define IO_TO_VIRT(n) ( \ - IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ - IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ - IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ - NULL) - #ifndef __ASSEMBLER__ -#define IO_ADDRESS(n) (IO_TO_VIRT(n)) - #ifdef CONFIG_TEGRA_PCI extern void __iomem *tegra_pcie_io_base; @@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr) #endif #define __io(a) __io(a) -#define __mem_pci(a) (a) #endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 67644c905d8e..2fd947259132 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -274,4 +274,46 @@ # define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE #endif +/* On TEGRA, many peripherals are very closely packed in + * two 256MB io windows (that actually only use about 64KB + * at the start of each). + * + * We will just map the first 1MB of each window (to minimize + * pt entries needed) and provide a macro to transform physical + * io addresses to an appropriate void __iomem *. + * + */ + +#define IO_IRAM_PHYS 0x40000000 +#define IO_IRAM_VIRT IOMEM(0xFE400000) +#define IO_IRAM_SIZE SZ_256K + +#define IO_CPU_PHYS 0x50040000 +#define IO_CPU_VIRT IOMEM(0xFE000000) +#define IO_CPU_SIZE SZ_16K + +#define IO_PPSB_PHYS 0x60000000 +#define IO_PPSB_VIRT IOMEM(0xFE200000) +#define IO_PPSB_SIZE SZ_1M + +#define IO_APB_PHYS 0x70000000 +#define IO_APB_VIRT IOMEM(0xFE300000) +#define IO_APB_SIZE SZ_1M + +#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) +#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst))) + +#define IO_TO_VIRT(n) ( \ + IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \ + IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \ + IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \ + IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \ + IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \ + IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ + IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ + IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ + NULL) + +#define IO_ADDRESS(n) (IO_TO_VIRT(n)) + #endif diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h deleted file mode 100644 index a312988bf6f8..000000000000 --- a/arch/arm/mach-tegra/include/mach/system.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/system.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_SYSTEM_H -#define __MACH_TEGRA_SYSTEM_H - -static inline void arch_idle(void) -{ -} - -#endif diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c index d23ee2db2827..58b4baf9c483 100644 --- a/arch/arm/mach-tegra/io.c +++ b/arch/arm/mach-tegra/io.c @@ -26,6 +26,7 @@ #include <asm/page.h> #include <asm/mach/map.h> +#include <mach/iomap.h> #include "board.h" diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index af8b63435727..91536996c3f0 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void) afi_writel(0, AFI_MSI_BAR_SZ); } -static void tegra_pcie_enable_controller(void) +static int tegra_pcie_enable_controller(void) { u32 val, reg; - int i; + int i, timeout; /* Enable slot clock and pulse the reset signals */ for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { @@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void) pads_writel(0xfa5cfa5c, 0xc8); /* Wait for the PLL to lock */ + timeout = 300; do { val = pads_readl(PADS_PLL_CTL); + usleep_range(1000, 1000); + if (--timeout == 0) { + pr_err("Tegra PCIe error: timeout waiting for PLL\n"); + return -EBUSY; + } } while (!(val & PADS_PLL_CTL_LOCKDET)); /* turn off IDDQ override */ @@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void) /* Disable all execptions */ afi_writel(0, AFI_FPCI_ERROR_MASKS); - return; + return 0; } static void tegra_pcie_xclk_clamp(bool clamp) @@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1) if (err) return err; - tegra_pcie_enable_controller(); + err = tegra_pcie_enable_controller(); + if (err) + return err; /* setup the AFI address translations */ tegra_pcie_setup_translations(); diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 37576a721aeb..6091cf3d8e8b 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -22,6 +22,7 @@ #include <linux/delay.h> #include <linux/slab.h> #include <linux/err.h> +#include <linux/export.h> #include <linux/platform_device.h> #include <linux/io.h> #include <linux/gpio.h> @@ -730,6 +731,7 @@ err0: kfree(phy); return ERR_PTR(err); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_open); int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) { @@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) else return utmi_phy_power_on(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on); void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) { @@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) else utmi_phy_power_off(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off); void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_preresume(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume); void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_postresume(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume); void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, enum tegra_usb_phy_port_speed port_speed) @@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, if (!phy_is_ulpi(phy)) utmi_phy_restore_start(phy, port_speed); } +EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start); void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_restore_end(phy); } +EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end); void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_clk_disable(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable); void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_clk_enable(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable); void tegra_usb_phy_close(struct tegra_usb_phy *phy) { @@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) clk_put(phy->pll_u); kfree(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_close); diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index b4c6926a700c..b9865605da09 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = { #endif }; -static struct amba_device uart0_device = { - .dev = { - .coherent_dma_mask = ~0, - .init_name = "uart0", /* Slow device at 0x3000 offset */ - .platform_data = &uart0_plat_data, - }, - .res = { - .start = U300_UART0_BASE, - .end = U300_UART0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_U300_UART0, NO_IRQ }, -}; +/* Slow device at 0x3000 offset */ +static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, + { IRQ_U300_UART0 }, &uart0_plat_data); /* The U335 have an additional UART1 on the APP CPU */ #ifdef CONFIG_MACH_U300_BS335 @@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = { #endif }; -static struct amba_device uart1_device = { - .dev = { - .coherent_dma_mask = ~0, - .init_name = "uart1", /* Fast device at 0x7000 offset */ - .platform_data = &uart1_plat_data, - }, - .res = { - .start = U300_UART1_BASE, - .end = U300_UART1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = { IRQ_U300_UART1, NO_IRQ }, -}; +/* Fast device at 0x7000 offset */ +static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, + { IRQ_U300_UART1 }, &uart1_plat_data); #endif -static struct amba_device pl172_device = { - .dev = { - .init_name = "pl172", /* AHB device at 0x4000 offset */ - .platform_data = NULL, - }, - .res = { - .start = U300_EMIF_CFG_BASE, - .end = U300_EMIF_CFG_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; +/* AHB device at 0x4000 offset */ +static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); /* * Everything within this next ifdef deals with external devices connected to * the APP SPI bus. */ -static struct amba_device pl022_device = { - .dev = { - .coherent_dma_mask = ~0, - .init_name = "pl022", /* Fast device at 0x6000 offset */ - }, - .res = { - .start = U300_SPI_BASE, - .end = U300_SPI_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_U300_SPI, NO_IRQ }, - /* - * This device has a DMA channel but the Linux driver does not use - * it currently. - */ -}; +/* Fast device at 0x6000 offset */ +static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE, + { IRQ_U300_SPI }, NULL); -static struct amba_device mmcsd_device = { - .dev = { - .init_name = "mmci", /* Fast device at 0x1000 offset */ - .platform_data = NULL, /* Added later */ - }, - .res = { - .start = U300_MMCSD_BASE, - .end = U300_MMCSD_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, - /* - * This device has a DMA channel but the Linux driver does not use - * it currently. - */ -}; +/* Fast device at 0x1000 offset */ +#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 } + +static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, + U300_MMCSD_IRQS, NULL); /* * The order of device declaration may be important, since some devices diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S deleted file mode 100644 index 7181d6ac6651..000000000000 --- a/arch/arm/mach-u300/include/mach/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * - * arch-arm/mach-u300/include/mach/entry-macro.S - * - * - * Copyright (C) 2006-2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * Low-level IRQ helper macros for ST-Ericsson U300 - * Author: Linus Walleij <linus.walleij@stericsson.com> - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-u300/include/mach/io.h b/arch/arm/mach-u300/include/mach/io.h deleted file mode 100644 index 5d6b4c13b3a0..000000000000 --- a/arch/arm/mach-u300/include/mach/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * - * arch/arm/mach-u300/include/mach/io.h - * - * - * Copyright (C) 2006-2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * Dummy IO map for being able to use writew()/readw(), - * writel()/readw() and similar accessor functions. - * Author: Linus Walleij <linus.walleij@stericsson.com> - */ -#ifndef __MACH_IO_H -#define __MACH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h deleted file mode 100644 index 574d46e38290..000000000000 --- a/arch/arm/mach-u300/include/mach/system.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * - * arch/arm/mach-u300/include/mach/system.h - * - * - * Copyright (C) 2007-2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * System shutdown and reset functions. - * Author: Linus Walleij <linus.walleij@stericsson.com> - */ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h index 035fdc9dbdb0..7b7cba960b69 100644 --- a/arch/arm/mach-u300/include/mach/u300-regs.h +++ b/arch/arm/mach-u300/include/mach/u300-regs.h @@ -18,12 +18,6 @@ * the defines are used for setting up the I/O memory mapping. */ -#ifdef __ASSEMBLER__ -#define IOMEM(a) (a) -#else -#define IOMEM(a) (void __iomem *) a -#endif - /* NAND Flash CS0 */ #define U300_NAND_CS0_PHYS_BASE 0x80000000 diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index c563e5418d80..898a64517b09 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c @@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base, struct amba_device *dev; int ret; - dev = kzalloc(sizeof *dev, GFP_KERNEL); + dev = amba_device_alloc(name, base, SZ_4K); if (!dev) return ERR_PTR(-ENOMEM); - dev->dev.init_name = name; - - dev->res.start = base; - dev->res.end = base + SZ_4K - 1; - dev->res.flags = IORESOURCE_MEM; - dev->dma_mask = DMA_BIT_MASK(32); dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); dev->irq[0] = irq; - dev->irq[1] = NO_IRQ; dev->periphid = periphid; dev->dev.platform_data = pdata; - ret = amba_device_register(dev, &iomem_resource); + ret = amba_device_add(dev, &iomem_resource); if (ret) { - kfree(dev); + amba_device_put(dev); return ERR_PTR(ret); } diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S deleted file mode 100644 index e16299e1020a..000000000000 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Low-level IRQ helper macros for U8500 platforms - * - * Copyright (C) 2009 ST-Ericsson. - * - * This file is a copy of ARM Realview platform. - * -just satisfied checkpatch script. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index b6ba26a1367d..aac7689745e3 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h @@ -23,7 +23,7 @@ (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) /* typesafe io address */ -#define __io_address(n) __io(IO_ADDRESS(n)) +#define __io_address(n) IOMEM(IO_ADDRESS(n)) /* Used by some plat-nomadik code */ #define io_p2v(n) __io_address(n) diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h deleted file mode 100644 index 1cf3f44ce5b2..000000000000 --- a/arch/arm/mach-ux500/include/mach/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-u8500/include/mach/io.h - * - * Copyright (C) 1997-1999 Russell King - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h deleted file mode 100644 index 258e5c919c24..000000000000 --- a/arch/arm/mach-ux500/include/mach/system.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..4f352e45be0a 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { .num_chipselect = 1, }; -#define AACI_IRQ { IRQ_AACI, NO_IRQ } +#define AACI_IRQ { IRQ_AACI } #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } -#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } -#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } +#define KMI0_IRQ { IRQ_SIC_KMI0 } +#define KMI1_IRQ { IRQ_SIC_KMI1 } /* * These devices are connected directly to the multi-layer AHB switch */ -#define SMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } -#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } +#define SMC_IRQ { } +#define MPMC_IRQ { } +#define CLCD_IRQ { IRQ_CLCDINT } +#define DMAC_IRQ { IRQ_DMAINT } /* * These devices are connected via the core APB bridge */ -#define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } -#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } -#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } -#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } +#define SCTL_IRQ { } +#define WATCHDOG_IRQ { IRQ_WDOGINT } +#define GPIO0_IRQ { IRQ_GPIOINT0 } +#define GPIO1_IRQ { IRQ_GPIOINT1 } +#define RTC_IRQ { IRQ_RTCINT } /* * These devices are connected via the DMA APB bridge */ -#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } -#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } -#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } -#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } -#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } +#define SCI_IRQ { IRQ_SCIINT } +#define UART0_IRQ { IRQ_UARTINT0 } +#define UART1_IRQ { IRQ_UARTINT1 } +#define UART2_IRQ { IRQ_UARTINT2 } +#define SSP_IRQ { IRQ_SSPINT } /* FPGA Primecells */ -AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); -AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); -AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); -AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); +APB_DEVICE(aaci, "fpga:04", AACI, NULL); +APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); +APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); +APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); /* DevChip Primecells */ -AMBA_DEVICE(smc, "dev:00", SMC, NULL); -AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); -AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); -AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); -AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); -AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); -AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); -AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); -AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); -AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); -AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); -AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); -AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); -AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); +AHB_DEVICE(smc, "dev:00", SMC, NULL); +AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); +AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); +AHB_DEVICE(dmac, "dev:30", DMAC, NULL); +APB_DEVICE(sctl, "dev:e0", SCTL, NULL); +APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); +APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); +APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); +APB_DEVICE(rtc, "dev:e8", RTC, NULL); +APB_DEVICE(sci0, "dev:f0", SCI, NULL); +APB_DEVICE(uart0, "dev:f1", UART0, NULL); +APB_DEVICE(uart1, "dev:f2", UART1, NULL); +APB_DEVICE(uart2, "dev:f3", UART2, NULL); +APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 2ef2f555f315..683e60776a85 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h @@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev); extern struct of_dev_auxdata versatile_auxdata_lookup[]; #endif -#define AMBA_DEVICE(name,busid,base,plat) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = VERSATILE_##base##_BASE, \ - .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ - .flags = IORESOURCE_MEM, \ - }, \ - .dma_mask = ~0, \ - .irq = base##_IRQ, \ -} +#define APB_DEVICE(name, busid, base, plat) \ +static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) + +#define AHB_DEVICE(name, busid, base, plat) \ +static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) #endif diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S deleted file mode 100644 index b6f0dbf122ee..000000000000 --- a/arch/arm/mach-versatile/include/mach/entry-macro.S +++ /dev/null @@ -1,15 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Versatile platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h deleted file mode 100644 index f067c14c7182..000000000000 --- a/arch/arm/mach-versatile/include/mach/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h deleted file mode 100644 index f3fa347895f0..000000000000 --- a/arch/arm/mach-versatile/include/mach/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..19738331bd3d 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { .irq_base = IRQ_GPIO3_START, }; -#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } -#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } +#define UART3_IRQ { IRQ_SIC_UART3 } +#define SCI1_IRQ { IRQ_SIC_SCI3 } #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } /* * These devices are connected via the core APB bridge */ -#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } -#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } +#define GPIO2_IRQ { IRQ_GPIOINT2 } +#define GPIO3_IRQ { IRQ_GPIOINT3 } /* * These devices are connected via the DMA APB bridge */ /* FPGA Primecells */ -AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); -AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); -AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); +APB_DEVICE(uart3, "fpga:09", UART3, NULL); +APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); +APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); /* DevChip Primecells */ -AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); -AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); +APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); +APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart3_device, diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index f4397159c173..9f0f2827c711 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h @@ -1,19 +1,2 @@ #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) - -#define AMBA_DEVICE(name,busid,base,plat) \ -struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0UL, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = base, \ - .end = base + SZ_4K - 1, \ - .flags = IORESOURCE_MEM, \ - }, \ - .dma_mask = ~0UL, \ - .irq = IRQ_##base, \ - /* .dma = DMA_##base,*/ \ -} diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index b1e87c184e54..1b1d2e4892b9 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = { .remove = versatile_clcd_remove_dma, }; -static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); -static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); -static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); -static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); +static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); +static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL); +static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL); +static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL); static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { &clcd_device, diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index a34d3d4faae1..a40468f3b938 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h @@ -35,7 +35,7 @@ * Interrupts. Those in {} are for AMBA devices */ #define IRQ_CT_CA9X4_CLCDC { 76 } -#define IRQ_CT_CA9X4_DMC { -1 } +#define IRQ_CT_CA9X4_DMC { 0 } #define IRQ_CT_CA9X4_SMC { 77, 78 } #define IRQ_CT_CA9X4_TIMER0 80 #define IRQ_CT_CA9X4_TIMER1 81 diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ /dev/null @@ -1,5 +0,0 @@ - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h deleted file mode 100644 index 13522d86685e..000000000000 --- a/arch/arm/mach-vexpress/include/mach/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-vexpress/include/mach/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h deleted file mode 100644 index f653a8e265bd..000000000000 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-vexpress/include/mach/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index b4a28ca0e50a..ad64f97a2003 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = { .status = v2m_mmci_status, }; -static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); -static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); -static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); -static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); -static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); -static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); -static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); -static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); -static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); -static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); +static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); +static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); +static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); +static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); +static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); +static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); +static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); +static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); +static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); +static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); static struct amba_device *v2m_amba_devs[] __initdata = { &aaci_device, diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S index 92684c7eaed3..367d1b55fb9a 100644 --- a/arch/arm/mach-vt8500/include/mach/entry-macro.S +++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S @@ -8,18 +8,12 @@ * warranty of any kind, whether express or implied. */ - .macro disable_fiq - .endm - .macro get_irqnr_preamble, base, tmp @ physical 0xd8140000 is virtual 0xf8140000 mov \base, #0xf8000000 orr \base, \base, #0x00140000 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base] cmp \irqnr, #63 @ may be false positive, check interrupt status diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h deleted file mode 100644 index 46181eecf273..000000000000 --- a/arch/arm/mach-vt8500/include/mach/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-vt8500/include/mach/io.h - * - * Copyright (C) 2010 Alexey Charkov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define __io(a) __typesafe_io((a) + 0xf0000000) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h index d6c757eaf26b..58fa8010ee61 100644 --- a/arch/arm/mach-vt8500/include/mach/system.h +++ b/arch/arm/mach-vt8500/include/mach/system.h @@ -7,11 +7,6 @@ /* PM Software Reset request register */ #define VT8500_PMSR_VIRT 0xf8130060 -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - static inline void arch_reset(char mode, const char *cmd) { writel(1, VT8500_PMSR_VIRT); diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 78110befb7a9..db82568a998a 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c @@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { void __init nuc900_board_init(struct platform_device **device, int size) { + disable_hlt(); platform_add_devices(device, size); platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); spi_register_board_info(nuc900_spi_board_info, diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S index d39aca5be9ee..e286daca6827 100644 --- a/arch/arm/mach-w90x900/include/mach/entry-macro.S +++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S @@ -15,9 +15,6 @@ .macro get_irqnr_preamble, base, tmp .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \base, #AIC_BA @@ -27,8 +24,3 @@ cmp \irqnr, #0 .endm - - /* currently don't need an disable_fiq macro */ - - .macro disable_fiq - .endm diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h deleted file mode 100644 index d96ab99df05b..000000000000 --- a/arch/arm/mach-w90x900/include/mach/io.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * arch/arm/mach-w90x900/include/mach/io.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun <mcuos.com@gmail.com> - * - * Based on arch/arm/mach-s3c2410/include/mach/io.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * 1:1 mapping for ioremapped regions. - */ - -#define __mem_pci(a) (a) -#define __io(a) __typesafe_io(a) - -#endif diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h deleted file mode 100644 index 2aaeb9311619..000000000000 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-w90x900/include/mach/system.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun <mcuos.com@gmail.com> - * - * Based on arch/arm/mach-s3c2410/include/mach/system.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ -static void arch_idle(void) -{ -} diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S deleted file mode 100644 index d621fb732569..000000000000 --- a/arch/arm/mach-zynq/include/mach/entry-macro.S +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-zynq/include/mach/entry-macro.S - * - * Low-level IRQ helper macros - * - * Copyright (C) 2011 Xilinx - * - * based on arch/plat-mxc/include/mach/entry-macro.S - * - * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-zynq/include/mach/io.h b/arch/arm/mach-zynq/include/mach/io.h deleted file mode 100644 index 39d9885e0e9a..000000000000 --- a/arch/arm/mach-zynq/include/mach/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/io.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_IO_H__ -#define __MACH_IO_H__ - -/* Allow IO space to be anywhere in the memory */ - -#define IO_SPACE_LIMIT 0xffff - -/* IO address mapping macros, nothing special at this time but required */ - -#ifdef __ASSEMBLER__ -#define IOMEM(x) (x) -#else -#define IOMEM(x) ((void __force __iomem *)(x)) -#endif - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h deleted file mode 100644 index 8e88e0b8d2ba..000000000000 --- a/arch/arm/mach-zynq/include/mach/system.h +++ /dev/null @@ -1,23 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/system.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_SYSTEM_H__ -#define __MACH_SYSTEM_H__ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index ba159370fa5f..024629046f1f 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -225,8 +225,7 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype)) continue; if (__phys_to_pfn(area->phys_addr) > pfn || - __pfn_to_phys(pfn) + offset + size-1 > - area->phys_addr + area->size-1) + __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1) continue; /* we can drop the lock here as we know *area is static */ read_unlock(&vmlist_lock); @@ -307,11 +306,15 @@ __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, } EXPORT_SYMBOL(__arm_ioremap_pfn); +void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, + unsigned int, void *) = + __arm_ioremap_caller; + void __iomem * __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) { - return __arm_ioremap_caller(phys_addr, size, mtype, - __builtin_return_address(0)); + return arch_ioremap_caller(phys_addr, size, mtype, + __builtin_return_address(0)); } EXPORT_SYMBOL(__arm_ioremap); @@ -370,4 +373,11 @@ void __iounmap(volatile void __iomem *io_addr) vunmap(addr); } -EXPORT_SYMBOL(__iounmap); + +void (*arch_iounmap)(volatile void __iomem *) = __iounmap; + +void __arm_iounmap(volatile void __iomem *io_addr) +{ + arch_iounmap(io_addr); +} +EXPORT_SYMBOL(__arm_iounmap); diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 4fc6794cca4b..6486d2f253cd 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -86,13 +86,17 @@ void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size, } EXPORT_SYMBOL(__arm_ioremap); +void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, unsigned int, void *); + void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size, unsigned int mtype, void *caller) { return __arm_ioremap(phys_addr, size, mtype); } -void __iounmap(volatile void __iomem *addr) +void (*arch_iounmap)(volatile void __iomem *); + +void __arm_iounmap(volatile void __iomem *addr) { } -EXPORT_SYMBOL(__iounmap); +EXPORT_SYMBOL(__arm_iounmap); diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S deleted file mode 100644 index def5d30cb67e..000000000000 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index a599f01f8b92..0630513554de 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -22,11 +22,8 @@ #include <asm/sizes.h> -#ifdef __ASSEMBLER__ -#define IOMEM(addr) (addr) -#else -#define IOMEM(addr) ((void __force __iomem *)(addr)) -#endif +#define addr_in_module(addr, mod) \ + ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE) #define IMX_IO_P2V_MODULE(addr, module) \ (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \ diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h deleted file mode 100644 index 338300b18b00..000000000000 --- a/arch/arm/plat-mxc/include/mach/io.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_IO_H__ -#define __ASM_ARCH_MXC_IO_H__ - -/* Allow IO space to be anywhere in the memory */ -#define IO_SPACE_LIMIT 0xffffffff - -#define __arch_ioremap __imx_ioremap -#define __arch_iounmap __iounmap - -#define addr_in_module(addr, mod) \ - ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE) - -extern void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int); - -static inline void __iomem * -__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) -{ - if (imx_ioremap != NULL) - return imx_ioremap(phys_addr, size, mtype); - else - return __arm_ioremap(phys_addr, size, mtype); -} - -/* io address mapping macro */ -#define __io(a) __typesafe_io(a) - -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h deleted file mode 100644 index 13ad0df2e860..000000000000 --- a/arch/arm/plat-mxc/include/mach/system.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MXC_SYSTEM_H__ -#define __ASM_ARCH_MXC_SYSTEM_H__ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 5f0f2292b7fb..5068fe5a6910 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -21,6 +21,7 @@ #include <asm/sched_clock.h> +#include <plat/hardware.h> #include <plat/common.h> #include <plat/board.h> diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 002fb4d96bbc..95c3ed693f65 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev) } #else #define set_gdma_dev(req, dev) do {} while (0) +#define omap_readl(reg) 0 +#define omap_writel(val, reg) do {} while (0) #endif void omap_set_dma_priority(int lch, int dst_port, int priority) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index af3b92be8459..2678260d9feb 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -43,6 +43,8 @@ #include <plat/dmtimer.h> +#include <mach/hardware.h> + static LIST_HEAD(omap_timer_list); static DEFINE_SPINLOCK(dm_timer_lock); diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h index 793ce9d53294..a6b21eddb212 100644 --- a/arch/arm/plat-omap/include/plat/keypad.h +++ b/arch/arm/plat-omap/include/plat/keypad.h @@ -12,6 +12,8 @@ #ifndef CONFIG_ARCH_OMAP1 #warning Please update the board to use matrix-keypad driver +#define omap_readw(reg) 0 +#define omap_writew(val, reg) do {} while (0) #endif #include <linux/input/matrix_keypad.h> diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h index 3d51b18131cc..a357eb26bd25 100644 --- a/arch/arm/plat-omap/include/plat/mcspi.h +++ b/arch/arm/plat-omap/include/plat/mcspi.h @@ -18,9 +18,6 @@ struct omap2_mcspi_dev_attr { struct omap2_mcspi_device_config { unsigned turbo_mode:1; - - /* Do we want one channel enabled at the same time? */ - unsigned single_channel:1; }; #endif diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index 925b12b500dc..9bb978ecd884 100644 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h @@ -16,7 +16,6 @@ * published by the Free Software Foundation. */ -#include <mach/io.h> /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h deleted file mode 100644 index 8e5ebd74b129..000000000000 --- a/arch/arm/plat-omap/include/plat/system.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copied from arch/arm/mach-sa1100/include/mach/system.h - * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include <asm/proc-fns.h> - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -#endif diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/plat-omap/include/plat/tc.h index d2fcd789bb9a..1b4b2da86203 100644 --- a/arch/arm/plat-omap/include/plat/tc.h +++ b/arch/arm/plat-omap/include/plat/tc.h @@ -84,23 +84,6 @@ #define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) #define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) -/* Almost all documentation for chip and board memory maps assumes - * BM is clear. Most devel boards have a switch to control booting - * from NOR flash (using external chipselect 3) rather than mask ROM, - * which uses BM to interchange the physical CS0 and CS3 addresses. - */ -static inline u32 omap_cs0_phys(void) -{ - return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) - ? OMAP_CS3_PHYS : 0; -} - -static inline u32 omap_cs3_phys(void) -{ - return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) - ? 0 : OMAP_CS3_PHYS; -} - #endif /* __ASSEMBLER__ */ #endif /* __ASM_ARCH_TC_H */ diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index dc864b580da0..762eeb0626c1 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h @@ -3,6 +3,7 @@ #ifndef __ASM_ARCH_OMAP_USB_H #define __ASM_ARCH_OMAP_USB_H +#include <linux/io.h> #include <linux/usb/musb.h> #include <plat/board.h> @@ -105,6 +106,45 @@ extern int omap4430_phy_set_clk(struct device *dev, int on); extern int omap4430_phy_init(struct device *dev); extern int omap4430_phy_exit(struct device *dev); extern int omap4430_phy_suspend(struct device *dev, int suspend); + +/* + * NOTE: Please update omap USB drivers to use ioremap + read/write + */ + +#define OMAP2_L4_IO_OFFSET 0xb2000000 +#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) + +static inline u8 omap_readb(u32 pa) +{ + return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u16 omap_readw(u32 pa) +{ + return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u32 omap_readl(u32 pa) +{ + return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writeb(u8 v, u32 pa) +{ + __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); +} + + +static inline void omap_writew(u16 v, u32 pa) +{ + __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writel(u32 v, u32 pa) +{ + __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); +} + #endif extern void am35x_musb_reset(void); diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 0d4aa0d5876c..cff8712122bb 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -26,8 +26,11 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/io.h> -#include <asm/system.h> #include <linux/spinlock.h> + +#include <asm/system.h> + +#include <plat/cpu.h> #include <plat/mux.h> #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 4243bdcc87bc..3022fc267d23 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -31,11 +31,10 @@ #include "sram.h" -/* XXX These "sideways" includes are a sign that something is wrong */ -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -# include "../mach-omap2/prm2xxx_3xxx.h" -# include "../mach-omap2/sdrc.h" -#endif +/* XXX These "sideways" includes will disappear when sram.c becomes a driver */ +#include "../mach-omap2/iomap.h" +#include "../mach-omap2/prm2xxx_3xxx.h" +#include "../mach-omap2/sdrc.h" #define OMAP1_SRAM_PA 0x20000000 #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index f3570884883e..d2bbfd1cb0b5 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c @@ -29,6 +29,10 @@ #include <plat/usb.h> #include <plat/board.h> +#include <mach/hardware.h> + +#include "../mach-omap2/common.h" + #ifdef CONFIG_ARCH_OMAP_OTG void __init diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 21f1fda8b661..32a09931350c 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -32,6 +32,7 @@ #include <linux/io.h> #include <mach/hardware.h> +#include <mach/regs-clock.h> #include <asm/irq.h> #include <asm/cacheflush.h> @@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void) return __raw_readl(S3C2410_GSTATUS1); } +static void s3c24xx_default_idle(void) +{ + unsigned long tmp; + int i; + + /* idle the system by using the idle mode which will wait for an + * interrupt to happen before restarting the system. + */ + + /* Warning: going into idle state upsets jtag scanning */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); + + /* the samsung port seems to do a loop and then unset idle.. */ + for (i = 0; i < 50; i++) + tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ + + /* this bit is not cleared on re-start... */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); +} + void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { + arm_pm_idle = s3c24xx_default_idle; + /* initialise the io descriptors we need for initialisation */ iotable_init(mach_desc, size); iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h index 66d677225d15..70187d763e26 100644 --- a/arch/arm/plat-spear/include/plat/hardware.h +++ b/arch/arm/plat-spear/include/plat/hardware.h @@ -14,10 +14,4 @@ #ifndef __PLAT_HARDWARE_H #define __PLAT_HARDWARE_H -#ifndef __ASSEMBLY__ -#define IOMEM(x) ((void __iomem __force *)(x)) -#else -#define IOMEM(x) (x) -#endif - #endif /* __PLAT_HARDWARE_H */ diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h deleted file mode 100644 index 4d4ba822b3eb..000000000000 --- a/arch/arm/plat-spear/include/plat/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/io.h - * - * IO definitions for SPEAr platform - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_IO_H -#define __PLAT_IO_H - -#define IO_SPACE_LIMIT 0xFFFFFFFF - -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif /* __PLAT_IO_H */ diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h deleted file mode 100644 index 86c6f83b44cc..000000000000 --- a/arch/arm/plat-spear/include/plat/system.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/system.h - * - * SPEAr platform specific architecture functions - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_SYSTEM_H -#define __PLAT_SYSTEM_H - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -#endif /* __PLAT_SYSTEM_H */ diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 197e96f70405..3dea7231f637 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -8,6 +8,7 @@ config AVR32 select HAVE_KPROBES select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE + select GENERIC_ATOMIC64 select HARDIRQS_SW_RESEND select GENERIC_IRQ_SHOW select ARCH_HAVE_NMI_SAFE_CMPXCHG diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 402a7bb72669..889c544688ca 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -1055,8 +1055,6 @@ struct platform_device *__init at32_add_device_usart(unsigned int id) return at32_usarts[id]; } -struct platform_device *atmel_default_console_device; - void __init at32_setup_serial_console(unsigned int usart_id) { atmel_default_console_device = at32_usarts[usart_id]; diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h index 8181293115e4..16a24b14146c 100644 --- a/arch/avr32/mach-at32ap/include/mach/cpu.h +++ b/arch/avr32/mach-at32ap/include/mach/cpu.h @@ -30,9 +30,6 @@ #define cpu_is_at91sam9261() (0) #define cpu_is_at91sam9263() (0) #define cpu_is_at91sam9rl() (0) -#define cpu_is_at91cap9() (0) -#define cpu_is_at91cap9_revB() (0) -#define cpu_is_at91cap9_revC() (0) #define cpu_is_at91sam9g10() (0) #define cpu_is_at91sam9g20() (0) #define cpu_is_at91sam9g45() (0) diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c index d4fc1a971779..604cd9dd1333 100644 --- a/arch/microblaze/kernel/setup.c +++ b/arch/microblaze/kernel/setup.c @@ -26,7 +26,6 @@ #include <linux/cache.h> #include <linux/of_platform.h> #include <linux/dma-mapping.h> -#include <linux/cpu.h> #include <asm/cacheflush.h> #include <asm/entry.h> #include <asm/cpuinfo.h> @@ -227,23 +226,5 @@ static int __init setup_bus_notifier(void) return 0; } -arch_initcall(setup_bus_notifier); - -static DEFINE_PER_CPU(struct cpu, cpu_devices); - -static int __init topology_init(void) -{ - int i, ret; - - for_each_present_cpu(i) { - struct cpu *c = &per_cpu(cpu_devices, i); - ret = register_cpu(c, i); - if (ret) - printk(KERN_WARNING "topology_init: register_cpu %d " - "failed (%d)\n", i, ret); - } - - return 0; -} -subsys_initcall(topology_init); +arch_initcall(setup_bus_notifier); diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c4c1312473fb..5ab6e89603c5 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2356,6 +2356,7 @@ config PCI depends on HW_HAS_PCI select PCI_DOMAINS select GENERIC_PCI_IOMAP + select NO_GENERIC_PCI_IOPORT_MAP help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside diff --git a/arch/mips/lib/iomap-pci.c b/arch/mips/lib/iomap-pci.c index 2635b1a96333..fd35daa45314 100644 --- a/arch/mips/lib/iomap-pci.c +++ b/arch/mips/lib/iomap-pci.c @@ -10,8 +10,8 @@ #include <linux/module.h> #include <asm/io.h> -static void __iomem *ioport_map_pci(struct pci_dev *dev, - unsigned long port, unsigned int nr) +void __iomem *__pci_ioport_map(struct pci_dev *dev, + unsigned long port, unsigned int nr) { struct pci_controller *ctrl = dev->bus->sysdata; unsigned long base = ctrl->io_map_base; diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 3c8db65c89e5..713fb58ca507 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -859,6 +859,7 @@ config PCI depends on SYS_SUPPORTS_PCI select PCI_DOMAINS select GENERIC_PCI_IOMAP + select NO_GENERIC_PCI_IOPORT_MAP help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 8f18dd090a66..1e7b0e2e764d 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -356,8 +356,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, #ifndef CONFIG_GENERIC_IOMAP -static void __iomem *ioport_map_pci(struct pci_dev *dev, - unsigned long port, unsigned int nr) +void __iomem *__pci_ioport_map(struct pci_dev *dev, + unsigned long port, unsigned int nr) { struct pci_channel *chan = dev->sysdata; diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 96657992a72e..ca5580e4d813 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -33,6 +33,7 @@ config SPARC config SPARC32 def_bool !64BIT select GENERIC_ATOMIC64 + select CLZ_TAB config SPARC64 def_bool 64BIT diff --git a/arch/sparc/lib/divdi3.S b/arch/sparc/lib/divdi3.S index 681b3683da9e..d74bc0925f2d 100644 --- a/arch/sparc/lib/divdi3.S +++ b/arch/sparc/lib/divdi3.S @@ -17,23 +17,9 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - .data - .align 8 - .globl __clz_tab -__clz_tab: - .byte 0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5 - .byte 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6 - .byte 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7 - .byte 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7 - .byte 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 - .byte 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 - .byte 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 - .byte 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 - .size __clz_tab,256 - .global .udiv - .text .align 4 + .global .udiv .globl __divdi3 __divdi3: save %sp,-104,%sp diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h index 0c9fa2745f13..b3b733262909 100644 --- a/arch/x86/include/asm/cmpxchg.h +++ b/arch/x86/include/asm/cmpxchg.h @@ -145,13 +145,13 @@ extern void __add_wrong_size(void) #ifdef __HAVE_ARCH_CMPXCHG #define cmpxchg(ptr, old, new) \ - __cmpxchg((ptr), (old), (new), sizeof(*ptr)) + __cmpxchg(ptr, old, new, sizeof(*(ptr))) #define sync_cmpxchg(ptr, old, new) \ - __sync_cmpxchg((ptr), (old), (new), sizeof(*ptr)) + __sync_cmpxchg(ptr, old, new, sizeof(*(ptr))) #define cmpxchg_local(ptr, old, new) \ - __cmpxchg_local((ptr), (old), (new), sizeof(*ptr)) + __cmpxchg_local(ptr, old, new, sizeof(*(ptr))) #endif /* diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h index ab4092e3214e..7b9cfc4878af 100644 --- a/arch/x86/include/asm/kvm_emulate.h +++ b/arch/x86/include/asm/kvm_emulate.h @@ -190,6 +190,9 @@ struct x86_emulate_ops { int (*intercept)(struct x86_emulate_ctxt *ctxt, struct x86_instruction_info *info, enum x86_intercept_stage stage); + + bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, + u32 *eax, u32 *ebx, u32 *ecx, u32 *edx); }; typedef u32 __attribute__((vector_size(16))) sse128_t; @@ -298,6 +301,19 @@ struct x86_emulate_ctxt { #define X86EMUL_MODE_PROT (X86EMUL_MODE_PROT16|X86EMUL_MODE_PROT32| \ X86EMUL_MODE_PROT64) +/* CPUID vendors */ +#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 +#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 +#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 + +#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 +#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 +#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 + +#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 +#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e +#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 + enum x86_intercept_stage { X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ X86_ICPT_PRE_EXCEPT, diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c index 1aae78f775fc..4025fe4f928f 100644 --- a/arch/x86/kernel/dumpstack.c +++ b/arch/x86/kernel/dumpstack.c @@ -252,7 +252,8 @@ int __kprobes __die(const char *str, struct pt_regs *regs, long err) unsigned short ss; unsigned long sp; #endif - printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter); + printk(KERN_DEFAULT + "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter); #ifdef CONFIG_PREEMPT printk("PREEMPT "); #endif diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c index 6d728d9284bd..17107bd6e1f0 100644 --- a/arch/x86/kernel/dumpstack_64.c +++ b/arch/x86/kernel/dumpstack_64.c @@ -129,7 +129,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs, if (!stack) { if (regs) stack = (unsigned long *)regs->sp; - else if (task && task != current) + else if (task != current) stack = (unsigned long *)task->thread.sp; else stack = &dummy; @@ -269,11 +269,11 @@ void show_registers(struct pt_regs *regs) unsigned char c; u8 *ip; - printk(KERN_EMERG "Stack:\n"); + printk(KERN_DEFAULT "Stack:\n"); show_stack_log_lvl(NULL, regs, (unsigned long *)sp, - 0, KERN_EMERG); + 0, KERN_DEFAULT); - printk(KERN_EMERG "Code: "); + printk(KERN_DEFAULT "Code: "); ip = (u8 *)regs->ip - code_prologue; if (ip < (u8 *)PAGE_OFFSET || probe_kernel_address(ip, c)) { diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 37a458b521a6..d840e69a853c 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -39,6 +39,14 @@ static int reboot_mode; enum reboot_type reboot_type = BOOT_ACPI; int reboot_force; +/* This variable is used privately to keep track of whether or not + * reboot_type is still set to its default value (i.e., reboot= hasn't + * been set on the command line). This is needed so that we can + * suppress DMI scanning for reboot quirks. Without it, it's + * impossible to override a faulty reboot quirk without recompiling. + */ +static int reboot_default = 1; + #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) static int reboot_cpu = -1; #endif @@ -67,6 +75,12 @@ bool port_cf9_safe = false; static int __init reboot_setup(char *str) { for (;;) { + /* Having anything passed on the command line via + * reboot= will cause us to disable DMI checking + * below. + */ + reboot_default = 0; + switch (*str) { case 'w': reboot_mode = 0x1234; @@ -295,14 +309,6 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { DMI_MATCH(DMI_BOARD_NAME, "P4S800"), }, }, - { /* Handle problems with rebooting on VersaLogic Menlow boards */ - .callback = set_bios_reboot, - .ident = "VersaLogic Menlow based board", - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, "VersaLogic Corporation"), - DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"), - }, - }, { /* Handle reboot issue on Acer Aspire one */ .callback = set_kbd_reboot, .ident = "Acer Aspire One A110", @@ -316,7 +322,12 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { static int __init reboot_init(void) { - dmi_check_system(reboot_dmi_table); + /* Only do the DMI check if reboot_type hasn't been overridden + * on the command line + */ + if (reboot_default) { + dmi_check_system(reboot_dmi_table); + } return 0; } core_initcall(reboot_init); @@ -465,7 +476,12 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { static int __init pci_reboot_init(void) { - dmi_check_system(pci_reboot_dmi_table); + /* Only do the DMI check if reboot_type hasn't been overridden + * on the command line + */ + if (reboot_default) { + dmi_check_system(pci_reboot_dmi_table); + } return 0; } core_initcall(pci_reboot_init); diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 05a562b85025..0982507b962a 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -1891,6 +1891,51 @@ setup_syscalls_segments(struct x86_emulate_ctxt *ctxt, ss->p = 1; } +static bool em_syscall_is_enabled(struct x86_emulate_ctxt *ctxt) +{ + struct x86_emulate_ops *ops = ctxt->ops; + u32 eax, ebx, ecx, edx; + + /* + * syscall should always be enabled in longmode - so only become + * vendor specific (cpuid) if other modes are active... + */ + if (ctxt->mode == X86EMUL_MODE_PROT64) + return true; + + eax = 0x00000000; + ecx = 0x00000000; + if (ops->get_cpuid(ctxt, &eax, &ebx, &ecx, &edx)) { + /* + * Intel ("GenuineIntel") + * remark: Intel CPUs only support "syscall" in 64bit + * longmode. Also an 64bit guest with a + * 32bit compat-app running will #UD !! While this + * behaviour can be fixed (by emulating) into AMD + * response - CPUs of AMD can't behave like Intel. + */ + if (ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && + ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && + edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx) + return false; + + /* AMD ("AuthenticAMD") */ + if (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && + ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && + edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) + return true; + + /* AMD ("AMDisbetter!") */ + if (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && + ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && + edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx) + return true; + } + + /* default: (not Intel, not AMD), apply Intel's stricter rules... */ + return false; +} + static int em_syscall(struct x86_emulate_ctxt *ctxt) { struct x86_emulate_ops *ops = ctxt->ops; @@ -1904,9 +1949,15 @@ static int em_syscall(struct x86_emulate_ctxt *ctxt) ctxt->mode == X86EMUL_MODE_VM86) return emulate_ud(ctxt); + if (!(em_syscall_is_enabled(ctxt))) + return emulate_ud(ctxt); + ops->get_msr(ctxt, MSR_EFER, &efer); setup_syscalls_segments(ctxt, &cs, &ss); + if (!(efer & EFER_SCE)) + return emulate_ud(ctxt); + ops->get_msr(ctxt, MSR_STAR, &msr_data); msr_data >>= 32; cs_sel = (u16)(msr_data & 0xfffc); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 14d6cadc4ba6..9cbfc0698118 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1495,6 +1495,8 @@ static void record_steal_time(struct kvm_vcpu *vcpu) int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) { + bool pr = false; + switch (msr) { case MSR_EFER: return set_efer(vcpu, data); @@ -1635,6 +1637,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) pr_unimpl(vcpu, "unimplemented perfctr wrmsr: " "0x%x data 0x%llx\n", msr, data); break; + case MSR_P6_PERFCTR0: + case MSR_P6_PERFCTR1: + pr = true; + case MSR_P6_EVNTSEL0: + case MSR_P6_EVNTSEL1: + if (kvm_pmu_msr(vcpu, msr)) + return kvm_pmu_set_msr(vcpu, msr, data); + + if (pr || data != 0) + pr_unimpl(vcpu, "disabled perfctr wrmsr: " + "0x%x data 0x%llx\n", msr, data); + break; case MSR_K7_CLK_CTL: /* * Ignore all writes to this no longer documented MSR. @@ -1835,6 +1849,14 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_FAM10H_MMIO_CONF_BASE: data = 0; break; + case MSR_P6_PERFCTR0: + case MSR_P6_PERFCTR1: + case MSR_P6_EVNTSEL0: + case MSR_P6_EVNTSEL1: + if (kvm_pmu_msr(vcpu, msr)) + return kvm_pmu_get_msr(vcpu, msr, pdata); + data = 0; + break; case MSR_IA32_UCODE_REV: data = 0x100000000ULL; break; @@ -4180,6 +4202,28 @@ static int emulator_intercept(struct x86_emulate_ctxt *ctxt, return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage); } +static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt, + u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) +{ + struct kvm_cpuid_entry2 *cpuid = NULL; + + if (eax && ecx) + cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt), + *eax, *ecx); + + if (cpuid) { + *eax = cpuid->eax; + *ecx = cpuid->ecx; + if (ebx) + *ebx = cpuid->ebx; + if (edx) + *edx = cpuid->edx; + return true; + } + + return false; +} + static struct x86_emulate_ops emulate_ops = { .read_std = kvm_read_guest_virt_system, .write_std = kvm_write_guest_virt_system, @@ -4211,6 +4255,7 @@ static struct x86_emulate_ops emulate_ops = { .get_fpu = emulator_get_fpu, .put_fpu = emulator_put_fpu, .intercept = emulator_intercept, + .get_cpuid = emulator_get_cpuid, }; static void cache_all_regs(struct kvm_vcpu *vcpu) diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 9d74824a708d..f0b4caf85c1a 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -673,7 +673,7 @@ no_context(struct pt_regs *regs, unsigned long error_code, stackend = end_of_stack(tsk); if (tsk != &init_task && *stackend != STACK_END_MAGIC) - printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); + printk(KERN_EMERG "Thread overran stack, or stack corrupted\n"); tsk->thread.cr2 = address; tsk->thread.trap_no = 14; @@ -684,7 +684,7 @@ no_context(struct pt_regs *regs, unsigned long error_code, sig = 0; /* Executive summary in case the body of the oops scrolled away */ - printk(KERN_EMERG "CR2: %016lx\n", address); + printk(KERN_DEFAULT "CR2: %016lx\n", address); oops_end(flags, regs, sig); } diff --git a/arch/xtensa/include/asm/string.h b/arch/xtensa/include/asm/string.h index 5fb8c27cbef5..405a8c49ff2c 100644 --- a/arch/xtensa/include/asm/string.h +++ b/arch/xtensa/include/asm/string.h @@ -118,7 +118,4 @@ extern void *memmove(void *__dest, __const__ void *__src, size_t __n); /* Don't build bcopy at all ... */ #define __HAVE_ARCH_BCOPY -#define __HAVE_ARCH_MEMSCAN -#define memscan memchr - #endif /* _XTENSA_STRING_H */ diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c index 2b805d7ef317..8ae05ce18500 100644 --- a/drivers/acpi/processor_driver.c +++ b/drivers/acpi/processor_driver.c @@ -586,13 +586,6 @@ static int __cpuinit acpi_processor_add(struct acpi_device *device) if (pr->flags.need_hotplug_init) return 0; - /* - * Do not start hotplugged CPUs now, but when they - * are onlined the first time - */ - if (pr->flags.need_hotplug_init) - return 0; - result = acpi_processor_start(pr); if (result) goto err_remove_sysfs; diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index 54eaf96ab217..01c2cf4efcdd 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -497,37 +497,22 @@ static void amba_device_release(struct device *dev) } /** - * amba_device_register - register an AMBA device - * @dev: AMBA device to register - * @parent: parent memory resource + * amba_device_add - add a previously allocated AMBA device structure + * @dev: AMBA device allocated by amba_device_alloc + * @parent: resource parent for this devices resources * - * Setup the AMBA device, reading the cell ID if present. - * Claim the resource, and register the AMBA device with - * the Linux device manager. + * Claim the resource, and read the device cell ID if not already + * initialized. Register the AMBA device with the Linux device + * manager. */ -int amba_device_register(struct amba_device *dev, struct resource *parent) +int amba_device_add(struct amba_device *dev, struct resource *parent) { u32 size; void __iomem *tmp; int i, ret; - device_initialize(&dev->dev); - - /* - * Copy from device_add - */ - if (dev->dev.init_name) { - dev_set_name(&dev->dev, "%s", dev->dev.init_name); - dev->dev.init_name = NULL; - } - - dev->dev.release = amba_device_release; - dev->dev.bus = &amba_bustype; - dev->dev.dma_mask = &dev->dma_mask; - dev->res.name = dev_name(&dev->dev); - - if (!dev->dev.coherent_dma_mask && dev->dma_mask) - dev_warn(&dev->dev, "coherent dma mask is unset\n"); + WARN_ON(dev->irq[0] == (unsigned int)-1); + WARN_ON(dev->irq[1] == (unsigned int)-1); ret = request_resource(parent, &dev->res); if (ret) @@ -582,9 +567,9 @@ int amba_device_register(struct amba_device *dev, struct resource *parent) if (ret) goto err_release; - if (dev->irq[0] != NO_IRQ) + if (dev->irq[0] && dev->irq[0] != NO_IRQ) ret = device_create_file(&dev->dev, &dev_attr_irq0); - if (ret == 0 && dev->irq[1] != NO_IRQ) + if (ret == 0 && dev->irq[1] && dev->irq[1] != NO_IRQ) ret = device_create_file(&dev->dev, &dev_attr_irq1); if (ret == 0) return ret; @@ -596,6 +581,74 @@ int amba_device_register(struct amba_device *dev, struct resource *parent) err_out: return ret; } +EXPORT_SYMBOL_GPL(amba_device_add); + +static void amba_device_initialize(struct amba_device *dev, const char *name) +{ + device_initialize(&dev->dev); + if (name) + dev_set_name(&dev->dev, "%s", name); + dev->dev.release = amba_device_release; + dev->dev.bus = &amba_bustype; + dev->dev.dma_mask = &dev->dma_mask; + dev->res.name = dev_name(&dev->dev); +} + +/** + * amba_device_alloc - allocate an AMBA device + * @name: sysfs name of the AMBA device + * @base: base of AMBA device + * @size: size of AMBA device + * + * Allocate and initialize an AMBA device structure. Returns %NULL + * on failure. + */ +struct amba_device *amba_device_alloc(const char *name, resource_size_t base, + size_t size) +{ + struct amba_device *dev; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (dev) { + amba_device_initialize(dev, name); + dev->res.start = base; + dev->res.end = base + size - 1; + dev->res.flags = IORESOURCE_MEM; + } + + return dev; +} +EXPORT_SYMBOL_GPL(amba_device_alloc); + +/** + * amba_device_register - register an AMBA device + * @dev: AMBA device to register + * @parent: parent memory resource + * + * Setup the AMBA device, reading the cell ID if present. + * Claim the resource, and register the AMBA device with + * the Linux device manager. + */ +int amba_device_register(struct amba_device *dev, struct resource *parent) +{ + amba_device_initialize(dev, dev->dev.init_name); + dev->dev.init_name = NULL; + + if (!dev->dev.coherent_dma_mask && dev->dma_mask) + dev_warn(&dev->dev, "coherent dma mask is unset\n"); + + return amba_device_add(dev, parent); +} + +/** + * amba_device_put - put an AMBA device + * @dev: AMBA device to put + */ +void amba_device_put(struct amba_device *dev) +{ + put_device(&dev->dev); +} +EXPORT_SYMBOL_GPL(amba_device_put); /** * amba_device_unregister - unregister an AMBA device diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 3fd31dec8c9c..a6278e7e61a0 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c @@ -380,6 +380,7 @@ static int rbd_get_client(struct rbd_device *rbd_dev, const char *mon_addr, rbdc = __rbd_client_find(opt); if (rbdc) { ceph_destroy_options(opt); + kfree(rbd_opts); /* using an existing client */ kref_get(&rbdc->kref); @@ -406,15 +407,15 @@ done_err: /* * Destroy ceph client + * + * Caller must hold node_lock. */ static void rbd_client_release(struct kref *kref) { struct rbd_client *rbdc = container_of(kref, struct rbd_client, kref); dout("rbd_release_client %p\n", rbdc); - spin_lock(&node_lock); list_del(&rbdc->node); - spin_unlock(&node_lock); ceph_destroy_client(rbdc->client); kfree(rbdc->rbd_opts); @@ -427,7 +428,9 @@ static void rbd_client_release(struct kref *kref) */ static void rbd_put_client(struct rbd_device *rbd_dev) { + spin_lock(&node_lock); kref_put(&rbd_dev->rbd_client->kref, rbd_client_release); + spin_unlock(&node_lock); rbd_dev->rbd_client = NULL; rbd_dev->client = NULL; } diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c index b757fac3cd1f..a07a5caa599c 100644 --- a/drivers/char/hw_random/omap-rng.c +++ b/drivers/char/hw_random/omap-rng.c @@ -26,6 +26,8 @@ #include <asm/io.h> +#include <plat/cpu.h> + #define RNG_OUT_REG 0x00 /* Output register */ #define RNG_STAT_REG 0x04 /* Status register [0] = STAT_BUSY */ diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 97f87b29b9f3..f4aed5fc2cb6 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -1343,7 +1343,7 @@ static int __init at_dma_probe(struct platform_device *pdev) tasklet_init(&atchan->tasklet, atc_tasklet, (unsigned long)atchan); - atc_enable_irq(atchan); + atc_enable_chan_irq(atdma, i); } /* set base routines */ @@ -1410,7 +1410,7 @@ static int __exit at_dma_remove(struct platform_device *pdev) struct at_dma_chan *atchan = to_at_dma_chan(chan); /* Disable interrupts */ - atc_disable_irq(atchan); + atc_disable_chan_irq(atdma, chan->chan_id); tasklet_disable(&atchan->tasklet); tasklet_kill(&atchan->tasklet); diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h index dcaedfc181cf..a8d3277d60b5 100644 --- a/drivers/dma/at_hdmac_regs.h +++ b/drivers/dma/at_hdmac_regs.h @@ -327,28 +327,27 @@ static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli) } -static void atc_setup_irq(struct at_dma_chan *atchan, int on) +static void atc_setup_irq(struct at_dma *atdma, int chan_id, int on) { - struct at_dma *atdma = to_at_dma(atchan->chan_common.device); - u32 ebci; + u32 ebci; /* enable interrupts on buffer transfer completion & error */ - ebci = AT_DMA_BTC(atchan->chan_common.chan_id) - | AT_DMA_ERR(atchan->chan_common.chan_id); + ebci = AT_DMA_BTC(chan_id) + | AT_DMA_ERR(chan_id); if (on) dma_writel(atdma, EBCIER, ebci); else dma_writel(atdma, EBCIDR, ebci); } -static inline void atc_enable_irq(struct at_dma_chan *atchan) +static void atc_enable_chan_irq(struct at_dma *atdma, int chan_id) { - atc_setup_irq(atchan, 1); + atc_setup_irq(atdma, chan_id, 1); } -static inline void atc_disable_irq(struct at_dma_chan *atchan) +static void atc_disable_chan_irq(struct at_dma *atdma, int chan_id) { - atc_setup_irq(atchan, 0); + atc_setup_irq(atdma, chan_id, 0); } diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index 2b8661b54eaf..24225f0fdcd8 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -599,7 +599,7 @@ static int dmatest_add_channel(struct dma_chan *chan) } if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { cnt = dmatest_add_threads(dtc, DMA_PQ); - thread_count += cnt > 0 ?: 0; + thread_count += cnt > 0 ? cnt : 0; } pr_info("dmatest: Started %u threads using %s\n", diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index a8af379680c1..8bc5acf36ee5 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -1102,11 +1102,13 @@ static int sdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, case DMA_SLAVE_CONFIG: if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) { sdmac->per_address = dmaengine_cfg->src_addr; - sdmac->watermark_level = dmaengine_cfg->src_maxburst; + sdmac->watermark_level = dmaengine_cfg->src_maxburst * + dmaengine_cfg->src_addr_width; sdmac->word_size = dmaengine_cfg->src_addr_width; } else { sdmac->per_address = dmaengine_cfg->dst_addr; - sdmac->watermark_level = dmaengine_cfg->dst_maxburst; + sdmac->watermark_level = dmaengine_cfg->dst_maxburst * + dmaengine_cfg->dst_addr_width; sdmac->word_size = dmaengine_cfg->dst_addr_width; } sdmac->direction = dmaengine_cfg->direction; diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index 54043cd831c8..812fd76e9c18 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -1262,7 +1262,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev) INIT_LIST_HEAD(&shdev->common.channels); - dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask); + if (!pdata->slave_only) + dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask); if (pdata->slave && pdata->slave_num) dma_cap_set(DMA_SLAVE, shdev->common.cap_mask); diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 6628feaa7622..7f5f0da726da 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c @@ -263,6 +263,7 @@ static inline struct fw_ohci *fw_ohci(struct fw_card *card) static char ohci_driver_name[] = KBUILD_MODNAME; #define PCI_DEVICE_ID_AGERE_FW643 0x5901 +#define PCI_DEVICE_ID_CREATIVE_SB1394 0x4001 #define PCI_DEVICE_ID_JMICRON_JMB38X_FW 0x2380 #define PCI_DEVICE_ID_TI_TSB12LV22 0x8009 #define PCI_DEVICE_ID_TI_TSB12LV26 0x8020 @@ -289,6 +290,9 @@ static const struct { {PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_AGERE_FW643, 6, QUIRK_NO_MSI}, + {PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_SB1394, PCI_ANY_ID, + QUIRK_RESET_PACKET}, + {PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_FW, PCI_ANY_ID, QUIRK_NO_MSI}, @@ -299,7 +303,7 @@ static const struct { QUIRK_NO_MSI}, {PCI_VENDOR_ID_RICOH, PCI_ANY_ID, PCI_ANY_ID, - QUIRK_CYCLE_TIMER}, + QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB12LV22, PCI_ANY_ID, QUIRK_CYCLE_TIMER | QUIRK_RESET_PACKET | QUIRK_NO_1394A}, diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c index 5b6948081f8f..ddfacc5ce56d 100644 --- a/drivers/gpio/gpio-lpc32xx.c +++ b/drivers/gpio/gpio-lpc32xx.c @@ -96,7 +96,7 @@ static const char *gpio_p2_names[LPC32XX_GPIO_P2_MAX] = { }; static const char *gpio_p3_names[LPC32XX_GPIO_P3_MAX] = { - "gpi000", "gpio01", "gpio02", "gpio03", + "gpio00", "gpio01", "gpio02", "gpio03", "gpio04", "gpio05" }; diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c index 03d6dd5dcb77..f0febe5b8221 100644 --- a/drivers/gpio/gpio-ml-ioh.c +++ b/drivers/gpio/gpio-ml-ioh.c @@ -448,6 +448,7 @@ static int __devinit ioh_gpio_probe(struct pci_dev *pdev, chip->reg = chip->base; chip->ch = i; mutex_init(&chip->lock); + spin_lock_init(&chip->spinlock); ioh_gpio_setup(chip, num_ports[i]); ret = gpiochip_add(&chip->gpio); if (ret) { diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 0b0562979171..5b7b164e08ad 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1064,13 +1064,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id) + OMAP1610_GPIO_IRQSTATUS1); __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG); - - /* - * Enable system clock for GPIO module. - * The CAM_CLK_CTRL *is* really the right place. - */ - omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, - ULPD_CAM_CLK_CTRL); } if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) { __raw_writel(0xffffffff, bank->base diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 68fa55e86eb1..e8729cc2ba2b 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -392,6 +392,7 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev, chip->reg = chip->base; pci_set_drvdata(pdev, chip); mutex_init(&chip->lock); + spin_lock_init(&chip->spinlock); pch_gpio_setup(chip); ret = gpiochip_add(&chip->gpio); if (ret) { diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index a7661773c052..0a79a1167a25 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -2387,27 +2387,30 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = { }; #if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) -static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np, - const void *gpio_spec, u32 *flags) +static int exynos4_gpio_xlate(struct gpio_chip *gc, + const struct of_phandle_args *gpiospec, u32 *flags) { - const __be32 *gpio = gpio_spec; - const u32 n = be32_to_cpup(gpio); - unsigned int pin = gc->base + be32_to_cpu(gpio[0]); + unsigned int pin; if (WARN_ON(gc->of_gpio_n_cells < 4)) return -EINVAL; - if (n > gc->ngpio) + if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) return -EINVAL; - if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1])))) + if (gpiospec->args[0] > gc->ngpio) + return -EINVAL; + + pin = gc->base + gpiospec->args[0]; + + if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(gpiospec->args[1]))) pr_warn("gpio_xlate: failed to set pin function\n"); - if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2]))) + if (s3c_gpio_setpull(pin, gpiospec->args[2])) pr_warn("gpio_xlate: failed to set pin pull up/down\n"); - if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3]))) + if (s5p_gpio_set_drvstr(pin, gpiospec->args[3])) pr_warn("gpio_xlate: failed to set pin drive strength\n"); - return n; + return gpiospec->args[0]; } static const struct of_device_id exynos4_gpio_dt_match[] __initdata = { diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h index 1e382ad5a2b8..a37c31e358aa 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.h +++ b/drivers/gpu/drm/nouveau/nouveau_bios.h @@ -54,9 +54,10 @@ struct bit_entry { int bit_table(struct drm_device *, u8 id, struct bit_entry *); enum dcb_gpio_tag { - DCB_GPIO_TVDAC0 = 0xc, + DCB_GPIO_PANEL_POWER = 0x01, + DCB_GPIO_TVDAC0 = 0x0c, DCB_GPIO_TVDAC1 = 0x2d, - DCB_GPIO_PWM_FAN = 0x9, + DCB_GPIO_PWM_FAN = 0x09, DCB_GPIO_FAN_SENSE = 0x3d, DCB_GPIO_UNUSED = 0xff }; diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 3cb52bc52b21..795a9e3c990a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -219,6 +219,16 @@ nouveau_display_init(struct drm_device *dev) if (ret) return ret; + /* power on internal panel if it's not already. the init tables of + * some vbios default this to off for some reason, causing the + * panel to not work after resume + */ + if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) { + nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true); + msleep(300); + } + + /* enable polling for external displays */ drm_kms_helper_poll_enable(dev); /* enable hotplug interrupts */ diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c index e4a7cfe7898d..81d7962e7252 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.c +++ b/drivers/gpu/drm/nouveau/nouveau_drv.c @@ -124,7 +124,7 @@ MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n"); int nouveau_ctxfw; module_param_named(ctxfw, nouveau_ctxfw, int, 0400); -MODULE_PARM_DESC(ctxfw, "Santise DCB table according to MXM-SIS\n"); +MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS\n"); int nouveau_mxmdcb = 1; module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400); diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index 5f0bc57fdaab..7ce3fde40743 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c @@ -380,6 +380,25 @@ retry: } static int +validate_sync(struct nouveau_channel *chan, struct nouveau_bo *nvbo) +{ + struct nouveau_fence *fence = NULL; + int ret = 0; + + spin_lock(&nvbo->bo.bdev->fence_lock); + if (nvbo->bo.sync_obj) + fence = nouveau_fence_ref(nvbo->bo.sync_obj); + spin_unlock(&nvbo->bo.bdev->fence_lock); + + if (fence) { + ret = nouveau_fence_sync(fence, chan); + nouveau_fence_unref(&fence); + } + + return ret; +} + +static int validate_list(struct nouveau_channel *chan, struct list_head *list, struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr) { @@ -393,7 +412,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, list_for_each_entry(nvbo, list, entry) { struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index]; - ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan); + ret = validate_sync(chan, nvbo); if (unlikely(ret)) { NV_ERROR(dev, "fail pre-validate sync\n"); return ret; @@ -416,7 +435,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, return ret; } - ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan); + ret = validate_sync(chan, nvbo); if (unlikely(ret)) { NV_ERROR(dev, "fail post-validate sync\n"); return ret; diff --git a/drivers/gpu/drm/nouveau/nouveau_mxm.c b/drivers/gpu/drm/nouveau/nouveau_mxm.c index 8bccddf4eff0..e5a64f0f4cb7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mxm.c +++ b/drivers/gpu/drm/nouveau/nouveau_mxm.c @@ -656,7 +656,16 @@ nouveau_mxm_init(struct drm_device *dev) if (mxm_shadow(dev, mxm[0])) { MXM_MSG(dev, "failed to locate valid SIS\n"); +#if 0 + /* we should, perhaps, fall back to some kind of limited + * mode here if the x86 vbios hasn't already done the + * work for us (so we prevent loading with completely + * whacked vbios tables). + */ return -EINVAL; +#else + return 0; +#endif } MXM_MSG(dev, "MXMS Version %d.%d\n", diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c b/drivers/gpu/drm/nouveau/nv50_pm.c index 03937212e9d8..ec5481dfcd82 100644 --- a/drivers/gpu/drm/nouveau/nv50_pm.c +++ b/drivers/gpu/drm/nouveau/nv50_pm.c @@ -495,9 +495,9 @@ nv50_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) struct drm_nouveau_private *dev_priv = dev->dev_private; struct nv50_pm_state *info; struct pll_lims pll; - int ret = -EINVAL; + int clk, ret = -EINVAL; int N, M, P1, P2; - u32 clk, out; + u32 out; if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 891935271d34..742f17f009a9 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1184,7 +1184,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1); WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, - crtc->mode.vdisplay); + target_fb->height); x &= ~3; y &= ~1; WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, @@ -1353,7 +1353,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc, WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); WREG32(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, - crtc->mode.vdisplay); + target_fb->height); x &= ~3; y &= ~1; WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index a71557ce01dc..552b436451fd 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c @@ -564,9 +564,21 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder, ENCODER_OBJECT_ID_NUTMEG) panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE; else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) == - ENCODER_OBJECT_ID_TRAVIS) - panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; - else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { + ENCODER_OBJECT_ID_TRAVIS) { + u8 id[6]; + int i; + for (i = 0; i < 6; i++) + id[i] = radeon_read_dpcd_reg(radeon_connector, 0x503 + i); + if (id[0] == 0x73 && + id[1] == 0x69 && + id[2] == 0x76 && + id[3] == 0x61 && + id[4] == 0x72 && + id[5] == 0x54) + panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE; + else + panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; + } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { u8 tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP); if (tmp & 1) panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index d996f4381130..accc032c103f 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c @@ -468,27 +468,42 @@ set_default_state(struct radeon_device *rdev) radeon_ring_write(ring, sq_stack_resource_mgmt_2); } +#define I2F_MAX_BITS 15 +#define I2F_MAX_INPUT ((1 << I2F_MAX_BITS) - 1) +#define I2F_SHIFT (24 - I2F_MAX_BITS) + +/* + * Converts unsigned integer into 32-bit IEEE floating point representation. + * Conversion is not universal and only works for the range from 0 + * to 2^I2F_MAX_BITS-1. Currently we only use it with inputs between + * 0 and 16384 (inclusive), so I2F_MAX_BITS=15 is enough. If necessary, + * I2F_MAX_BITS can be increased, but that will add to the loop iterations + * and slow us down. Conversion is done by shifting the input and counting + * down until the first 1 reaches bit position 23. The resulting counter + * and the shifted input are, respectively, the exponent and the fraction. + * The sign is always zero. + */ static uint32_t i2f(uint32_t input) { u32 result, i, exponent, fraction; - if ((input & 0x3fff) == 0) - result = 0; /* 0 is a special case */ + WARN_ON_ONCE(input > I2F_MAX_INPUT); + + if ((input & I2F_MAX_INPUT) == 0) + result = 0; else { - exponent = 140; /* exponent biased by 127; */ - fraction = (input & 0x3fff) << 10; /* cheat and only - handle numbers below 2^^15 */ - for (i = 0; i < 14; i++) { + exponent = 126 + I2F_MAX_BITS; + fraction = (input & I2F_MAX_INPUT) << I2F_SHIFT; + + for (i = 0; i < I2F_MAX_BITS; i++) { if (fraction & 0x800000) break; else { - fraction = fraction << 1; /* keep - shifting left until top bit = 1 */ + fraction = fraction << 1; exponent = exponent - 1; } } - result = exponent << 23 | (fraction & 0x7fffff); /* mask - off top bit; assumed 1 */ + result = exponent << 23 | (fraction & 0x7fffff); } return result; } diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 13ac63ba6075..98724fcb0088 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c @@ -59,8 +59,9 @@ static int radeon_atrm_call(acpi_handle atrm_handle, uint8_t *bios, obj = (union acpi_object *)buffer.pointer; memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length); + len = obj->buffer.length; kfree(buffer.pointer); - return obj->buffer.length; + return len; } bool radeon_atrm_supported(struct pci_dev *pdev) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index cec51a5b69dd..49f7cb7e226b 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -883,6 +883,8 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state) if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; + drm_kms_helper_poll_disable(dev); + /* turn off display hw */ list_for_each_entry(connector, &dev->mode_config.connector_list, head) { drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); @@ -972,6 +974,8 @@ int radeon_resume_kms(struct drm_device *dev) list_for_each_entry(connector, &dev->mode_config.connector_list, head) { drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); } + + drm_kms_helper_poll_enable(dev); return 0; } diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index e2a393ff0c44..98a8ad680109 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -958,6 +958,7 @@ struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, i2c->rec = *rec; i2c->adapter.owner = THIS_MODULE; i2c->adapter.class = I2C_CLASS_DDC; + i2c->adapter.dev.parent = &dev->pdev->dev; i2c->dev = dev; snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), "Radeon aux bus %s", name); diff --git a/drivers/hid/hid-hyperv.c b/drivers/hid/hid-hyperv.c index 0c33ae9cf0f0..406632472c1b 100644 --- a/drivers/hid/hid-hyperv.c +++ b/drivers/hid/hid-hyperv.c @@ -548,6 +548,7 @@ static int mousevsc_remove(struct hv_device *dev) struct mousevsc_dev *input_dev = hv_get_drvdata(dev); vmbus_close(dev->channel); + hid_hw_stop(input_dev->hid_device); hid_destroy_device(input_dev->hid_device); mousevsc_free_device(input_dev); diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c index b47e58b52d9f..acab74cde727 100644 --- a/drivers/hid/hid-wacom.c +++ b/drivers/hid/hid-wacom.c @@ -531,7 +531,6 @@ static int wacom_probe(struct hid_device *hdev, wdata->battery.type = POWER_SUPPLY_TYPE_BATTERY; wdata->battery.use_for_apm = 0; - power_supply_powers(&wdata->battery, &hdev->dev); ret = power_supply_register(&hdev->dev, &wdata->battery); if (ret) { @@ -540,6 +539,8 @@ static int wacom_probe(struct hid_device *hdev, goto err_battery; } + power_supply_powers(&wdata->battery, &hdev->dev); + wdata->ac.properties = wacom_ac_props; wdata->ac.num_properties = ARRAY_SIZE(wacom_ac_props); wdata->ac.get_property = wacom_ac_get_property; @@ -547,14 +548,14 @@ static int wacom_probe(struct hid_device *hdev, wdata->ac.type = POWER_SUPPLY_TYPE_MAINS; wdata->ac.use_for_apm = 0; - power_supply_powers(&wdata->battery, &hdev->dev); - ret = power_supply_register(&hdev->dev, &wdata->ac); if (ret) { hid_warn(hdev, "can't create ac battery attribute, err: %d\n", ret); goto err_ac; } + + power_supply_powers(&wdata->ac, &hdev->dev); #endif return 0; diff --git a/drivers/hid/hid-wiimote-core.c b/drivers/hid/hid-wiimote-core.c index fc253b472f9d..cac3589b1ed5 100644 --- a/drivers/hid/hid-wiimote-core.c +++ b/drivers/hid/hid-wiimote-core.c @@ -1226,14 +1226,14 @@ static int wiimote_hid_probe(struct hid_device *hdev, wdata->battery.type = POWER_SUPPLY_TYPE_BATTERY; wdata->battery.use_for_apm = 0; - power_supply_powers(&wdata->battery, &hdev->dev); - ret = power_supply_register(&wdata->hdev->dev, &wdata->battery); if (ret) { hid_err(hdev, "Cannot register battery device\n"); goto err_battery; } + power_supply_powers(&wdata->battery, &hdev->dev); + ret = wiimote_leds_create(wdata); if (ret) goto err_free; diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c index 7c297d305d5d..b1ec0e2aeb57 100644 --- a/drivers/hid/usbhid/hiddev.c +++ b/drivers/hid/usbhid/hiddev.c @@ -922,11 +922,11 @@ void hiddev_disconnect(struct hid_device *hid) struct hiddev *hiddev = hid->hiddev; struct usbhid_device *usbhid = hid->driver_data; + usb_deregister_dev(usbhid->intf, &hiddev_class); + mutex_lock(&hiddev->existancelock); hiddev->exist = 0; - usb_deregister_dev(usbhid->intf, &hiddev_class); - if (hiddev->open) { mutex_unlock(&hiddev->existancelock); usbhid_close(hiddev->hid); diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index 2dfae7d7cc5b..4d383e7e051d 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c @@ -1920,9 +1920,26 @@ w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data, fan4min = 0; fan5pin = 0; } else if (sio_data->kind == nct6776) { - fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); - fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01); - fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02); + bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80; + + superio_select(sio_data->sioreg, W83627EHF_LD_HWM); + regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE); + + if (regval & 0x80) + fan3pin = gpok; + else + fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); + + if (regval & 0x40) + fan4pin = gpok; + else + fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01); + + if (regval & 0x20) + fan5pin = gpok; + else + fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02); + fan4min = fan4pin; } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { fan3pin = 1; diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index f713eac55047..801df6000e9b 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1018,7 +1018,7 @@ omap_i2c_probe(struct platform_device *pdev) goto err_release_region; } - match = of_match_device(omap_i2c_of_match, &pdev->dev); + match = of_match_device(of_match_ptr(omap_i2c_of_match), &pdev->dev); if (match) { u32 freq = 100000; /* default to 100000 Hz */ diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c index b37b0c02a7b9..5034a87cc72d 100644 --- a/drivers/infiniband/core/ucma.c +++ b/drivers/infiniband/core/ucma.c @@ -808,9 +808,12 @@ static ssize_t ucma_accept(struct ucma_file *file, const char __user *inbuf, return PTR_ERR(ctx); if (cmd.conn_param.valid) { - ctx->uid = cmd.uid; ucma_copy_conn_param(&conn_param, &cmd.conn_param); + mutex_lock(&file->mut); ret = rdma_accept(ctx->cm_id, &conn_param); + if (!ret) + ctx->uid = cmd.uid; + mutex_unlock(&file->mut); } else ret = rdma_accept(ctx->cm_id, NULL); diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c index b930da4c0c63..4d27e4c3fe34 100644 --- a/drivers/infiniband/core/uverbs_cmd.c +++ b/drivers/infiniband/core/uverbs_cmd.c @@ -1485,6 +1485,7 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file, qp->event_handler = attr.event_handler; qp->qp_context = attr.qp_context; qp->qp_type = attr.qp_type; + atomic_set(&qp->usecnt, 0); atomic_inc(&pd->usecnt); atomic_inc(&attr.send_cq->usecnt); if (attr.recv_cq) diff --git a/drivers/infiniband/core/verbs.c b/drivers/infiniband/core/verbs.c index 602b1bd723a9..575b78045aaf 100644 --- a/drivers/infiniband/core/verbs.c +++ b/drivers/infiniband/core/verbs.c @@ -421,6 +421,7 @@ struct ib_qp *ib_create_qp(struct ib_pd *pd, qp->uobject = NULL; qp->qp_type = qp_init_attr->qp_type; + atomic_set(&qp->usecnt, 0); if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) { qp->event_handler = __ib_shared_qp_event_handler; qp->qp_context = qp; @@ -430,7 +431,6 @@ struct ib_qp *ib_create_qp(struct ib_pd *pd, qp->xrcd = qp_init_attr->xrcd; atomic_inc(&qp_init_attr->xrcd->usecnt); INIT_LIST_HEAD(&qp->open_list); - atomic_set(&qp->usecnt, 0); real_qp = qp; qp = __ib_open_qp(real_qp, qp_init_attr->event_handler, diff --git a/drivers/infiniband/hw/ipath/ipath_fs.c b/drivers/infiniband/hw/ipath/ipath_fs.c index b7d4216db3c3..a4de9d58e9b4 100644 --- a/drivers/infiniband/hw/ipath/ipath_fs.c +++ b/drivers/infiniband/hw/ipath/ipath_fs.c @@ -89,7 +89,7 @@ static int create_file(const char *name, umode_t mode, error = ipathfs_mknod(parent->d_inode, *dentry, mode, fops, data); else - error = PTR_ERR(dentry); + error = PTR_ERR(*dentry); mutex_unlock(&parent->d_inode->i_mutex); return error; diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c index 95c94d8f0254..259b0670b51c 100644 --- a/drivers/infiniband/hw/mlx4/mad.c +++ b/drivers/infiniband/hw/mlx4/mad.c @@ -257,12 +257,9 @@ static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, return IB_MAD_RESULT_SUCCESS; /* - * Don't process SMInfo queries or vendor-specific - * MADs -- the SMA can't handle them. + * Don't process SMInfo queries -- the SMA can't handle them. */ - if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO || - ((in_mad->mad_hdr.attr_id & IB_SMP_ATTR_VENDOR_MASK) == - IB_SMP_ATTR_VENDOR_MASK)) + if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO) return IB_MAD_RESULT_SUCCESS; } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT || in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 || diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c index 7013da5e9eda..7140199f562e 100644 --- a/drivers/infiniband/hw/nes/nes.c +++ b/drivers/infiniband/hw/nes/nes.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. * * This software is available to you under a choice of one of two diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h index 568b4f11380a..c438e4691b3c 100644 --- a/drivers/infiniband/hw/nes/nes.h +++ b/drivers/infiniband/hw/nes/nes.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. * * This software is available to you under a choice of one of two diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c index 425065b36b8c..a4972abedef1 100644 --- a/drivers/infiniband/hw/nes/nes_cm.c +++ b/drivers/infiniband/hw/nes/nes_cm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU @@ -233,6 +233,7 @@ static int send_mpa_reject(struct nes_cm_node *cm_node) u8 *start_ptr = &start_addr; u8 **start_buff = &start_ptr; u16 buff_len = 0; + struct ietf_mpa_v1 *mpa_frame; skb = dev_alloc_skb(MAX_CM_BUFFER); if (!skb) { @@ -242,6 +243,8 @@ static int send_mpa_reject(struct nes_cm_node *cm_node) /* send an MPA reject frame */ cm_build_mpa_frame(cm_node, start_buff, &buff_len, NULL, MPA_KEY_REPLY); + mpa_frame = (struct ietf_mpa_v1 *)*start_buff; + mpa_frame->flags |= IETF_MPA_FLAGS_REJECT; form_cm_frame(skb, cm_node, NULL, 0, *start_buff, buff_len, SET_ACK | SET_FIN); cm_node->state = NES_CM_STATE_FIN_WAIT1; @@ -1360,8 +1363,7 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi if (!memcmp(nesadapter->arp_table[arpindex].mac_addr, neigh->ha, ETH_ALEN)) { /* Mac address same as in nes_arp_table */ - ip_rt_put(rt); - return rc; + goto out; } nes_manage_arp_cache(nesvnic->netdev, @@ -1377,6 +1379,8 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi neigh_event_send(neigh, NULL); } } + +out: rcu_read_unlock(); ip_rt_put(rt); return rc; diff --git a/drivers/infiniband/hw/nes/nes_cm.h b/drivers/infiniband/hw/nes/nes_cm.h index bdfa1fbb35fc..4646e6666087 100644 --- a/drivers/infiniband/hw/nes/nes_cm.h +++ b/drivers/infiniband/hw/nes/nes_cm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_context.h b/drivers/infiniband/hw/nes/nes_context.h index b4393a16099d..a69eef16d72d 100644 --- a/drivers/infiniband/hw/nes/nes_context.h +++ b/drivers/infiniband/hw/nes/nes_context.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index 055f4b545df0..d42c9f435b1b 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h index 0b590e152c6a..d748e4b31b8d 100644 --- a/drivers/infiniband/hw/nes/nes_hw.h +++ b/drivers/infiniband/hw/nes/nes_hw.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. +* Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_mgt.c b/drivers/infiniband/hw/nes/nes_mgt.c index b3b2a240c6e9..3ba7be369452 100644 --- a/drivers/infiniband/hw/nes/nes_mgt.c +++ b/drivers/infiniband/hw/nes/nes_mgt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. + * Copyright (c) 2006 - 2011 Intel-NE, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_mgt.h b/drivers/infiniband/hw/nes/nes_mgt.h index 8c8af254555a..4f7f701c4a81 100644 --- a/drivers/infiniband/hw/nes/nes_mgt.h +++ b/drivers/infiniband/hw/nes/nes_mgt.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2010 Intel-NE, Inc. All rights reserved. +* Copyright (c) 2006 - 2011 Intel-NE, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c index 4b3fa711a247..f3a3ecf8d09e 100644 --- a/drivers/infiniband/hw/nes/nes_nic.c +++ b/drivers/infiniband/hw/nes/nes_nic.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_user.h b/drivers/infiniband/hw/nes/nes_user.h index 71e133ab209b..4926de744488 100644 --- a/drivers/infiniband/hw/nes/nes_user.h +++ b/drivers/infiniband/hw/nes/nes_user.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * Copyright (c) 2005 Topspin Communications. All rights reserved. * Copyright (c) 2005 Cisco Systems. All rights reserved. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c index 8b4c2ff54888..e98f4fc0b768 100644 --- a/drivers/infiniband/hw/nes/nes_utils.c +++ b/drivers/infiniband/hw/nes/nes_utils.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index 5095bc41c6cc..0927b5cc65d3 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU @@ -3428,6 +3428,8 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr, NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX, ib_wr->wr.fast_reg.length); set_wqe_32bit_value(wqe->wqe_words, + NES_IWARP_SQ_FMR_WQE_LENGTH_HIGH_IDX, 0); + set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX, ib_wr->wr.fast_reg.rkey); /* Set page size: */ @@ -3724,7 +3726,7 @@ static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry) entry->opcode = IB_WC_SEND; break; case NES_IWARP_SQ_OP_LOCINV: - entry->opcode = IB_WR_LOCAL_INV; + entry->opcode = IB_WC_LOCAL_INV; break; case NES_IWARP_SQ_OP_FAST_REG: entry->opcode = IB_WC_FAST_REG_MR; diff --git a/drivers/infiniband/hw/nes/nes_verbs.h b/drivers/infiniband/hw/nes/nes_verbs.h index fe6b6e92fa90..0eff7c44d76b 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.h +++ b/drivers/infiniband/hw/nes/nes_verbs.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. + * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. * * This software is available to you under a choice of one of two diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c index 4f18e2d332df..d0c64d514813 100644 --- a/drivers/infiniband/hw/qib/qib_iba6120.c +++ b/drivers/infiniband/hw/qib/qib_iba6120.c @@ -2105,7 +2105,7 @@ static void alloc_dummy_hdrq(struct qib_devdata *dd) dd->cspec->dummy_hdrq = dma_alloc_coherent(&dd->pcidev->dev, dd->rcd[0]->rcvhdrq_size, &dd->cspec->dummy_hdrq_phys, - GFP_KERNEL | __GFP_COMP); + GFP_ATOMIC | __GFP_COMP); if (!dd->cspec->dummy_hdrq) { qib_devinfo(dd->pcidev, "Couldn't allocate dummy hdrq\n"); /* fallback to just 0'ing */ diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index f695061d688e..0fde788e1100 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c @@ -560,7 +560,7 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd) * BIOS may not set PCIe bus-utilization parameters for best performance. * Check and optionally adjust them to maximize our throughput. */ -static int qib_pcie_caps = 0x51; +static int qib_pcie_caps; module_param_named(pcie_caps, qib_pcie_caps, int, S_IRUGO); MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)"); diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.c b/drivers/infiniband/ulp/srpt/ib_srpt.c index cd5d05e22a77..2b73d43cd691 100644 --- a/drivers/infiniband/ulp/srpt/ib_srpt.c +++ b/drivers/infiniband/ulp/srpt/ib_srpt.c @@ -69,8 +69,8 @@ MODULE_LICENSE("Dual BSD/GPL"); */ static u64 srpt_service_guid; -static spinlock_t srpt_dev_lock; /* Protects srpt_dev_list. */ -static struct list_head srpt_dev_list; /* List of srpt_device structures. */ +static DEFINE_SPINLOCK(srpt_dev_lock); /* Protects srpt_dev_list. */ +static LIST_HEAD(srpt_dev_list); /* List of srpt_device structures. */ static unsigned srp_max_req_size = DEFAULT_MAX_REQ_SIZE; module_param(srp_max_req_size, int, 0444); @@ -687,6 +687,7 @@ err: while (--i >= 0) srpt_free_ioctx(sdev, ring[i], dma_size, dir); kfree(ring); + ring = NULL; out: return ring; } @@ -2595,7 +2596,7 @@ static int srpt_cm_req_recv(struct ib_cm_id *cm_id, } ch->sess = transport_init_session(); - if (!ch->sess) { + if (IS_ERR(ch->sess)) { rej->reason = __constant_cpu_to_be32( SRP_LOGIN_REJ_INSUFFICIENT_RESOURCES); pr_debug("Failed to create session\n"); @@ -3264,8 +3265,7 @@ static void srpt_add_one(struct ib_device *device) for (i = 0; i < sdev->srq_size; ++i) srpt_post_recv(sdev, sdev->ioctx_ring[i]); - WARN_ON(sdev->device->phys_port_cnt - > sizeof(sdev->port)/sizeof(sdev->port[0])); + WARN_ON(sdev->device->phys_port_cnt > ARRAY_SIZE(sdev->port)); for (i = 1; i <= sdev->device->phys_port_cnt; i++) { sport = &sdev->port[i - 1]; @@ -4010,13 +4010,10 @@ static int __init srpt_init_module(void) goto out; } - spin_lock_init(&srpt_dev_lock); - INIT_LIST_HEAD(&srpt_dev_list); - - ret = -ENODEV; srpt_target = target_fabric_configfs_init(THIS_MODULE, "srpt"); - if (!srpt_target) { + if (IS_ERR(srpt_target)) { printk(KERN_ERR "couldn't register\n"); + ret = PTR_ERR(srpt_target); goto out; } diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.h b/drivers/infiniband/ulp/srpt/ib_srpt.h index b4b4bbcd7f16..61e52b830816 100644 --- a/drivers/infiniband/ulp/srpt/ib_srpt.h +++ b/drivers/infiniband/ulp/srpt/ib_srpt.h @@ -35,7 +35,6 @@ #ifndef IB_SRPT_H #define IB_SRPT_H -#include <linux/version.h> #include <linux/types.h> #include <linux/list.h> #include <linux/wait.h> diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c index 76457d50bc34..afc166fcc3d9 100644 --- a/drivers/input/evdev.c +++ b/drivers/input/evdev.c @@ -386,7 +386,7 @@ static ssize_t evdev_read(struct file *file, char __user *buffer, struct evdev_client *client = file->private_data; struct evdev *evdev = client->evdev; struct input_event event; - int retval; + int retval = 0; if (count < input_event_size()) return -EINVAL; diff --git a/drivers/input/keyboard/twl4030_keypad.c b/drivers/input/keyboard/twl4030_keypad.c index a588578037eb..67bec14e8b96 100644 --- a/drivers/input/keyboard/twl4030_keypad.c +++ b/drivers/input/keyboard/twl4030_keypad.c @@ -34,7 +34,6 @@ #include <linux/i2c/twl.h> #include <linux/slab.h> - /* * The TWL4030 family chips include a keypad controller that supports * up to an 8x8 switch matrix. The controller can issue system wakeup @@ -302,7 +301,7 @@ static int __devinit twl4030_kp_program(struct twl4030_keypad *kp) if (twl4030_kpwrite_u8(kp, i, KEYP_DEB) < 0) return -EIO; - /* Set timeout period to 100 ms */ + /* Set timeout period to 200 ms */ i = KEYP_PERIOD_US(200000, PTV_PRESCALER); if (twl4030_kpwrite_u8(kp, (i & 0xFF), KEYP_TIMEOUT_L) < 0) return -EIO; @@ -466,4 +465,3 @@ MODULE_AUTHOR("Texas Instruments"); MODULE_DESCRIPTION("TWL4030 Keypad Driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:twl4030_keypad"); - diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h index b4cfc6c8be89..5ec774d6c82b 100644 --- a/drivers/input/serio/i8042-x86ia64io.h +++ b/drivers/input/serio/i8042-x86ia64io.h @@ -512,6 +512,13 @@ static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1720"), }, }, + { + /* Lenovo Ideapad U455 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "20046"), + }, + }, { } }; diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c index 8250299fd64f..4494233d331a 100644 --- a/drivers/input/serio/serio_raw.c +++ b/drivers/input/serio/serio_raw.c @@ -164,7 +164,8 @@ static ssize_t serio_raw_read(struct file *file, char __user *buffer, struct serio_raw_client *client = file->private_data; struct serio_raw *serio_raw = client->serio_raw; char uninitialized_var(c); - ssize_t retval = 0; + ssize_t read = 0; + int retval; if (serio_raw->dead) return -ENODEV; @@ -180,13 +181,15 @@ static ssize_t serio_raw_read(struct file *file, char __user *buffer, if (serio_raw->dead) return -ENODEV; - while (retval < count && serio_raw_fetch_byte(serio_raw, &c)) { - if (put_user(c, buffer++)) - return -EFAULT; - retval++; + while (read < count && serio_raw_fetch_byte(serio_raw, &c)) { + if (put_user(c, buffer++)) { + retval = -EFAULT; + break; + } + read++; } - return retval; + return read ?: retval; } static ssize_t serio_raw_write(struct file *file, const char __user *buffer, diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index cce1f03b8895..f75e0608be5b 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -2863,6 +2863,9 @@ static unsigned device_dma_ops_init(void) for_each_pci_dev(pdev) { if (!check_device(&pdev->dev)) { + + iommu_ignore_device(&pdev->dev); + unhandled += 1; continue; } diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 08a90b88e40d..cee307e86606 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -482,23 +482,19 @@ static size_t msm_iommu_unmap(struct iommu_domain *domain, unsigned long va, priv = domain->priv; - if (!priv) { - ret = -ENODEV; + if (!priv) goto fail; - } fl_table = priv->pgtable; if (len != SZ_16M && len != SZ_1M && len != SZ_64K && len != SZ_4K) { pr_debug("Bad length: %d\n", len); - ret = -EINVAL; goto fail; } if (!fl_table) { pr_debug("Null page table\n"); - ret = -EINVAL; goto fail; } @@ -507,7 +503,6 @@ static size_t msm_iommu_unmap(struct iommu_domain *domain, unsigned long va, if (*fl_pte == 0) { pr_debug("First level PTE is 0\n"); - ret = -ENODEV; goto fail; } diff --git a/drivers/leds/leds-lm3530.c b/drivers/leds/leds-lm3530.c index 45e6878d7374..e59c166a0ce2 100644 --- a/drivers/leds/leds-lm3530.c +++ b/drivers/leds/leds-lm3530.c @@ -164,8 +164,8 @@ static int lm3530_init_registers(struct lm3530_data *drvdata) if (drvdata->mode == LM3530_BL_MODE_ALS) { if (pltfm->als_vmax == 0) { - pltfm->als_vmin = als_vmin = 0; - pltfm->als_vmin = als_vmax = LM3530_ALS_WINDOW_mV; + pltfm->als_vmin = 0; + pltfm->als_vmax = LM3530_ALS_WINDOW_mV; } als_vmin = pltfm->als_vmin; diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c index c2907d836e4e..86cb7e5d83d5 100644 --- a/drivers/md/dm-raid.c +++ b/drivers/md/dm-raid.c @@ -56,7 +56,8 @@ struct raid_dev { struct raid_set { struct dm_target *ti; - uint64_t print_flags; + uint32_t bitmap_loaded; + uint32_t print_flags; struct mddev md; struct raid_type *raid_type; @@ -1085,7 +1086,7 @@ static int raid_status(struct dm_target *ti, status_type_t type, raid_param_cnt += 2; } - raid_param_cnt += (hweight64(rs->print_flags & ~DMPF_REBUILD) * 2); + raid_param_cnt += (hweight32(rs->print_flags & ~DMPF_REBUILD) * 2); if (rs->print_flags & (DMPF_SYNC | DMPF_NOSYNC)) raid_param_cnt--; @@ -1197,7 +1198,12 @@ static void raid_resume(struct dm_target *ti) { struct raid_set *rs = ti->private; - bitmap_load(&rs->md); + if (!rs->bitmap_loaded) { + bitmap_load(&rs->md); + rs->bitmap_loaded = 1; + } else + md_wakeup_thread(rs->md.thread); + mddev_resume(&rs->md); } diff --git a/drivers/md/md.c b/drivers/md/md.c index 9417ae2fa0bb..ce88755baf4a 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -7333,7 +7333,8 @@ void md_do_sync(struct mddev *mddev) printk(KERN_INFO "md: checkpointing %s of %s.\n", desc, mdname(mddev)); - mddev->recovery_cp = mddev->curr_resync; + mddev->recovery_cp = + mddev->curr_resync_completed; } } else mddev->recovery_cp = MaxSector; @@ -7351,9 +7352,9 @@ void md_do_sync(struct mddev *mddev) rcu_read_unlock(); } } + skip: set_bit(MD_CHANGE_DEVS, &mddev->flags); - skip: if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) { /* We completed so min/max setting can be forgotten if used. */ if (test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) diff --git a/drivers/media/video/davinci/vpbe_osd.c b/drivers/media/video/davinci/vpbe_osd.c index d6488b79ae3b..bba299dbf396 100644 --- a/drivers/media/video/davinci/vpbe_osd.c +++ b/drivers/media/video/davinci/vpbe_osd.c @@ -28,7 +28,6 @@ #include <linux/clk.h> #include <linux/slab.h> -#include <mach/io.h> #include <mach/cputype.h> #include <mach/hardware.h> diff --git a/drivers/media/video/davinci/vpbe_venc.c b/drivers/media/video/davinci/vpbe_venc.c index 00e80f59d5d5..b21ecc8d134d 100644 --- a/drivers/media/video/davinci/vpbe_venc.c +++ b/drivers/media/video/davinci/vpbe_venc.c @@ -27,7 +27,6 @@ #include <mach/hardware.h> #include <mach/mux.h> -#include <mach/io.h> #include <mach/i2c.h> #include <linux/io.h> diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c index dda86293dc9f..b2d8e512d3cb 100644 --- a/drivers/mfd/twl6040-core.c +++ b/drivers/mfd/twl6040-core.c @@ -282,6 +282,7 @@ int twl6040_power(struct twl6040 *twl6040, int on) /* Default PLL configuration after power up */ twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; twl6040->sysclk = 19200000; + twl6040->mclk = 32768; } else { /* already powered-down */ if (!twl6040->power_count) { @@ -305,6 +306,7 @@ int twl6040_power(struct twl6040 *twl6040, int on) twl6040_power_down(twl6040); } twl6040->sysclk = 0; + twl6040->mclk = 0; } out: @@ -324,23 +326,38 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL); lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); + /* Force full reconfiguration when switching between PLL */ + if (pll_id != twl6040->pll) { + twl6040->sysclk = 0; + twl6040->mclk = 0; + } + switch (pll_id) { case TWL6040_SYSCLK_SEL_LPPLL: /* low-power PLL divider */ - switch (freq_out) { - case 17640000: - lppllctl |= TWL6040_LPLLFIN; - break; - case 19200000: - lppllctl &= ~TWL6040_LPLLFIN; - break; - default: - dev_err(twl6040->dev, - "freq_out %d not supported\n", freq_out); - ret = -EINVAL; - goto pll_out; + /* Change the sysclk configuration only if it has been canged */ + if (twl6040->sysclk != freq_out) { + switch (freq_out) { + case 17640000: + lppllctl |= TWL6040_LPLLFIN; + break; + case 19200000: + lppllctl &= ~TWL6040_LPLLFIN; + break; + default: + dev_err(twl6040->dev, + "freq_out %d not supported\n", + freq_out); + ret = -EINVAL; + goto pll_out; + } + twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, + lppllctl); } - twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); + + /* The PLL in use has not been change, we can exit */ + if (twl6040->pll == pll_id) + break; switch (freq_in) { case 32768: @@ -371,48 +388,56 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, goto pll_out; } - hppllctl &= ~TWL6040_MCLK_MSK; + if (twl6040->mclk != freq_in) { + hppllctl &= ~TWL6040_MCLK_MSK; + + switch (freq_in) { + case 12000000: + /* PLL enabled, active mode */ + hppllctl |= TWL6040_MCLK_12000KHZ | + TWL6040_HPLLENA; + break; + case 19200000: + /* + * PLL disabled + * (enable PLL if MCLK jitter quality + * doesn't meet specification) + */ + hppllctl |= TWL6040_MCLK_19200KHZ; + break; + case 26000000: + /* PLL enabled, active mode */ + hppllctl |= TWL6040_MCLK_26000KHZ | + TWL6040_HPLLENA; + break; + case 38400000: + /* PLL enabled, active mode */ + hppllctl |= TWL6040_MCLK_38400KHZ | + TWL6040_HPLLENA; + break; + default: + dev_err(twl6040->dev, + "freq_in %d not supported\n", freq_in); + ret = -EINVAL; + goto pll_out; + } - switch (freq_in) { - case 12000000: - /* PLL enabled, active mode */ - hppllctl |= TWL6040_MCLK_12000KHZ | - TWL6040_HPLLENA; - break; - case 19200000: /* - * PLL disabled - * (enable PLL if MCLK jitter quality - * doesn't meet specification) + * enable clock slicer to ensure input waveform is + * square */ - hppllctl |= TWL6040_MCLK_19200KHZ; - break; - case 26000000: - /* PLL enabled, active mode */ - hppllctl |= TWL6040_MCLK_26000KHZ | - TWL6040_HPLLENA; - break; - case 38400000: - /* PLL enabled, active mode */ - hppllctl |= TWL6040_MCLK_38400KHZ | - TWL6040_HPLLENA; - break; - default: - dev_err(twl6040->dev, - "freq_in %d not supported\n", freq_in); - ret = -EINVAL; - goto pll_out; - } + hppllctl |= TWL6040_HPLLSQRENA; - /* enable clock slicer to ensure input waveform is square */ - hppllctl |= TWL6040_HPLLSQRENA; - - twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, hppllctl); - usleep_range(500, 700); - lppllctl |= TWL6040_HPLLSEL; - twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); - lppllctl &= ~TWL6040_LPLLENA; - twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); + twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, + hppllctl); + usleep_range(500, 700); + lppllctl |= TWL6040_HPLLSEL; + twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, + lppllctl); + lppllctl &= ~TWL6040_LPLLENA; + twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, + lppllctl); + } break; default: dev_err(twl6040->dev, "unknown pll id %d\n", pll_id); @@ -421,6 +446,7 @@ int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, } twl6040->sysclk = freq_out; + twl6040->mclk = freq_in; twl6040->pll = pll_id; pll_out: diff --git a/drivers/misc/lkdtm.c b/drivers/misc/lkdtm.c index 150cd7061b80..28adefe70f96 100644 --- a/drivers/misc/lkdtm.c +++ b/drivers/misc/lkdtm.c @@ -354,6 +354,7 @@ static void lkdtm_do_action(enum ctype which) static void lkdtm_handler(void) { unsigned long flags; + bool do_it = false; spin_lock_irqsave(&count_lock, flags); count--; @@ -361,10 +362,13 @@ static void lkdtm_handler(void) cp_name_to_str(cpoint), cp_type_to_str(cptype), count); if (count == 0) { - lkdtm_do_action(cptype); + do_it = true; count = cpoint_count; } spin_unlock_irqrestore(&count_lock, flags); + + if (do_it) + lkdtm_do_action(cptype); } static int lkdtm_register_cpoint(enum cname which) diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c index 947faa5d2ce4..efdb81d21c44 100644 --- a/drivers/mmc/host/at91_mci.c +++ b/drivers/mmc/host/at91_mci.c @@ -86,7 +86,6 @@ static inline int at91mci_is_mci1rev2xx(void) { return ( cpu_is_at91sam9260() || cpu_is_at91sam9263() - || cpu_is_at91cap9() || cpu_is_at91sam9rl() || cpu_is_at91sam9g10() || cpu_is_at91sam9g20() diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 0d955ffaf44e..304f2f98b680 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1325,7 +1325,7 @@ static int __devinit mmci_probe(struct amba_device *dev, if (ret) goto unmap; - if (dev->irq[1] == NO_IRQ) + if (dev->irq[1] == NO_IRQ || !dev->irq[1]) host->singleirq = true; else { ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 6ae9ca01388b..9a9ce71a71fc 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -119,7 +119,7 @@ static int mtd_cls_suspend(struct device *dev, pm_message_t state) { struct mtd_info *mtd = dev_get_drvdata(dev); - return mtd_suspend(mtd); + return mtd ? mtd_suspend(mtd) : 0; } static int mtd_cls_resume(struct device *dev) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 4dd056e2e16a..35b4fb55dbd6 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -161,6 +161,37 @@ static int atmel_nand_device_ready(struct mtd_info *mtd) !!host->board->rdy_pin_active_low; } +/* + * Minimal-overhead PIO for data access. + */ +static void atmel_read_buf8(struct mtd_info *mtd, u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_readsb(nand_chip->IO_ADDR_R, buf, len); +} + +static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2); +} + +static void atmel_write_buf8(struct mtd_info *mtd, const u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_writesb(nand_chip->IO_ADDR_W, buf, len); +} + +static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2); +} + static void dma_complete_func(void *completion) { complete(completion); @@ -235,27 +266,33 @@ err_buf: static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len) { struct nand_chip *chip = mtd->priv; + struct atmel_nand_host *host = chip->priv; if (use_dma && len > mtd->oobsize) /* only use DMA for bigger than oob size: better performances */ if (atmel_nand_dma_op(mtd, buf, len, 1) == 0) return; - /* if no DMA operation possible, use PIO */ - memcpy_fromio(buf, chip->IO_ADDR_R, len); + if (host->board->bus_width_16) + atmel_read_buf16(mtd, buf, len); + else + atmel_read_buf8(mtd, buf, len); } static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) { struct nand_chip *chip = mtd->priv; + struct atmel_nand_host *host = chip->priv; if (use_dma && len > mtd->oobsize) /* only use DMA for bigger than oob size: better performances */ if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) == 0) return; - /* if no DMA operation possible, use PIO */ - memcpy_toio(chip->IO_ADDR_W, buf, len); + if (host->board->bus_width_16) + atmel_write_buf16(mtd, buf, len); + else + atmel_write_buf8(mtd, buf, len); } /* diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c index 7f680420bfab..7db6555ed3ba 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c @@ -69,17 +69,19 @@ static int clear_poll_bit(void __iomem *addr, u32 mask) * [1] enable the module. * [2] reset the module. * - * In most of the cases, it's ok. But there is a hardware bug in the BCH block. + * In most of the cases, it's ok. + * But in MX23, there is a hardware bug in the BCH block (see erratum #2847). * If you try to soft reset the BCH block, it becomes unusable until * the next hard reset. This case occurs in the NAND boot mode. When the board * boots by NAND, the ROM of the chip will initialize the BCH blocks itself. * So If the driver tries to reset the BCH again, the BCH will not work anymore. - * You will see a DMA timeout in this case. + * You will see a DMA timeout in this case. The bug has been fixed + * in the following chips, such as MX28. * * To avoid this bug, just add a new parameter `just_enable` for * the mxs_reset_block(), and rewrite it here. */ -int gpmi_reset_block(void __iomem *reset_addr, bool just_enable) +static int gpmi_reset_block(void __iomem *reset_addr, bool just_enable) { int ret; int timeout = 0x400; @@ -206,7 +208,15 @@ int bch_set_geometry(struct gpmi_nand_data *this) if (ret) goto err_out; - ret = gpmi_reset_block(r->bch_regs, true); + /* + * Due to erratum #2847 of the MX23, the BCH cannot be soft reset on this + * chip, otherwise it will lock up. So we skip resetting BCH on the MX23. + * On the other hand, the MX28 needs the reset, because one case has been + * seen where the BCH produced ECC errors constantly after 10000 + * consecutive reboots. The latter case has not been seen on the MX23 yet, + * still we don't know if it could happen there as well. + */ + ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this)); if (ret) goto err_out; diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 35b4565050f1..8a393f9e6027 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2588,7 +2588,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, instr->state = MTD_ERASING; while (len) { - /* Heck if we have a bad block, we do not erase bad blocks! */ + /* Check if we have a bad block, we do not erase bad blocks! */ if (nand_block_checkbad(mtd, ((loff_t) page) << chip->page_shift, 0, allowbbt)) { pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 63b3ec48c203..cae9477a6ed3 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -253,7 +253,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node, if (!of_device_is_available(node)) return NULL; - dev = kzalloc(sizeof(*dev), GFP_KERNEL); + dev = amba_device_alloc(NULL, 0, 0); if (!dev) return NULL; @@ -283,14 +283,14 @@ static struct amba_device *of_amba_device_create(struct device_node *node, if (ret) goto err_free; - ret = amba_device_register(dev, &iomem_resource); + ret = amba_device_add(dev, &iomem_resource); if (ret) goto err_free; return dev; err_free: - kfree(dev); + amba_device_put(dev); return NULL; } #else /* CONFIG_ARM_AMBA */ diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c index 4902206f53d9..1dd68f502634 100644 --- a/drivers/pcmcia/at91_cf.c +++ b/drivers/pcmcia/at91_cf.c @@ -26,6 +26,7 @@ #include <mach/board.h> #include <mach/at91rm9200_mc.h> +#include <mach/at91_ramc.h> /* @@ -156,7 +157,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) /* * Use 16 bit accesses unless/until we need 8-bit i/o space. */ - csr = at91_sys_read(AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW; + csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW; /* * NOTE: this CF controller ignores IOIS16, so we can't really do @@ -175,7 +176,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) csr |= AT91_SMC_DBW_16; pr_debug("%s: 16bit i/o bus\n", driver_name); } - at91_sys_write(AT91_SMC_CSR(cf->board->chipselect), csr); + at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr); io->start = cf->socket.io_offset; io->stop = io->start + SZ_2K - 1; diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c index 749c2a16012c..1932029de48d 100644 --- a/drivers/pcmcia/ds.c +++ b/drivers/pcmcia/ds.c @@ -1269,10 +1269,8 @@ static int pcmcia_bus_add(struct pcmcia_socket *skt) static int pcmcia_bus_early_resume(struct pcmcia_socket *skt) { - if (!verify_cis_cache(skt)) { - pcmcia_put_socket(skt); + if (!verify_cis_cache(skt)) return 0; - } dev_dbg(&skt->dev, "cis mismatch - different card\n"); diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index a3ad957507dc..729fb843a2fc 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c @@ -57,6 +57,7 @@ struct sam9_rtc { void __iomem *rtt; struct rtc_device *rtcdev; u32 imr; + void __iomem *gpbr; }; #define rtt_readl(rtc, field) \ @@ -65,9 +66,9 @@ struct sam9_rtc { __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field) #define gpbr_readl(rtc) \ - at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR) + __raw_readl((rtc)->gpbr) #define gpbr_writel(rtc, val) \ - at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val)) + __raw_writel((val), (rtc)->gpbr) /* * Read current time and date in RTC @@ -287,16 +288,19 @@ static const struct rtc_class_ops at91_rtc_ops = { /* * Initialize and install RTC driver */ -static int __init at91_rtc_probe(struct platform_device *pdev) +static int __devinit at91_rtc_probe(struct platform_device *pdev) { - struct resource *r; + struct resource *r, *r_gpbr; struct sam9_rtc *rtc; int ret; u32 mr; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) + r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!r || !r_gpbr) { + dev_err(&pdev->dev, "need 2 ressources\n"); return -ENODEV; + } rtc = kzalloc(sizeof *rtc, GFP_KERNEL); if (!rtc) @@ -307,8 +311,19 @@ static int __init at91_rtc_probe(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 1); platform_set_drvdata(pdev, rtc); - rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS); - rtc->rtt += r->start; + rtc->rtt = ioremap(r->start, resource_size(r)); + if (!rtc->rtt) { + dev_err(&pdev->dev, "failed to map registers, aborting.\n"); + ret = -ENOMEM; + goto fail; + } + + rtc->gpbr = ioremap(r_gpbr->start, resource_size(r_gpbr)); + if (!rtc->gpbr) { + dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n"); + ret = -ENOMEM; + goto fail_gpbr; + } mr = rtt_readl(rtc, MR); @@ -326,7 +341,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev) &at91_rtc_ops, THIS_MODULE); if (IS_ERR(rtc->rtcdev)) { ret = PTR_ERR(rtc->rtcdev); - goto fail; + goto fail_register; } /* register irq handler after we know what name we'll use */ @@ -336,7 +351,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev) if (ret) { dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS); rtc_device_unregister(rtc->rtcdev); - goto fail; + goto fail_register; } /* NOTE: sam9260 rev A silicon has a ROM bug which resets the @@ -351,6 +366,10 @@ static int __init at91_rtc_probe(struct platform_device *pdev) return 0; +fail_register: + iounmap(rtc->gpbr); +fail_gpbr: + iounmap(rtc->rtt); fail: platform_set_drvdata(pdev, NULL); kfree(rtc); @@ -360,7 +379,7 @@ fail: /* * Disable and remove the RTC driver */ -static int __exit at91_rtc_remove(struct platform_device *pdev) +static int __devexit at91_rtc_remove(struct platform_device *pdev) { struct sam9_rtc *rtc = platform_get_drvdata(pdev); u32 mr = rtt_readl(rtc, MR); @@ -371,6 +390,8 @@ static int __exit at91_rtc_remove(struct platform_device *pdev) rtc_device_unregister(rtc->rtcdev); + iounmap(rtc->gpbr); + iounmap(rtc->rtt); platform_set_drvdata(pdev, NULL); kfree(rtc); return 0; @@ -433,63 +454,20 @@ static int at91_rtc_resume(struct platform_device *pdev) #endif static struct platform_driver at91_rtc_driver = { - .driver.name = "rtc-at91sam9", - .driver.owner = THIS_MODULE, - .remove = __exit_p(at91_rtc_remove), + .probe = at91_rtc_probe, + .remove = __devexit_p(at91_rtc_remove), .shutdown = at91_rtc_shutdown, .suspend = at91_rtc_suspend, .resume = at91_rtc_resume, + .driver = { + .name = "rtc-at91sam9", + .owner = THIS_MODULE, + }, }; -/* Chips can have more than one RTT module, and they can be used for more - * than just RTCs. So we can't just register as "the" RTT driver. - * - * A normal approach in such cases is to create a library to allocate and - * free the modules. Here we just use bus_find_device() as like such a - * library, binding directly ... no runtime "library" footprint is needed. - */ -static int __init at91_rtc_match(struct device *dev, void *v) -{ - struct platform_device *pdev = to_platform_device(dev); - int ret; - - /* continue searching if this isn't the RTT we need */ - if (strcmp("at91_rtt", pdev->name) != 0 - || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT) - goto fail; - - /* else we found it ... but fail unless we can bind to the RTC driver */ - if (dev->driver) { - dev_dbg(dev, "busy, can't use as RTC!\n"); - goto fail; - } - dev->driver = &at91_rtc_driver.driver; - if (device_attach(dev) == 0) { - dev_dbg(dev, "can't attach RTC!\n"); - goto fail; - } - ret = at91_rtc_probe(pdev); - if (ret == 0) - return true; - - dev_dbg(dev, "RTC probe err %d!\n", ret); -fail: - return false; -} - static int __init at91_rtc_init(void) { - int status; - struct device *rtc; - - status = platform_driver_register(&at91_rtc_driver); - if (status) - return status; - rtc = bus_find_device(&platform_bus_type, NULL, - NULL, at91_rtc_match); - if (!rtc) - platform_driver_unregister(&at91_rtc_driver); - return rtc ? 0 : -ENODEV; + return platform_driver_register(&at91_rtc_driver); } module_init(at91_rtc_init); diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index cb9a585312cc..398ab7a7ceca 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -30,6 +30,7 @@ #include <linux/string.h> #include <linux/pm.h> #include <linux/bitops.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3f9a47ec67dc..8293658e7cf9 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -299,7 +299,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" - depends on (ARCH_S3C64XX || ARCH_S5P64X0) + depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) select S3C64XX_DMA if ARCH_S3C64XX help SPI driver for Samsung S3C64XX and newer SoCs. diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 2a6429d8c363..10182eb50068 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -1720,7 +1720,7 @@ static int pch_spi_resume(struct pci_dev *pdev) #endif -static struct pci_driver pch_spi_pcidev = { +static struct pci_driver pch_spi_pcidev_driver = { .name = "pch_spi", .id_table = pch_spi_pcidev_id, .probe = pch_spi_probe, @@ -1736,7 +1736,7 @@ static int __init pch_spi_init(void) if (ret) return ret; - ret = pci_register_driver(&pch_spi_pcidev); + ret = pci_register_driver(&pch_spi_pcidev_driver); if (ret) return ret; @@ -1746,7 +1746,7 @@ module_init(pch_spi_init); static void __exit pch_spi_exit(void) { - pci_unregister_driver(&pch_spi_pcidev); + pci_unregister_driver(&pch_spi_pcidev_driver); platform_driver_unregister(&pch_spi_pd_driver); } module_exit(pch_spi_exit); diff --git a/drivers/staging/media/go7007/go7007-usb.c b/drivers/staging/media/go7007/go7007-usb.c index 70e006b50f29..5443e25086e9 100644 --- a/drivers/staging/media/go7007/go7007-usb.c +++ b/drivers/staging/media/go7007/go7007-usb.c @@ -1279,3 +1279,4 @@ static struct usb_driver go7007_usb_driver = { }; module_usb_driver(go7007_usb_driver); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c index ac44af165b27..44262908def5 100644 --- a/drivers/target/iscsi/iscsi_target.c +++ b/drivers/target/iscsi/iscsi_target.c @@ -1061,7 +1061,7 @@ attach_cmd: if (ret < 0) return iscsit_add_reject_from_cmd( ISCSI_REASON_BOOKMARK_NO_RESOURCES, - 1, 1, buf, cmd); + 1, 0, buf, cmd); /* * Check the CmdSN against ExpCmdSN/MaxCmdSN here if * the Immediate Bit is not set, and no Immediate @@ -3164,6 +3164,30 @@ static int iscsit_send_task_mgt_rsp( return 0; } +static bool iscsit_check_inaddr_any(struct iscsi_np *np) +{ + bool ret = false; + + if (np->np_sockaddr.ss_family == AF_INET6) { + const struct sockaddr_in6 sin6 = { + .sin6_addr = IN6ADDR_ANY_INIT }; + struct sockaddr_in6 *sock_in6 = + (struct sockaddr_in6 *)&np->np_sockaddr; + + if (!memcmp(sock_in6->sin6_addr.s6_addr, + sin6.sin6_addr.s6_addr, 16)) + ret = true; + } else { + struct sockaddr_in * sock_in = + (struct sockaddr_in *)&np->np_sockaddr; + + if (sock_in->sin_addr.s_addr == INADDR_ANY) + ret = true; + } + + return ret; +} + static int iscsit_build_sendtargets_response(struct iscsi_cmd *cmd) { char *payload = NULL; @@ -3213,12 +3237,17 @@ static int iscsit_build_sendtargets_response(struct iscsi_cmd *cmd) spin_lock(&tpg->tpg_np_lock); list_for_each_entry(tpg_np, &tpg->tpg_gnp_list, tpg_np_list) { + struct iscsi_np *np = tpg_np->tpg_np; + bool inaddr_any = iscsit_check_inaddr_any(np); + len = sprintf(buf, "TargetAddress=" "%s%s%s:%hu,%hu", - (tpg_np->tpg_np->np_sockaddr.ss_family == AF_INET6) ? - "[" : "", tpg_np->tpg_np->np_ip, - (tpg_np->tpg_np->np_sockaddr.ss_family == AF_INET6) ? - "]" : "", tpg_np->tpg_np->np_port, + (np->np_sockaddr.ss_family == AF_INET6) ? + "[" : "", (inaddr_any == false) ? + np->np_ip : conn->local_ip, + (np->np_sockaddr.ss_family == AF_INET6) ? + "]" : "", (inaddr_any == false) ? + np->np_port : conn->local_port, tpg->tpgt); len += 1; diff --git a/drivers/target/iscsi/iscsi_target_configfs.c b/drivers/target/iscsi/iscsi_target_configfs.c index 3468caab47a2..6b35b37988ed 100644 --- a/drivers/target/iscsi/iscsi_target_configfs.c +++ b/drivers/target/iscsi/iscsi_target_configfs.c @@ -21,6 +21,7 @@ #include <linux/configfs.h> #include <linux/export.h> +#include <linux/inet.h> #include <target/target_core_base.h> #include <target/target_core_fabric.h> #include <target/target_core_fabric_configfs.h> diff --git a/drivers/target/iscsi/iscsi_target_core.h b/drivers/target/iscsi/iscsi_target_core.h index f1a02dad05a0..0ec3b77a0c27 100644 --- a/drivers/target/iscsi/iscsi_target_core.h +++ b/drivers/target/iscsi/iscsi_target_core.h @@ -508,6 +508,7 @@ struct iscsi_conn { u16 cid; /* Remote TCP Port */ u16 login_port; + u16 local_port; int net_size; u32 auth_id; #define CONNFLAG_SCTP_STRUCT_FILE 0x01 @@ -527,6 +528,7 @@ struct iscsi_conn { unsigned char bad_hdr[ISCSI_HDR_LEN]; #define IPV6_ADDRESS_SPACE 48 unsigned char login_ip[IPV6_ADDRESS_SPACE]; + unsigned char local_ip[IPV6_ADDRESS_SPACE]; int conn_usage_count; int conn_waiting_on_uc; atomic_t check_immediate_queue; @@ -561,8 +563,8 @@ struct iscsi_conn { struct hash_desc conn_tx_hash; /* Used for scheduling TX and RX connection kthreads */ cpumask_var_t conn_cpumask; - int conn_rx_reset_cpumask:1; - int conn_tx_reset_cpumask:1; + unsigned int conn_rx_reset_cpumask:1; + unsigned int conn_tx_reset_cpumask:1; /* list_head of struct iscsi_cmd for this connection */ struct list_head conn_cmd_list; struct list_head immed_queue_list; diff --git a/drivers/target/iscsi/iscsi_target_erl1.c b/drivers/target/iscsi/iscsi_target_erl1.c index 255c0d67e898..27901e37c125 100644 --- a/drivers/target/iscsi/iscsi_target_erl1.c +++ b/drivers/target/iscsi/iscsi_target_erl1.c @@ -1238,7 +1238,7 @@ void iscsit_mod_dataout_timer(struct iscsi_cmd *cmd) { struct iscsi_conn *conn = cmd->conn; struct iscsi_session *sess = conn->sess; - struct iscsi_node_attrib *na = na = iscsit_tpg_get_node_attrib(sess); + struct iscsi_node_attrib *na = iscsit_tpg_get_node_attrib(sess); spin_lock_bh(&cmd->dataout_timeout_lock); if (!(cmd->dataout_timer_flags & ISCSI_TF_RUNNING)) { @@ -1261,7 +1261,7 @@ void iscsit_start_dataout_timer( struct iscsi_conn *conn) { struct iscsi_session *sess = conn->sess; - struct iscsi_node_attrib *na = na = iscsit_tpg_get_node_attrib(sess); + struct iscsi_node_attrib *na = iscsit_tpg_get_node_attrib(sess); if (cmd->dataout_timer_flags & ISCSI_TF_RUNNING) return; diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c index 373b0cc6abd8..38cb7ce8469e 100644 --- a/drivers/target/iscsi/iscsi_target_login.c +++ b/drivers/target/iscsi/iscsi_target_login.c @@ -615,8 +615,8 @@ static int iscsi_post_login_handler( } pr_debug("iSCSI Login successful on CID: %hu from %s to" - " %s:%hu,%hu\n", conn->cid, conn->login_ip, np->np_ip, - np->np_port, tpg->tpgt); + " %s:%hu,%hu\n", conn->cid, conn->login_ip, + conn->local_ip, conn->local_port, tpg->tpgt); list_add_tail(&conn->conn_list, &sess->sess_conn_list); atomic_inc(&sess->nconn); @@ -658,7 +658,8 @@ static int iscsi_post_login_handler( sess->session_state = TARG_SESS_STATE_LOGGED_IN; pr_debug("iSCSI Login successful on CID: %hu from %s to %s:%hu,%hu\n", - conn->cid, conn->login_ip, np->np_ip, np->np_port, tpg->tpgt); + conn->cid, conn->login_ip, conn->local_ip, conn->local_port, + tpg->tpgt); spin_lock_bh(&sess->conn_lock); list_add_tail(&conn->conn_list, &sess->sess_conn_list); @@ -841,6 +842,14 @@ int iscsi_target_setup_login_socket( goto fail; } + ret = kernel_setsockopt(sock, IPPROTO_IP, IP_FREEBIND, + (char *)&opt, sizeof(opt)); + if (ret < 0) { + pr_err("kernel_setsockopt() for IP_FREEBIND" + " failed\n"); + goto fail; + } + ret = kernel_bind(sock, (struct sockaddr *)&np->np_sockaddr, len); if (ret < 0) { pr_err("kernel_bind() failed: %d\n", ret); @@ -1020,6 +1029,18 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) snprintf(conn->login_ip, sizeof(conn->login_ip), "%pI6c", &sock_in6.sin6_addr.in6_u); conn->login_port = ntohs(sock_in6.sin6_port); + + if (conn->sock->ops->getname(conn->sock, + (struct sockaddr *)&sock_in6, &err, 0) < 0) { + pr_err("sock_ops->getname() failed.\n"); + iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR, + ISCSI_LOGIN_STATUS_TARGET_ERROR); + goto new_sess_out; + } + snprintf(conn->local_ip, sizeof(conn->local_ip), "%pI6c", + &sock_in6.sin6_addr.in6_u); + conn->local_port = ntohs(sock_in6.sin6_port); + } else { memset(&sock_in, 0, sizeof(struct sockaddr_in)); @@ -1032,6 +1053,16 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) } sprintf(conn->login_ip, "%pI4", &sock_in.sin_addr.s_addr); conn->login_port = ntohs(sock_in.sin_port); + + if (conn->sock->ops->getname(conn->sock, + (struct sockaddr *)&sock_in, &err, 0) < 0) { + pr_err("sock_ops->getname() failed.\n"); + iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR, + ISCSI_LOGIN_STATUS_TARGET_ERROR); + goto new_sess_out; + } + sprintf(conn->local_ip, "%pI4", &sock_in.sin_addr.s_addr); + conn->local_port = ntohs(sock_in.sin_port); } conn->network_transport = np->np_network_transport; @@ -1039,7 +1070,7 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) pr_debug("Received iSCSI login request from %s on %s Network" " Portal %s:%hu\n", conn->login_ip, (conn->network_transport == ISCSI_TCP) ? "TCP" : "SCTP", - np->np_ip, np->np_port); + conn->local_ip, conn->local_port); pr_debug("Moving to TARG_CONN_STATE_IN_LOGIN.\n"); conn->conn_state = TARG_CONN_STATE_IN_LOGIN; diff --git a/drivers/target/iscsi/iscsi_target_util.c b/drivers/target/iscsi/iscsi_target_util.c index a05ca1c4f01c..11287e1ece13 100644 --- a/drivers/target/iscsi/iscsi_target_util.c +++ b/drivers/target/iscsi/iscsi_target_util.c @@ -849,6 +849,17 @@ void iscsit_free_cmd(struct iscsi_cmd *cmd) case ISCSI_OP_SCSI_TMFUNC: transport_generic_free_cmd(&cmd->se_cmd, 1); break; + case ISCSI_OP_REJECT: + /* + * Handle special case for REJECT when iscsi_add_reject*() has + * overwritten the original iscsi_opcode assignment, and the + * associated cmd->se_cmd needs to be released. + */ + if (cmd->se_cmd.se_tfo != NULL) { + transport_generic_free_cmd(&cmd->se_cmd, 1); + break; + } + /* Fall-through */ default: iscsit_release_cmd(cmd); break; diff --git a/drivers/target/target_core_alua.c b/drivers/target/target_core_alua.c index 1b1edd14f4bf..01a2691dfb47 100644 --- a/drivers/target/target_core_alua.c +++ b/drivers/target/target_core_alua.c @@ -78,7 +78,7 @@ int target_emulate_report_target_port_groups(struct se_task *task) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); spin_lock(&su_dev->t10_alua.tg_pt_gps_lock); list_for_each_entry(tg_pt_gp, &su_dev->t10_alua.tg_pt_gps_list, @@ -163,7 +163,7 @@ int target_emulate_report_target_port_groups(struct se_task *task) buf[2] = ((rd_len >> 8) & 0xff); buf[3] = (rd_len & 0xff); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); @@ -194,7 +194,7 @@ int target_emulate_set_target_port_groups(struct se_task *task) cmd->scsi_sense_reason = TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); /* * Determine if explict ALUA via SET_TARGET_PORT_GROUPS is allowed @@ -351,7 +351,7 @@ int target_emulate_set_target_port_groups(struct se_task *task) } out: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); return 0; diff --git a/drivers/target/target_core_cdb.c b/drivers/target/target_core_cdb.c index 2f2235edefff..f3d71fa88a28 100644 --- a/drivers/target/target_core_cdb.c +++ b/drivers/target/target_core_cdb.c @@ -83,7 +83,7 @@ target_emulate_inquiry_std(struct se_cmd *cmd) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); if (dev == tpg->tpg_virt_lun0.lun_se_dev) { buf[0] = 0x3f; /* Not connected */ @@ -134,7 +134,7 @@ target_emulate_inquiry_std(struct se_cmd *cmd) buf[4] = 31; /* Set additional length to 31 */ out: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); return 0; } @@ -698,6 +698,13 @@ int target_emulate_inquiry(struct se_task *task) int p, ret; if (!(cdb[1] & 0x1)) { + if (cdb[2]) { + pr_err("INQUIRY with EVPD==0 but PAGE CODE=%02x\n", + cdb[2]); + cmd->scsi_sense_reason = TCM_INVALID_CDB_FIELD; + return -EINVAL; + } + ret = target_emulate_inquiry_std(cmd); goto out; } @@ -716,7 +723,7 @@ int target_emulate_inquiry(struct se_task *task) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = dev->transport->get_device_type(dev); @@ -729,11 +736,11 @@ int target_emulate_inquiry(struct se_task *task) } pr_err("Unknown VPD Code: 0x%02x\n", cdb[2]); - cmd->scsi_sense_reason = TCM_UNSUPPORTED_SCSI_OPCODE; + cmd->scsi_sense_reason = TCM_INVALID_CDB_FIELD; ret = -EINVAL; out_unmap: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); out: if (!ret) { task->task_scsi_status = GOOD; @@ -755,7 +762,7 @@ int target_emulate_readcapacity(struct se_task *task) else blocks = (u32)blocks_long; - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = (blocks >> 24) & 0xff; buf[1] = (blocks >> 16) & 0xff; @@ -771,7 +778,7 @@ int target_emulate_readcapacity(struct se_task *task) if (dev->se_sub_dev->se_dev_attrib.emulate_tpu || dev->se_sub_dev->se_dev_attrib.emulate_tpws) put_unaligned_be32(0xFFFFFFFF, &buf[0]); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); @@ -785,7 +792,7 @@ int target_emulate_readcapacity_16(struct se_task *task) unsigned char *buf; unsigned long long blocks = dev->transport->get_blocks(dev); - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = (blocks >> 56) & 0xff; buf[1] = (blocks >> 48) & 0xff; @@ -806,7 +813,7 @@ int target_emulate_readcapacity_16(struct se_task *task) if (dev->se_sub_dev->se_dev_attrib.emulate_tpu || dev->se_sub_dev->se_dev_attrib.emulate_tpws) buf[14] = 0x80; - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); @@ -1019,9 +1026,9 @@ int target_emulate_modesense(struct se_task *task) offset = cmd->data_length; } - rbuf = transport_kmap_first_data_page(cmd); + rbuf = transport_kmap_data_sg(cmd); memcpy(rbuf, buf, offset); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); @@ -1043,7 +1050,7 @@ int target_emulate_request_sense(struct se_task *task) return -ENOSYS; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); if (!core_scsi3_ua_clear_for_request_sense(cmd, &ua_asc, &ua_ascq)) { /* @@ -1051,11 +1058,8 @@ int target_emulate_request_sense(struct se_task *task) */ buf[0] = 0x70; buf[SPC_SENSE_KEY_OFFSET] = UNIT_ATTENTION; - /* - * Make sure request data length is enough for additional - * sense data. - */ - if (cmd->data_length <= 18) { + + if (cmd->data_length < 18) { buf[7] = 0x00; err = -EINVAL; goto end; @@ -1072,11 +1076,8 @@ int target_emulate_request_sense(struct se_task *task) */ buf[0] = 0x70; buf[SPC_SENSE_KEY_OFFSET] = NO_SENSE; - /* - * Make sure request data length is enough for additional - * sense data. - */ - if (cmd->data_length <= 18) { + + if (cmd->data_length < 18) { buf[7] = 0x00; err = -EINVAL; goto end; @@ -1089,7 +1090,7 @@ int target_emulate_request_sense(struct se_task *task) } end: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); task->task_scsi_status = GOOD; transport_complete_task(task, 1); return 0; @@ -1123,7 +1124,7 @@ int target_emulate_unmap(struct se_task *task) dl = get_unaligned_be16(&cdb[0]); bd_dl = get_unaligned_be16(&cdb[2]); - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); ptr = &buf[offset]; pr_debug("UNMAP: Sub: %s Using dl: %hu bd_dl: %hu size: %hu" @@ -1147,7 +1148,7 @@ int target_emulate_unmap(struct se_task *task) } err: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); if (!ret) { task->task_scsi_status = GOOD; transport_complete_task(task, 1); diff --git a/drivers/target/target_core_configfs.c b/drivers/target/target_core_configfs.c index 0955bb8979fb..6e043eeb1db9 100644 --- a/drivers/target/target_core_configfs.c +++ b/drivers/target/target_core_configfs.c @@ -1704,13 +1704,15 @@ static ssize_t target_core_store_dev_alias( return -EINVAL; } - se_dev->su_dev_flags |= SDF_USING_ALIAS; read_bytes = snprintf(&se_dev->se_dev_alias[0], SE_DEV_ALIAS_LEN, "%s", page); - + if (!read_bytes) + return -EINVAL; if (se_dev->se_dev_alias[read_bytes - 1] == '\n') se_dev->se_dev_alias[read_bytes - 1] = '\0'; + se_dev->su_dev_flags |= SDF_USING_ALIAS; + pr_debug("Target_Core_ConfigFS: %s/%s set alias: %s\n", config_item_name(&hba->hba_group.cg_item), config_item_name(&se_dev->se_dev_group.cg_item), @@ -1753,13 +1755,15 @@ static ssize_t target_core_store_dev_udev_path( return -EINVAL; } - se_dev->su_dev_flags |= SDF_USING_UDEV_PATH; read_bytes = snprintf(&se_dev->se_dev_udev_path[0], SE_UDEV_PATH_LEN, "%s", page); - + if (!read_bytes) + return -EINVAL; if (se_dev->se_dev_udev_path[read_bytes - 1] == '\n') se_dev->se_dev_udev_path[read_bytes - 1] = '\0'; + se_dev->su_dev_flags |= SDF_USING_UDEV_PATH; + pr_debug("Target_Core_ConfigFS: %s/%s set udev_path: %s\n", config_item_name(&hba->hba_group.cg_item), config_item_name(&se_dev->se_dev_group.cg_item), diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c index 0c5992f0d946..edbcabbf85f7 100644 --- a/drivers/target/target_core_device.c +++ b/drivers/target/target_core_device.c @@ -320,11 +320,12 @@ int core_free_device_list_for_node( void core_dec_lacl_count(struct se_node_acl *se_nacl, struct se_cmd *se_cmd) { struct se_dev_entry *deve; + unsigned long flags; - spin_lock_irq(&se_nacl->device_list_lock); + spin_lock_irqsave(&se_nacl->device_list_lock, flags); deve = &se_nacl->device_list[se_cmd->orig_fe_lun]; deve->deve_cmds--; - spin_unlock_irq(&se_nacl->device_list_lock); + spin_unlock_irqrestore(&se_nacl->device_list_lock, flags); } void core_update_device_list_access( @@ -656,7 +657,7 @@ int target_report_luns(struct se_task *se_task) unsigned char *buf; u32 cdb_offset = 0, lun_count = 0, offset = 8, i; - buf = transport_kmap_first_data_page(se_cmd); + buf = (unsigned char *) transport_kmap_data_sg(se_cmd); /* * If no struct se_session pointer is present, this struct se_cmd is @@ -694,7 +695,7 @@ int target_report_luns(struct se_task *se_task) * See SPC3 r07, page 159. */ done: - transport_kunmap_first_data_page(se_cmd); + transport_kunmap_data_sg(se_cmd); lun_count *= 8; buf[0] = ((lun_count >> 24) & 0xff); buf[1] = ((lun_count >> 16) & 0xff); @@ -1294,24 +1295,26 @@ struct se_lun *core_dev_add_lun( { struct se_lun *lun_p; u32 lun_access = 0; + int rc; if (atomic_read(&dev->dev_access_obj.obj_access_count) != 0) { pr_err("Unable to export struct se_device while dev_access_obj: %d\n", atomic_read(&dev->dev_access_obj.obj_access_count)); - return NULL; + return ERR_PTR(-EACCES); } lun_p = core_tpg_pre_addlun(tpg, lun); - if ((IS_ERR(lun_p)) || !lun_p) - return NULL; + if (IS_ERR(lun_p)) + return lun_p; if (dev->dev_flags & DF_READ_ONLY) lun_access = TRANSPORT_LUNFLAGS_READ_ONLY; else lun_access = TRANSPORT_LUNFLAGS_READ_WRITE; - if (core_tpg_post_addlun(tpg, lun_p, lun_access, dev) < 0) - return NULL; + rc = core_tpg_post_addlun(tpg, lun_p, lun_access, dev); + if (rc < 0) + return ERR_PTR(rc); pr_debug("%s_TPG[%u]_LUN[%u] - Activated %s Logical Unit from" " CORE HBA: %u\n", tpg->se_tpg_tfo->get_fabric_name(), @@ -1348,11 +1351,10 @@ int core_dev_del_lun( u32 unpacked_lun) { struct se_lun *lun; - int ret = 0; - lun = core_tpg_pre_dellun(tpg, unpacked_lun, &ret); - if (!lun) - return ret; + lun = core_tpg_pre_dellun(tpg, unpacked_lun); + if (IS_ERR(lun)) + return PTR_ERR(lun); core_tpg_post_dellun(tpg, lun); diff --git a/drivers/target/target_core_fabric_configfs.c b/drivers/target/target_core_fabric_configfs.c index 4f77cce22646..9a2ce11e1a6e 100644 --- a/drivers/target/target_core_fabric_configfs.c +++ b/drivers/target/target_core_fabric_configfs.c @@ -766,9 +766,9 @@ static int target_fabric_port_link( lun_p = core_dev_add_lun(se_tpg, dev->se_hba, dev, lun->unpacked_lun); - if (IS_ERR(lun_p) || !lun_p) { + if (IS_ERR(lun_p)) { pr_err("core_dev_add_lun() failed\n"); - ret = -EINVAL; + ret = PTR_ERR(lun_p); goto out; } diff --git a/drivers/target/target_core_iblock.c b/drivers/target/target_core_iblock.c index cc8e6b58ef20..8572eae62da7 100644 --- a/drivers/target/target_core_iblock.c +++ b/drivers/target/target_core_iblock.c @@ -129,7 +129,7 @@ static struct se_device *iblock_create_virtdevice( /* * These settings need to be made tunable.. */ - ib_dev->ibd_bio_set = bioset_create(32, 64); + ib_dev->ibd_bio_set = bioset_create(32, 0); if (!ib_dev->ibd_bio_set) { pr_err("IBLOCK: Unable to create bioset()\n"); return ERR_PTR(-ENOMEM); @@ -181,7 +181,7 @@ static struct se_device *iblock_create_virtdevice( */ dev->se_sub_dev->se_dev_attrib.max_unmap_block_desc_count = 1; dev->se_sub_dev->se_dev_attrib.unmap_granularity = - q->limits.discard_granularity; + q->limits.discard_granularity >> 9; dev->se_sub_dev->se_dev_attrib.unmap_granularity_alignment = q->limits.discard_alignment; @@ -488,6 +488,13 @@ iblock_get_bio(struct se_task *task, sector_t lba, u32 sg_num) struct iblock_req *ib_req = IBLOCK_REQ(task); struct bio *bio; + /* + * Only allocate as many vector entries as the bio code allows us to, + * we'll loop later on until we have handled the whole request. + */ + if (sg_num > BIO_MAX_PAGES) + sg_num = BIO_MAX_PAGES; + bio = bio_alloc_bioset(GFP_NOIO, sg_num, ib_dev->ibd_bio_set); if (!bio) { pr_err("Unable to allocate memory for bio\n"); diff --git a/drivers/target/target_core_internal.h b/drivers/target/target_core_internal.h index 26f135e94f6e..45001364788a 100644 --- a/drivers/target/target_core_internal.h +++ b/drivers/target/target_core_internal.h @@ -90,7 +90,7 @@ void core_tpg_wait_for_nacl_pr_ref(struct se_node_acl *); struct se_lun *core_tpg_pre_addlun(struct se_portal_group *, u32); int core_tpg_post_addlun(struct se_portal_group *, struct se_lun *, u32, void *); -struct se_lun *core_tpg_pre_dellun(struct se_portal_group *, u32, int *); +struct se_lun *core_tpg_pre_dellun(struct se_portal_group *, u32 unpacked_lun); int core_tpg_post_dellun(struct se_portal_group *, struct se_lun *); /* target_core_transport.c */ diff --git a/drivers/target/target_core_pr.c b/drivers/target/target_core_pr.c index 429ad7291664..b7c779389eea 100644 --- a/drivers/target/target_core_pr.c +++ b/drivers/target/target_core_pr.c @@ -478,6 +478,7 @@ static int core_scsi3_pr_seq_non_holder( case READ_MEDIA_SERIAL_NUMBER: case REPORT_LUNS: case REQUEST_SENSE: + case PERSISTENT_RESERVE_IN: ret = 0; /*/ Allowed CDBs */ break; default: @@ -1534,7 +1535,7 @@ static int core_scsi3_decode_spec_i_port( tidh_new->dest_local_nexus = 1; list_add_tail(&tidh_new->dest_list, &tid_dest_list); - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); /* * For a PERSISTENT RESERVE OUT specify initiator ports payload, * first extract TransportID Parameter Data Length, and make sure @@ -1785,7 +1786,7 @@ static int core_scsi3_decode_spec_i_port( } - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); /* * Go ahead and create a registrations from tid_dest_list for the @@ -1833,7 +1834,7 @@ static int core_scsi3_decode_spec_i_port( return 0; out: - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); /* * For the failure case, release everything from tid_dest_list * including *dest_pr_reg and the configfs dependances.. @@ -3120,7 +3121,7 @@ static int core_scsi3_pro_preempt( if (!calling_it_nexus) core_scsi3_ua_allocate(pr_reg_nacl, pr_res_mapped_lun, 0x2A, - ASCQ_2AH_RESERVATIONS_PREEMPTED); + ASCQ_2AH_REGISTRATIONS_PREEMPTED); } spin_unlock(&pr_tmpl->registration_lock); /* @@ -3233,7 +3234,7 @@ static int core_scsi3_pro_preempt( * additional sense code set to REGISTRATIONS PREEMPTED; */ core_scsi3_ua_allocate(pr_reg_nacl, pr_res_mapped_lun, 0x2A, - ASCQ_2AH_RESERVATIONS_PREEMPTED); + ASCQ_2AH_REGISTRATIONS_PREEMPTED); } spin_unlock(&pr_tmpl->registration_lock); /* @@ -3410,14 +3411,14 @@ static int core_scsi3_emulate_pro_register_and_move( * will be moved to for the TransportID containing SCSI initiator WWN * information. */ - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); rtpi = (buf[18] & 0xff) << 8; rtpi |= buf[19] & 0xff; tid_len = (buf[20] & 0xff) << 24; tid_len |= (buf[21] & 0xff) << 16; tid_len |= (buf[22] & 0xff) << 8; tid_len |= buf[23] & 0xff; - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); buf = NULL; if ((tid_len + 24) != cmd->data_length) { @@ -3469,7 +3470,7 @@ static int core_scsi3_emulate_pro_register_and_move( return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); proto_ident = (buf[24] & 0x0f); #if 0 pr_debug("SPC-3 PR REGISTER_AND_MOVE: Extracted Protocol Identifier:" @@ -3503,7 +3504,7 @@ static int core_scsi3_emulate_pro_register_and_move( goto out; } - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); buf = NULL; pr_debug("SPC-3 PR [%s] Extracted initiator %s identifier: %s" @@ -3768,13 +3769,13 @@ after_iport_check: " REGISTER_AND_MOVE\n"); } - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); core_scsi3_put_pr_reg(dest_pr_reg); return 0; out: if (buf) - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); if (dest_se_deve) core_scsi3_lunacl_undepend_item(dest_se_deve); if (dest_node_acl) @@ -3848,7 +3849,7 @@ int target_scsi3_emulate_pr_out(struct se_task *task) scope = (cdb[2] & 0xf0); type = (cdb[2] & 0x0f); - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); /* * From PERSISTENT_RESERVE_OUT parameter list (payload) */ @@ -3866,7 +3867,7 @@ int target_scsi3_emulate_pr_out(struct se_task *task) aptpl = (buf[17] & 0x01); unreg = (buf[17] & 0x02); } - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); buf = NULL; /* @@ -3966,7 +3967,7 @@ static int core_scsi3_pri_read_keys(struct se_cmd *cmd) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = ((su_dev->t10_pr.pr_generation >> 24) & 0xff); buf[1] = ((su_dev->t10_pr.pr_generation >> 16) & 0xff); buf[2] = ((su_dev->t10_pr.pr_generation >> 8) & 0xff); @@ -4000,7 +4001,7 @@ static int core_scsi3_pri_read_keys(struct se_cmd *cmd) buf[6] = ((add_len >> 8) & 0xff); buf[7] = (add_len & 0xff); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); return 0; } @@ -4026,7 +4027,7 @@ static int core_scsi3_pri_read_reservation(struct se_cmd *cmd) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = ((su_dev->t10_pr.pr_generation >> 24) & 0xff); buf[1] = ((su_dev->t10_pr.pr_generation >> 16) & 0xff); buf[2] = ((su_dev->t10_pr.pr_generation >> 8) & 0xff); @@ -4085,7 +4086,7 @@ static int core_scsi3_pri_read_reservation(struct se_cmd *cmd) err: spin_unlock(&se_dev->dev_reservation_lock); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); return 0; } @@ -4109,7 +4110,7 @@ static int core_scsi3_pri_report_capabilities(struct se_cmd *cmd) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = ((add_len << 8) & 0xff); buf[1] = (add_len & 0xff); @@ -4141,7 +4142,7 @@ static int core_scsi3_pri_report_capabilities(struct se_cmd *cmd) buf[4] |= 0x02; /* PR_TYPE_WRITE_EXCLUSIVE */ buf[5] |= 0x01; /* PR_TYPE_EXCLUSIVE_ACCESS_ALLREG */ - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); return 0; } @@ -4171,7 +4172,7 @@ static int core_scsi3_pri_read_full_status(struct se_cmd *cmd) return -EINVAL; } - buf = transport_kmap_first_data_page(cmd); + buf = transport_kmap_data_sg(cmd); buf[0] = ((su_dev->t10_pr.pr_generation >> 24) & 0xff); buf[1] = ((su_dev->t10_pr.pr_generation >> 16) & 0xff); @@ -4292,7 +4293,7 @@ static int core_scsi3_pri_read_full_status(struct se_cmd *cmd) buf[6] = ((add_len >> 8) & 0xff); buf[7] = (add_len & 0xff); - transport_kunmap_first_data_page(cmd); + transport_kunmap_data_sg(cmd); return 0; } diff --git a/drivers/target/target_core_pscsi.c b/drivers/target/target_core_pscsi.c index d35467d42e12..8d4def30e9e8 100644 --- a/drivers/target/target_core_pscsi.c +++ b/drivers/target/target_core_pscsi.c @@ -693,7 +693,7 @@ static int pscsi_transport_complete(struct se_task *task) if (task->task_se_cmd->se_deve->lun_flags & TRANSPORT_LUNFLAGS_READ_ONLY) { - unsigned char *buf = transport_kmap_first_data_page(task->task_se_cmd); + unsigned char *buf = transport_kmap_data_sg(task->task_se_cmd); if (cdb[0] == MODE_SENSE_10) { if (!(buf[3] & 0x80)) @@ -703,7 +703,7 @@ static int pscsi_transport_complete(struct se_task *task) buf[2] |= 0x80; } - transport_kunmap_first_data_page(task->task_se_cmd); + transport_kunmap_data_sg(task->task_se_cmd); } } after_mode_sense: diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c index b7668029bb31..06336ecd872d 100644 --- a/drivers/target/target_core_tpg.c +++ b/drivers/target/target_core_tpg.c @@ -807,8 +807,7 @@ static void core_tpg_shutdown_lun( struct se_lun *core_tpg_pre_dellun( struct se_portal_group *tpg, - u32 unpacked_lun, - int *ret) + u32 unpacked_lun) { struct se_lun *lun; diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index d3ddd1361949..58cea07b12fb 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c @@ -1255,32 +1255,34 @@ static void core_setup_task_attr_emulation(struct se_device *dev) static void scsi_dump_inquiry(struct se_device *dev) { struct t10_wwn *wwn = &dev->se_sub_dev->t10_wwn; + char buf[17]; int i, device_type; /* * Print Linux/SCSI style INQUIRY formatting to the kernel ring buffer */ - pr_debug(" Vendor: "); for (i = 0; i < 8; i++) if (wwn->vendor[i] >= 0x20) - pr_debug("%c", wwn->vendor[i]); + buf[i] = wwn->vendor[i]; else - pr_debug(" "); + buf[i] = ' '; + buf[i] = '\0'; + pr_debug(" Vendor: %s\n", buf); - pr_debug(" Model: "); for (i = 0; i < 16; i++) if (wwn->model[i] >= 0x20) - pr_debug("%c", wwn->model[i]); + buf[i] = wwn->model[i]; else - pr_debug(" "); + buf[i] = ' '; + buf[i] = '\0'; + pr_debug(" Model: %s\n", buf); - pr_debug(" Revision: "); for (i = 0; i < 4; i++) if (wwn->revision[i] >= 0x20) - pr_debug("%c", wwn->revision[i]); + buf[i] = wwn->revision[i]; else - pr_debug(" "); - - pr_debug("\n"); + buf[i] = ' '; + buf[i] = '\0'; + pr_debug(" Revision: %s\n", buf); device_type = dev->transport->get_device_type(dev); pr_debug(" Type: %s ", scsi_device_type(device_type)); @@ -1655,7 +1657,7 @@ EXPORT_SYMBOL(transport_handle_cdb_direct); * This may only be called from process context, and also currently * assumes internal allocation of fabric payload buffer by target-core. **/ -int target_submit_cmd(struct se_cmd *se_cmd, struct se_session *se_sess, +void target_submit_cmd(struct se_cmd *se_cmd, struct se_session *se_sess, unsigned char *cdb, unsigned char *sense, u32 unpacked_lun, u32 data_length, int task_attr, int data_dir, int flags) { @@ -1688,15 +1690,21 @@ int target_submit_cmd(struct se_cmd *se_cmd, struct se_session *se_sess, /* * Locate se_lun pointer and attach it to struct se_cmd */ - if (transport_lookup_cmd_lun(se_cmd, unpacked_lun) < 0) - goto out_check_cond; + if (transport_lookup_cmd_lun(se_cmd, unpacked_lun) < 0) { + transport_send_check_condition_and_sense(se_cmd, + se_cmd->scsi_sense_reason, 0); + target_put_sess_cmd(se_sess, se_cmd); + return; + } /* * Sanitize CDBs via transport_generic_cmd_sequencer() and * allocate the necessary tasks to complete the received CDB+data */ rc = transport_generic_allocate_tasks(se_cmd, cdb); - if (rc != 0) - goto out_check_cond; + if (rc != 0) { + transport_generic_request_failure(se_cmd); + return; + } /* * Dispatch se_cmd descriptor to se_lun->lun_se_dev backend * for immediate execution of READs, otherwise wait for @@ -1704,12 +1712,7 @@ int target_submit_cmd(struct se_cmd *se_cmd, struct se_session *se_sess, * when fabric has filled the incoming buffer. */ transport_handle_cdb_direct(se_cmd); - return 0; - -out_check_cond: - transport_send_check_condition_and_sense(se_cmd, - se_cmd->scsi_sense_reason, 0); - return 0; + return; } EXPORT_SYMBOL(target_submit_cmd); @@ -2694,7 +2697,7 @@ static int transport_generic_cmd_sequencer( cmd->se_cmd_flags |= SCF_SCSI_CONTROL_SG_IO_CDB; if (target_check_write_same_discard(&cdb[10], dev) < 0) - goto out_invalid_cdb_field; + goto out_unsupported_cdb; if (!passthrough) cmd->execute_task = target_emulate_write_same; break; @@ -2977,7 +2980,7 @@ static int transport_generic_cmd_sequencer( cmd->se_cmd_flags |= SCF_SCSI_CONTROL_SG_IO_CDB; if (target_check_write_same_discard(&cdb[1], dev) < 0) - goto out_invalid_cdb_field; + goto out_unsupported_cdb; if (!passthrough) cmd->execute_task = target_emulate_write_same; break; @@ -3000,7 +3003,7 @@ static int transport_generic_cmd_sequencer( * of byte 1 bit 3 UNMAP instead of original reserved field */ if (target_check_write_same_discard(&cdb[1], dev) < 0) - goto out_invalid_cdb_field; + goto out_unsupported_cdb; if (!passthrough) cmd->execute_task = target_emulate_write_same; break; @@ -3082,11 +3085,6 @@ static int transport_generic_cmd_sequencer( (cmd->se_cmd_flags & SCF_SCSI_DATA_SG_IO_CDB))) goto out_unsupported_cdb; - /* Let's limit control cdbs to a page, for simplicity's sake. */ - if ((cmd->se_cmd_flags & SCF_SCSI_CONTROL_SG_IO_CDB) && - size > PAGE_SIZE) - goto out_invalid_cdb_field; - transport_set_supported_SAM_opcode(cmd); return ret; @@ -3490,9 +3488,11 @@ int transport_generic_map_mem_to_cmd( } EXPORT_SYMBOL(transport_generic_map_mem_to_cmd); -void *transport_kmap_first_data_page(struct se_cmd *cmd) +void *transport_kmap_data_sg(struct se_cmd *cmd) { struct scatterlist *sg = cmd->t_data_sg; + struct page **pages; + int i; BUG_ON(!sg); /* @@ -3500,15 +3500,41 @@ void *transport_kmap_first_data_page(struct se_cmd *cmd) * tcm_loop who may be using a contig buffer from the SCSI midlayer for * control CDBs passed as SGLs via transport_generic_map_mem_to_cmd() */ - return kmap(sg_page(sg)) + sg->offset; + if (!cmd->t_data_nents) + return NULL; + else if (cmd->t_data_nents == 1) + return kmap(sg_page(sg)) + sg->offset; + + /* >1 page. use vmap */ + pages = kmalloc(sizeof(*pages) * cmd->t_data_nents, GFP_KERNEL); + if (!pages) + return NULL; + + /* convert sg[] to pages[] */ + for_each_sg(cmd->t_data_sg, sg, cmd->t_data_nents, i) { + pages[i] = sg_page(sg); + } + + cmd->t_data_vmap = vmap(pages, cmd->t_data_nents, VM_MAP, PAGE_KERNEL); + kfree(pages); + if (!cmd->t_data_vmap) + return NULL; + + return cmd->t_data_vmap + cmd->t_data_sg[0].offset; } -EXPORT_SYMBOL(transport_kmap_first_data_page); +EXPORT_SYMBOL(transport_kmap_data_sg); -void transport_kunmap_first_data_page(struct se_cmd *cmd) +void transport_kunmap_data_sg(struct se_cmd *cmd) { - kunmap(sg_page(cmd->t_data_sg)); + if (!cmd->t_data_nents) + return; + else if (cmd->t_data_nents == 1) + kunmap(sg_page(cmd->t_data_sg)); + + vunmap(cmd->t_data_vmap); + cmd->t_data_vmap = NULL; } -EXPORT_SYMBOL(transport_kunmap_first_data_page); +EXPORT_SYMBOL(transport_kunmap_data_sg); static int transport_generic_get_mem(struct se_cmd *cmd) @@ -3516,6 +3542,7 @@ transport_generic_get_mem(struct se_cmd *cmd) u32 length = cmd->data_length; unsigned int nents; struct page *page; + gfp_t zero_flag; int i = 0; nents = DIV_ROUND_UP(length, PAGE_SIZE); @@ -3526,9 +3553,11 @@ transport_generic_get_mem(struct se_cmd *cmd) cmd->t_data_nents = nents; sg_init_table(cmd->t_data_sg, nents); + zero_flag = cmd->se_cmd_flags & SCF_SCSI_DATA_SG_IO_CDB ? 0 : __GFP_ZERO; + while (length) { u32 page_len = min_t(u32, length, PAGE_SIZE); - page = alloc_page(GFP_KERNEL | __GFP_ZERO); + page = alloc_page(GFP_KERNEL | zero_flag); if (!page) goto out; @@ -3756,6 +3785,11 @@ transport_allocate_control_task(struct se_cmd *cmd) struct se_task *task; unsigned long flags; + /* Workaround for handling zero-length control CDBs */ + if ((cmd->se_cmd_flags & SCF_SCSI_CONTROL_SG_IO_CDB) && + !cmd->data_length) + return 0; + task = transport_generic_get_task(cmd, cmd->data_direction); if (!task) return -ENOMEM; @@ -3827,6 +3861,14 @@ int transport_generic_new_cmd(struct se_cmd *cmd) else if (!task_cdbs && (cmd->se_cmd_flags & SCF_SCSI_DATA_SG_IO_CDB)) { cmd->t_state = TRANSPORT_COMPLETE; atomic_set(&cmd->t_transport_active, 1); + + if (cmd->t_task_cdb[0] == REQUEST_SENSE) { + u8 ua_asc = 0, ua_ascq = 0; + + core_scsi3_ua_clear_for_request_sense(cmd, + &ua_asc, &ua_ascq); + } + INIT_WORK(&cmd->work, target_complete_ok_work); queue_work(target_completion_wq, &cmd->work); return 0; @@ -4448,8 +4490,8 @@ int transport_send_check_condition_and_sense( /* CURRENT ERROR */ buffer[offset] = 0x70; buffer[offset+SPC_ADD_SENSE_LEN_OFFSET] = 10; - /* ABORTED COMMAND */ - buffer[offset+SPC_SENSE_KEY_OFFSET] = ABORTED_COMMAND; + /* ILLEGAL REQUEST */ + buffer[offset+SPC_SENSE_KEY_OFFSET] = ILLEGAL_REQUEST; /* INVALID FIELD IN CDB */ buffer[offset+SPC_ASC_KEY_OFFSET] = 0x24; break; @@ -4457,8 +4499,8 @@ int transport_send_check_condition_and_sense( /* CURRENT ERROR */ buffer[offset] = 0x70; buffer[offset+SPC_ADD_SENSE_LEN_OFFSET] = 10; - /* ABORTED COMMAND */ - buffer[offset+SPC_SENSE_KEY_OFFSET] = ABORTED_COMMAND; + /* ILLEGAL REQUEST */ + buffer[offset+SPC_SENSE_KEY_OFFSET] = ILLEGAL_REQUEST; /* INVALID FIELD IN PARAMETER LIST */ buffer[offset+SPC_ASC_KEY_OFFSET] = 0x26; break; diff --git a/drivers/target/tcm_fc/tfc_cmd.c b/drivers/target/tcm_fc/tfc_cmd.c index addc18f727ea..9e7e26c74c79 100644 --- a/drivers/target/tcm_fc/tfc_cmd.c +++ b/drivers/target/tcm_fc/tfc_cmd.c @@ -540,7 +540,6 @@ static void ft_send_work(struct work_struct *work) int data_dir = 0; u32 data_len; int task_attr; - int ret; fcp = fc_frame_payload_get(cmd->req_frame, sizeof(*fcp)); if (!fcp) @@ -603,14 +602,10 @@ static void ft_send_work(struct work_struct *work) * Use a single se_cmd->cmd_kref as we expect to release se_cmd * directly from ft_check_stop_free callback in response path. */ - ret = target_submit_cmd(&cmd->se_cmd, cmd->sess->se_sess, cmd->cdb, + target_submit_cmd(&cmd->se_cmd, cmd->sess->se_sess, cmd->cdb, &cmd->ft_sense_buffer[0], cmd->lun, data_len, task_attr, data_dir, 0); - pr_debug("r_ctl %x alloc target_submit_cmd %d\n", fh->fh_r_ctl, ret); - if (ret < 0) { - ft_dump_cmd(cmd, __func__); - return; - } + pr_debug("r_ctl %x alloc target_submit_cmd\n", fh->fh_r_ctl); return; err: diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 10605ecc99ab..f9a6be7a9bed 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -1526,6 +1526,8 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns) atmel_pops.set_wake = fns->set_wake; } +struct platform_device *atmel_default_console_device; /* the serial console device */ + #ifdef CONFIG_SERIAL_ATMEL_CONSOLE static void atmel_console_putchar(struct uart_port *port, int ch) { diff --git a/drivers/tty/vt/vt_ioctl.c b/drivers/tty/vt/vt_ioctl.c index 5e096f43bcea..65447c5f91d7 100644 --- a/drivers/tty/vt/vt_ioctl.c +++ b/drivers/tty/vt/vt_ioctl.c @@ -1463,7 +1463,6 @@ compat_kdfontop_ioctl(struct compat_console_font_op __user *fontop, if (!perm && op->op != KD_FONT_OP_GET) return -EPERM; op->data = compat_ptr(((struct compat_console_font_op *)op)->data); - op->flags |= KD_FONT_FLAG_OLD; i = con_font_op(vc, op); if (i) return i; diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 7ecb68a67411..85ae4b46bb68 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -137,7 +137,7 @@ choice config USB_AT91 tristate "Atmel AT91 USB Device Port" - depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 && !ARCH_AT91SAM9G45 + depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91SAM9G45 help Many Atmel AT91 processors (such as the AT91RM2000) have a full speed USB Device Port with support for five configurable @@ -150,7 +150,7 @@ config USB_AT91 config USB_ATMEL_USBA tristate "Atmel USBA" select USB_GADGET_DUALSPEED - depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 + depends on AVR32 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 help USBA is the integrated high-speed USB Device controller on the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel. diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 143a7256b598..f99b3dc745bd 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -41,6 +41,7 @@ #include <mach/board.h> #include <mach/cpu.h> #include <mach/at91sam9261_matrix.h> +#include <mach/at91_matrix.h> #include "at91_udc.h" @@ -910,9 +911,9 @@ static void pullup(struct at91_udc *udc, int is_on) } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { u32 usbpucr; - usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR); + usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); usbpucr |= AT91_MATRIX_USBPUCR_PUON; - at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr); + at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); } } else { stop_activity(udc); @@ -928,9 +929,9 @@ static void pullup(struct at91_udc *udc, int is_on) } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { u32 usbpucr; - usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR); + usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR); usbpucr &= ~AT91_MATRIX_USBPUCR_PUON; - at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr); + at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr); } clk_off(udc); } diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index e2fb6d583bd9..ce9dffb0515d 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -332,12 +332,12 @@ static int vbus_is_present(struct usba_udc *udc) static void toggle_bias(int is_on) { - unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR); + unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); if (is_on) - at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); + at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); else - at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); + at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); } #else diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index 6313e4439f37..4db399c01348 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c @@ -23,6 +23,7 @@ #include <linux/signal.h> #include <linux/platform_device.h> #include <linux/clk.h> +#include <mach/hardware.h> #include <mach/ohci.h> #include <mach/pxa3xx-u2d.h> diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 0d7b20d4285d..e40c00f2c2ba 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -1108,7 +1108,7 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) */ lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); - sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); + sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); if (sinfo->atmel_lcdfb_power_control) sinfo->atmel_lcdfb_power_control(0); diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index acf292bfba02..6af3f16754f0 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c @@ -1432,7 +1432,7 @@ static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state) struct fsl_diu_data *data; data = dev_get_drvdata(&ofdev->dev); - disable_lcdc(data->fsl_diu_info[0]); + disable_lcdc(data->fsl_diu_info); return 0; } @@ -1442,7 +1442,7 @@ static int fsl_diu_resume(struct platform_device *ofdev) struct fsl_diu_data *data; data = dev_get_drvdata(&ofdev->dev); - enable_lcdc(data->fsl_diu_info[0]); + enable_lcdc(data->fsl_diu_info); return 0; } diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index c6afa33a4532..02fd2263610c 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c @@ -529,7 +529,6 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev, if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) { ERR_MSG("Could not allocate cmap for intelfb_info.\n"); goto err_out_cmap; - return -ENODEV; } dinfo = info->par; diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index a5ec7f37c185..cce0820f3bc6 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -401,7 +401,7 @@ void dispc_runtime_put(void) DSSDBG("dispc_runtime_put\n"); - r = pm_runtime_put(&dispc.pdev->dev); + r = pm_runtime_put_sync(&dispc.pdev->dev); WARN_ON(r < 0); } @@ -3272,11 +3272,6 @@ static void _omap_dispc_initial_config(void) if (dss_has_feature(FEAT_FUNCGATED)) REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9); - /* L3 firewall setting: enable access to OCM RAM */ - /* XXX this should be somewhere in plat-omap */ - if (cpu_is_omap24xx()) - __raw_writel(0x402000b0, OMAP2_L3_IO_ADDRESS(0x680050a0)); - _dispc_setup_color_conv_coef(); dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY); diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index d4d676c82c12..52f36ec1c8bb 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1079,7 +1079,7 @@ void dsi_runtime_put(struct platform_device *dsidev) DSSDBG("dsi_runtime_put\n"); - r = pm_runtime_put(&dsi->pdev->dev); + r = pm_runtime_put_sync(&dsi->pdev->dev); WARN_ON(r < 0); } diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 17033457ee89..e6af8759f7dd 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -33,7 +33,10 @@ #include <linux/pm_runtime.h> #include <video/omapdss.h> + +#include <plat/cpu.h> #include <plat/clock.h> + #include "dss.h" #include "dss_features.h" @@ -720,7 +723,7 @@ void dss_runtime_put(void) DSSDBG("dss_runtime_put\n"); - r = pm_runtime_put(&dss.pdev->dev); + r = pm_runtime_put_sync(&dss.pdev->dev); WARN_ON(r < 0); } diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index b4c270edb915..d7aa3b056529 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c @@ -176,7 +176,7 @@ static void hdmi_runtime_put(void) DSSDBG("hdmi_runtime_put\n"); - r = pm_runtime_put(&hdmi.pdev->dev); + r = pm_runtime_put_sync(&hdmi.pdev->dev); WARN_ON(r < 0); } @@ -497,6 +497,7 @@ bool omapdss_hdmi_detect(void) int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) { + struct omap_dss_hdmi_data *priv = dssdev->data; int r = 0; DSSDBG("ENTER hdmi_display_enable\n"); @@ -509,6 +510,8 @@ int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) goto err0; } + hdmi.ip_data.hpd_gpio = priv->hpd_gpio; + r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c index 814bb9500dca..55f398014f33 100644 --- a/drivers/video/omap2/dss/rfbi.c +++ b/drivers/video/omap2/dss/rfbi.c @@ -140,7 +140,7 @@ static void rfbi_runtime_put(void) DSSDBG("rfbi_runtime_put\n"); - r = pm_runtime_put(&rfbi.pdev->dev); + r = pm_runtime_put_sync(&rfbi.pdev->dev); WARN_ON(r < 0); } diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h index 7503f7f619a7..50dadba5070a 100644 --- a/drivers/video/omap2/dss/ti_hdmi.h +++ b/drivers/video/omap2/dss/ti_hdmi.h @@ -126,6 +126,10 @@ struct hdmi_ip_data { const struct ti_hdmi_ip_ops *ops; struct hdmi_config cfg; struct hdmi_pll_info pll_data; + + /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */ + int hpd_gpio; + bool phy_tx_enabled; }; int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data); void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data); diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c index 9af81f18f163..2d72334ca3da 100644 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c @@ -28,6 +28,7 @@ #include <linux/delay.h> #include <linux/string.h> #include <linux/seq_file.h> +#include <linux/gpio.h> #include "ti_hdmi_4xxx_ip.h" #include "dss.h" @@ -223,6 +224,49 @@ void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data) hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF); } +static int hdmi_check_hpd_state(struct hdmi_ip_data *ip_data) +{ + unsigned long flags; + bool hpd; + int r; + /* this should be in ti_hdmi_4xxx_ip private data */ + static DEFINE_SPINLOCK(phy_tx_lock); + + spin_lock_irqsave(&phy_tx_lock, flags); + + hpd = gpio_get_value(ip_data->hpd_gpio); + + if (hpd == ip_data->phy_tx_enabled) { + spin_unlock_irqrestore(&phy_tx_lock, flags); + return 0; + } + + if (hpd) + r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON); + else + r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); + + if (r) { + DSSERR("Failed to %s PHY TX power\n", + hpd ? "enable" : "disable"); + goto err; + } + + ip_data->phy_tx_enabled = hpd; +err: + spin_unlock_irqrestore(&phy_tx_lock, flags); + return r; +} + +static irqreturn_t hpd_irq_handler(int irq, void *data) +{ + struct hdmi_ip_data *ip_data = data; + + hdmi_check_hpd_state(ip_data); + + return IRQ_HANDLED; +} + int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data) { u16 r = 0; @@ -232,10 +276,6 @@ int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data) if (r) return r; - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON); - if (r) - return r; - /* * Read address 0 in order to get the SCP reset done completed * Dummy access performed to make sure reset is done @@ -257,12 +297,32 @@ int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data) /* Write to phy address 3 to change the polarity control */ REG_FLD_MOD(phy_base, HDMI_TXPHY_PAD_CFG_CTRL, 0x1, 27, 27); + r = request_threaded_irq(gpio_to_irq(ip_data->hpd_gpio), + NULL, hpd_irq_handler, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, "hpd", ip_data); + if (r) { + DSSERR("HPD IRQ request failed\n"); + hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); + return r; + } + + r = hdmi_check_hpd_state(ip_data); + if (r) { + free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data); + hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); + return r; + } + return 0; } void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data) { + free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data); + hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); + ip_data->phy_tx_enabled = false; } static int hdmi_core_ddc_init(struct hdmi_ip_data *ip_data) diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index b3e9f9091581..5c3d0f901510 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -401,7 +401,7 @@ static void venc_runtime_put(void) DSSDBG("venc_runtime_put\n"); - r = pm_runtime_put(&venc.pdev->dev); + r = pm_runtime_put_sync(&venc.pdev->dev); WARN_ON(r < 0); } diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c index fd2271600370..4e5b960c32c8 100644 --- a/drivers/video/omap2/vrfb.c +++ b/drivers/video/omap2/vrfb.c @@ -27,7 +27,6 @@ #include <linux/bitops.h> #include <linux/mutex.h> -#include <mach/io.h> #include <plat/vrfb.h> #include <plat/sdrc.h> diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c index b3046dc4b56c..7ceefd29ae14 100644 --- a/drivers/watchdog/at91rm9200_wdt.c +++ b/drivers/watchdog/at91rm9200_wdt.c @@ -51,7 +51,7 @@ static unsigned long at91wdt_busy; */ static inline void at91_wdt_stop(void) { - at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN); + at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN); } /* @@ -59,9 +59,9 @@ static inline void at91_wdt_stop(void) */ static inline void at91_wdt_start(void) { - at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN | + at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN | (((65536 * wdt_time) >> 8) & AT91_ST_WDV)); - at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); + at91_st_write(AT91_ST_CR, AT91_ST_WDRST); } /* @@ -69,7 +69,7 @@ static inline void at91_wdt_start(void) */ static inline void at91_wdt_reload(void) { - at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); + at91_st_write(AT91_ST_CR, AT91_ST_WDRST); } /* ......................................................................... */ diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c index 016245419fad..a3ff321af4f2 100644 --- a/drivers/watchdog/sa1100_wdt.c +++ b/drivers/watchdog/sa1100_wdt.c @@ -25,6 +25,7 @@ #include <linux/miscdevice.h> #include <linux/watchdog.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/bitops.h> #include <linux/uaccess.h> #include <linux/timex.h> diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c index b60fc8bfb3e9..620daad201db 100644 --- a/fs/ceph/caps.c +++ b/fs/ceph/caps.c @@ -641,10 +641,10 @@ static int __cap_is_valid(struct ceph_cap *cap) unsigned long ttl; u32 gen; - spin_lock(&cap->session->s_cap_lock); + spin_lock(&cap->session->s_gen_ttl_lock); gen = cap->session->s_cap_gen; ttl = cap->session->s_cap_ttl; - spin_unlock(&cap->session->s_cap_lock); + spin_unlock(&cap->session->s_gen_ttl_lock); if (cap->cap_gen < gen || time_after_eq(jiffies, ttl)) { dout("__cap_is_valid %p cap %p issued %s " diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 618246bc2196..3e8094be4604 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c @@ -975,10 +975,10 @@ static int dentry_lease_is_valid(struct dentry *dentry) di = ceph_dentry(dentry); if (di->lease_session) { s = di->lease_session; - spin_lock(&s->s_cap_lock); + spin_lock(&s->s_gen_ttl_lock); gen = s->s_cap_gen; ttl = s->s_cap_ttl; - spin_unlock(&s->s_cap_lock); + spin_unlock(&s->s_gen_ttl_lock); if (di->lease_gen == gen && time_before(jiffies, dentry->d_time) && diff --git a/fs/ceph/mds_client.c b/fs/ceph/mds_client.c index 23ab6a3f1825..866e8d7ca37d 100644 --- a/fs/ceph/mds_client.c +++ b/fs/ceph/mds_client.c @@ -262,6 +262,7 @@ static int parse_reply_info(struct ceph_msg *msg, /* trace */ ceph_decode_32_safe(&p, end, len, bad); if (len > 0) { + ceph_decode_need(&p, end, len, bad); err = parse_reply_info_trace(&p, p+len, info, features); if (err < 0) goto out_bad; @@ -270,6 +271,7 @@ static int parse_reply_info(struct ceph_msg *msg, /* extra */ ceph_decode_32_safe(&p, end, len, bad); if (len > 0) { + ceph_decode_need(&p, end, len, bad); err = parse_reply_info_extra(&p, p+len, info, features); if (err < 0) goto out_bad; @@ -398,9 +400,11 @@ static struct ceph_mds_session *register_session(struct ceph_mds_client *mdsc, s->s_con.peer_name.type = CEPH_ENTITY_TYPE_MDS; s->s_con.peer_name.num = cpu_to_le64(mds); - spin_lock_init(&s->s_cap_lock); + spin_lock_init(&s->s_gen_ttl_lock); s->s_cap_gen = 0; s->s_cap_ttl = 0; + + spin_lock_init(&s->s_cap_lock); s->s_renew_requested = 0; s->s_renew_seq = 0; INIT_LIST_HEAD(&s->s_caps); @@ -2326,10 +2330,10 @@ static void handle_session(struct ceph_mds_session *session, case CEPH_SESSION_STALE: pr_info("mds%d caps went stale, renewing\n", session->s_mds); - spin_lock(&session->s_cap_lock); + spin_lock(&session->s_gen_ttl_lock); session->s_cap_gen++; session->s_cap_ttl = 0; - spin_unlock(&session->s_cap_lock); + spin_unlock(&session->s_gen_ttl_lock); send_renew_caps(mdsc, session); break; diff --git a/fs/ceph/mds_client.h b/fs/ceph/mds_client.h index a50ca0e39475..8c7c04ebb595 100644 --- a/fs/ceph/mds_client.h +++ b/fs/ceph/mds_client.h @@ -117,10 +117,13 @@ struct ceph_mds_session { void *s_authorizer_buf, *s_authorizer_reply_buf; size_t s_authorizer_buf_len, s_authorizer_reply_buf_len; - /* protected by s_cap_lock */ - spinlock_t s_cap_lock; + /* protected by s_gen_ttl_lock */ + spinlock_t s_gen_ttl_lock; u32 s_cap_gen; /* inc each time we get mds stale msg */ unsigned long s_cap_ttl; /* when session caps expire */ + + /* protected by s_cap_lock */ + spinlock_t s_cap_lock; struct list_head s_caps; /* all caps issued by this session */ int s_nr_caps, s_trim_caps; int s_num_cap_releases; diff --git a/fs/ceph/xattr.c b/fs/ceph/xattr.c index 857214ae8c08..a76f697303d9 100644 --- a/fs/ceph/xattr.c +++ b/fs/ceph/xattr.c @@ -111,8 +111,10 @@ static size_t ceph_vxattrcb_layout(struct ceph_inode_info *ci, char *val, } static struct ceph_vxattr_cb ceph_file_vxattrs[] = { + { true, "ceph.file.layout", ceph_vxattrcb_layout}, + /* The following extended attribute name is deprecated */ { true, "ceph.layout", ceph_vxattrcb_layout}, - { NULL, NULL } + { true, NULL, NULL } }; static struct ceph_vxattr_cb *ceph_inode_vxattrs(struct inode *inode) diff --git a/fs/cifs/Kconfig b/fs/cifs/Kconfig index 0554b00a7b33..2b243af70aa3 100644 --- a/fs/cifs/Kconfig +++ b/fs/cifs/Kconfig @@ -139,7 +139,7 @@ config CIFS_DFS_UPCALL points. If unsure, say N. config CIFS_FSCACHE - bool "Provide CIFS client caching support (EXPERIMENTAL)" + bool "Provide CIFS client caching support" depends on CIFS=m && FSCACHE || CIFS=y && FSCACHE=y help Makes CIFS FS-Cache capable. Say Y here if you want your CIFS data @@ -147,7 +147,7 @@ config CIFS_FSCACHE manager. If unsure, say N. config CIFS_ACL - bool "Provide CIFS ACL support (EXPERIMENTAL)" + bool "Provide CIFS ACL support" depends on CIFS_XATTR && KEYS help Allows to fetch CIFS/NTFS ACL from the server. The DACL blob diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c index 986709a8d903..9c288653e6d6 100644 --- a/fs/cifs/connect.c +++ b/fs/cifs/connect.c @@ -2142,14 +2142,14 @@ cifs_set_cifscreds(struct smb_vol *vol, struct cifs_ses *ses) len = delim - payload; if (len > MAX_USERNAME_SIZE || len <= 0) { - cFYI(1, "Bad value from username search (len=%ld)", len); + cFYI(1, "Bad value from username search (len=%zd)", len); rc = -EINVAL; goto out_key_put; } vol->username = kstrndup(payload, len, GFP_KERNEL); if (!vol->username) { - cFYI(1, "Unable to allocate %ld bytes for username", len); + cFYI(1, "Unable to allocate %zd bytes for username", len); rc = -ENOMEM; goto out_key_put; } @@ -2157,7 +2157,7 @@ cifs_set_cifscreds(struct smb_vol *vol, struct cifs_ses *ses) len = key->datalen - (len + 1); if (len > MAX_PASSWORD_SIZE || len <= 0) { - cFYI(1, "Bad len for password search (len=%ld)", len); + cFYI(1, "Bad len for password search (len=%zd)", len); rc = -EINVAL; kfree(vol->username); vol->username = NULL; @@ -2167,7 +2167,7 @@ cifs_set_cifscreds(struct smb_vol *vol, struct cifs_ses *ses) ++delim; vol->password = kstrndup(delim, len, GFP_KERNEL); if (!vol->password) { - cFYI(1, "Unable to allocate %ld bytes for password", len); + cFYI(1, "Unable to allocate %zd bytes for password", len); rc = -ENOMEM; kfree(vol->username); vol->username = NULL; @@ -3857,10 +3857,8 @@ cifs_construct_tcon(struct cifs_sb_info *cifs_sb, uid_t fsuid) struct smb_vol *vol_info; vol_info = kzalloc(sizeof(*vol_info), GFP_KERNEL); - if (vol_info == NULL) { - tcon = ERR_PTR(-ENOMEM); - goto out; - } + if (vol_info == NULL) + return ERR_PTR(-ENOMEM); vol_info->local_nls = cifs_sb->local_nls; vol_info->linux_uid = fsuid; diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c index d85efad5765f..551d0c2b9736 100644 --- a/fs/cifs/sess.c +++ b/fs/cifs/sess.c @@ -246,16 +246,15 @@ static void ascii_ssetup_strings(char **pbcc_area, struct cifs_ses *ses, /* copy user */ /* BB what about null user mounts - check that we do this BB */ /* copy user */ - if (ses->user_name != NULL) + if (ses->user_name != NULL) { strncpy(bcc_ptr, ses->user_name, MAX_USERNAME_SIZE); + bcc_ptr += strnlen(ses->user_name, MAX_USERNAME_SIZE); + } /* else null user mount */ - - bcc_ptr += strnlen(ses->user_name, MAX_USERNAME_SIZE); *bcc_ptr = 0; bcc_ptr++; /* account for null termination */ /* copy domain */ - if (ses->domainName != NULL) { strncpy(bcc_ptr, ses->domainName, 256); bcc_ptr += strnlen(ses->domainName, 256); @@ -395,6 +394,10 @@ static int decode_ntlmssp_challenge(char *bcc_ptr, int blob_len, ses->ntlmssp->server_flags = le32_to_cpu(pblob->NegotiateFlags); tioffset = le32_to_cpu(pblob->TargetInfoArray.BufferOffset); tilen = le16_to_cpu(pblob->TargetInfoArray.Length); + if (tioffset > blob_len || tioffset + tilen > blob_len) { + cERROR(1, "tioffset + tilen too high %u + %u", tioffset, tilen); + return -EINVAL; + } if (tilen) { ses->auth_key.response = kmalloc(tilen, GFP_KERNEL); if (!ses->auth_key.response) { diff --git a/fs/exec.c b/fs/exec.c index aeb135c7ff5c..92ce83a11e90 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -1071,6 +1071,21 @@ void set_task_comm(struct task_struct *tsk, char *buf) perf_event_comm(tsk); } +static void filename_to_taskname(char *tcomm, const char *fn, unsigned int len) +{ + int i, ch; + + /* Copies the binary name from after last slash */ + for (i = 0; (ch = *(fn++)) != '\0';) { + if (ch == '/') + i = 0; /* overwrite what we wrote */ + else + if (i < len - 1) + tcomm[i++] = ch; + } + tcomm[i] = '\0'; +} + int flush_old_exec(struct linux_binprm * bprm) { int retval; @@ -1085,6 +1100,7 @@ int flush_old_exec(struct linux_binprm * bprm) set_mm_exe_file(bprm->mm, bprm->file); + filename_to_taskname(bprm->tcomm, bprm->filename, sizeof(bprm->tcomm)); /* * Release all of the old mmap stuff */ @@ -1116,10 +1132,6 @@ EXPORT_SYMBOL(would_dump); void setup_new_exec(struct linux_binprm * bprm) { - int i, ch; - const char *name; - char tcomm[sizeof(current->comm)]; - arch_pick_mmap_layout(current->mm); /* This is the point of no return */ @@ -1130,18 +1142,7 @@ void setup_new_exec(struct linux_binprm * bprm) else set_dumpable(current->mm, suid_dumpable); - name = bprm->filename; - - /* Copies the binary name from after last slash */ - for (i=0; (ch = *(name++)) != '\0';) { - if (ch == '/') - i = 0; /* overwrite what we wrote */ - else - if (i < (sizeof(tcomm) - 1)) - tcomm[i++] = ch; - } - tcomm[i] = '\0'; - set_task_comm(current, tcomm); + set_task_comm(current, bprm->tcomm); /* Set the new mm task size. We have to do that late because it may * depend on TIF_32BIT which is only updated in flush_thread() on diff --git a/fs/jffs2/erase.c b/fs/jffs2/erase.c index a01cdad6aad1..eafb8d37a6fb 100644 --- a/fs/jffs2/erase.c +++ b/fs/jffs2/erase.c @@ -335,7 +335,7 @@ static int jffs2_block_check_erase(struct jffs2_sb_info *c, struct jffs2_erasebl void *ebuf; uint32_t ofs; size_t retlen; - int ret = -EIO; + int ret; unsigned long *wordebuf; ret = mtd_point(c->mtd, jeb->offset, c->sector_size, &retlen, diff --git a/fs/logfs/dev_mtd.c b/fs/logfs/dev_mtd.c index e97404d611e0..9c501449450d 100644 --- a/fs/logfs/dev_mtd.c +++ b/fs/logfs/dev_mtd.c @@ -152,9 +152,6 @@ static struct page *logfs_mtd_find_first_sb(struct super_block *sb, u64 *ofs) filler_t *filler = logfs_mtd_readpage; struct mtd_info *mtd = super->s_mtd; - if (!mtd_can_have_bb(mtd)) - return NULL; - *ofs = 0; while (mtd_block_isbad(mtd, *ofs)) { *ofs += mtd->erasesize; @@ -172,9 +169,6 @@ static struct page *logfs_mtd_find_last_sb(struct super_block *sb, u64 *ofs) filler_t *filler = logfs_mtd_readpage; struct mtd_info *mtd = super->s_mtd; - if (!mtd_can_have_bb(mtd)) - return NULL; - *ofs = mtd->size - mtd->erasesize; while (mtd_block_isbad(mtd, *ofs)) { *ofs -= mtd->erasesize; diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c index 886649627c3d..2a70fce70c65 100644 --- a/fs/nilfs2/ioctl.c +++ b/fs/nilfs2/ioctl.c @@ -603,6 +603,8 @@ static int nilfs_ioctl_clean_segments(struct inode *inode, struct file *filp, nsegs = argv[4].v_nmembs; if (argv[4].v_size != argsz[4]) goto out; + if (nsegs > UINT_MAX / sizeof(__u64)) + goto out; /* * argv[4] points to segment numbers this ioctl cleans. We diff --git a/fs/proc/base.c b/fs/proc/base.c index 9cde9edf9c4d..d4548dd49b02 100644 --- a/fs/proc/base.c +++ b/fs/proc/base.c @@ -198,26 +198,6 @@ static int proc_root_link(struct dentry *dentry, struct path *path) return result; } -static struct mm_struct *mm_access(struct task_struct *task, unsigned int mode) -{ - struct mm_struct *mm; - int err; - - err = mutex_lock_killable(&task->signal->cred_guard_mutex); - if (err) - return ERR_PTR(err); - - mm = get_task_mm(task); - if (mm && mm != current->mm && - !ptrace_may_access(task, mode)) { - mmput(mm); - mm = ERR_PTR(-EACCES); - } - mutex_unlock(&task->signal->cred_guard_mutex); - - return mm; -} - struct mm_struct *mm_for_maps(struct task_struct *task) { return mm_access(task, PTRACE_MODE_READ); @@ -711,6 +691,13 @@ static int mem_open(struct inode* inode, struct file* file) if (IS_ERR(mm)) return PTR_ERR(mm); + if (mm) { + /* ensure this mm_struct can't be freed */ + atomic_inc(&mm->mm_count); + /* but do not pin its memory */ + mmput(mm); + } + /* OK to pass negative loff_t, we can catch out-of-range */ file->f_mode |= FMODE_UNSIGNED_OFFSET; file->private_data = mm; @@ -718,57 +705,13 @@ static int mem_open(struct inode* inode, struct file* file) return 0; } -static ssize_t mem_read(struct file * file, char __user * buf, - size_t count, loff_t *ppos) +static ssize_t mem_rw(struct file *file, char __user *buf, + size_t count, loff_t *ppos, int write) { - int ret; - char *page; - unsigned long src = *ppos; struct mm_struct *mm = file->private_data; - - if (!mm) - return 0; - - page = (char *)__get_free_page(GFP_TEMPORARY); - if (!page) - return -ENOMEM; - - ret = 0; - - while (count > 0) { - int this_len, retval; - - this_len = (count > PAGE_SIZE) ? PAGE_SIZE : count; - retval = access_remote_vm(mm, src, page, this_len, 0); - if (!retval) { - if (!ret) - ret = -EIO; - break; - } - - if (copy_to_user(buf, page, retval)) { - ret = -EFAULT; - break; - } - - ret += retval; - src += retval; - buf += retval; - count -= retval; - } - *ppos = src; - - free_page((unsigned long) page); - return ret; -} - -static ssize_t mem_write(struct file * file, const char __user *buf, - size_t count, loff_t *ppos) -{ - int copied; + unsigned long addr = *ppos; + ssize_t copied; char *page; - unsigned long dst = *ppos; - struct mm_struct *mm = file->private_data; if (!mm) return 0; @@ -778,31 +721,54 @@ static ssize_t mem_write(struct file * file, const char __user *buf, return -ENOMEM; copied = 0; + if (!atomic_inc_not_zero(&mm->mm_users)) + goto free; + while (count > 0) { - int this_len, retval; + int this_len = min_t(int, count, PAGE_SIZE); - this_len = (count > PAGE_SIZE) ? PAGE_SIZE : count; - if (copy_from_user(page, buf, this_len)) { + if (write && copy_from_user(page, buf, this_len)) { copied = -EFAULT; break; } - retval = access_remote_vm(mm, dst, page, this_len, 1); - if (!retval) { + + this_len = access_remote_vm(mm, addr, page, this_len, write); + if (!this_len) { if (!copied) copied = -EIO; break; } - copied += retval; - buf += retval; - dst += retval; - count -= retval; + + if (!write && copy_to_user(buf, page, this_len)) { + copied = -EFAULT; + break; + } + + buf += this_len; + addr += this_len; + copied += this_len; + count -= this_len; } - *ppos = dst; + *ppos = addr; + mmput(mm); +free: free_page((unsigned long) page); return copied; } +static ssize_t mem_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + return mem_rw(file, buf, count, ppos, 0); +} + +static ssize_t mem_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + return mem_rw(file, (char __user*)buf, count, ppos, 1); +} + loff_t mem_lseek(struct file *file, loff_t offset, int orig) { switch (orig) { @@ -822,8 +788,8 @@ loff_t mem_lseek(struct file *file, loff_t offset, int orig) static int mem_release(struct inode *inode, struct file *file) { struct mm_struct *mm = file->private_data; - - mmput(mm); + if (mm) + mmdrop(mm); return 0; } diff --git a/include/asm-generic/pci_iomap.h b/include/asm-generic/pci_iomap.h index 8de4b73e19e2..e58fcf891370 100644 --- a/include/asm-generic/pci_iomap.h +++ b/include/asm-generic/pci_iomap.h @@ -15,6 +15,16 @@ struct pci_dev; #ifdef CONFIG_PCI /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); +/* Create a virtual mapping cookie for a port on a given PCI device. + * Do not call this directly, it exists to make it easier for architectures + * to override */ +#ifdef CONFIG_NO_GENERIC_PCI_IOPORT_MAP +extern void __iomem *__pci_ioport_map(struct pci_dev *dev, unsigned long port, + unsigned int nr); +#else +#define __pci_ioport_map(dev, port, nr) ioport_map((port), (nr)) +#endif + #else static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max) { diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h index 724c69c40bb8..a9fab831caf8 100644 --- a/include/linux/amba/bus.h +++ b/include/linux/amba/bus.h @@ -60,6 +60,9 @@ extern struct bus_type amba_bustype; int amba_driver_register(struct amba_driver *); void amba_driver_unregister(struct amba_driver *); +struct amba_device *amba_device_alloc(const char *, resource_size_t, size_t); +void amba_device_put(struct amba_device *); +int amba_device_add(struct amba_device *, struct resource *); int amba_device_register(struct amba_device *, struct resource *); void amba_device_unregister(struct amba_device *); struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int); @@ -89,4 +92,37 @@ void amba_release_regions(struct amba_device *); #define amba_manf(d) AMBA_MANF_BITS((d)->periphid) #define amba_part(d) AMBA_PART_BITS((d)->periphid) +#define __AMBA_DEV(busid, data, mask) \ + { \ + .coherent_dma_mask = mask, \ + .init_name = busid, \ + .platform_data = data, \ + } + +/* + * APB devices do not themselves have the ability to address memory, + * so DMA masks should be zero (much like USB peripheral devices.) + * The DMA controller DMA masks should be used instead (much like + * USB host controllers in conventional PCs.) + */ +#define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) \ +struct amba_device name##_device = { \ + .dev = __AMBA_DEV(busid, data, 0), \ + .res = DEFINE_RES_MEM(base, SZ_4K), \ + .irq = irqs, \ + .periphid = id, \ +} + +/* + * AHB devices are DMA capable, so set their DMA masks + */ +#define AMBA_AHB_DEVICE(name, busid, id, base, irqs, data) \ +struct amba_device name##_device = { \ + .dev = __AMBA_DEV(busid, data, ~0ULL), \ + .res = DEFINE_RES_MEM(base, SZ_4K), \ + .dma_mask = ~0ULL, \ + .irq = irqs, \ + .periphid = id, \ +} + #endif diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h index fd88a3945aa1..0092102db2de 100644 --- a/include/linux/binfmts.h +++ b/include/linux/binfmts.h @@ -18,7 +18,7 @@ struct pt_regs; #define BINPRM_BUF_SIZE 128 #ifdef __KERNEL__ -#include <linux/list.h> +#include <linux/sched.h> #define CORENAME_MAX_SIZE 128 @@ -58,6 +58,7 @@ struct linux_binprm { unsigned interp_flags; unsigned interp_data; unsigned long loader, exec; + char tcomm[TASK_COMM_LEN]; }; #define BINPRM_FLAGS_ENFORCE_NONDUMP_BIT 0 diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index e13117cbd2f7..5a736af3cc7a 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -77,7 +77,7 @@ static inline u64 dma_get_mask(struct device *dev) return DMA_BIT_MASK(32); } -#ifdef ARCH_HAS_DMA_SET_COHERENT_MASK +#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK int dma_set_coherent_mask(struct device *dev, u64 mask); #else static inline int dma_set_coherent_mask(struct device *dev, u64 mask) diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h index b5ca4b2c08ec..004ff33ab38e 100644 --- a/include/linux/gpio_keys.h +++ b/include/linux/gpio_keys.h @@ -1,6 +1,8 @@ #ifndef _GPIO_KEYS_H #define _GPIO_KEYS_H +struct device; + struct gpio_keys_button { /* Configuration parameters */ unsigned int code; /* input event code (KEY_*, SW_*) */ diff --git a/include/linux/lp8727.h b/include/linux/lp8727.h index d21fa2865bf4..d21fa2865bf4 100755..100644 --- a/include/linux/lp8727.h +++ b/include/linux/lp8727.h diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index 2463c2619596..9bc9ac651dad 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h @@ -187,8 +187,10 @@ struct twl6040 { int rev; u8 vibra_ctrl_cache[2]; + /* PLL configuration */ int pll; unsigned int sysclk; + unsigned int mclk; unsigned int irq; unsigned int irq_base; diff --git a/include/linux/mpi.h b/include/linux/mpi.h index 06f88994ccaa..d02cca6cc8ce 100644 --- a/include/linux/mpi.h +++ b/include/linux/mpi.h @@ -57,8 +57,6 @@ struct gcry_mpi { typedef struct gcry_mpi *MPI; -#define MPI_NULL NULL - #define mpi_get_nlimbs(a) ((a)->nlimbs) #define mpi_is_neg(a) ((a)->sign) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 221295208fd0..d43dc25af82e 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -427,9 +427,7 @@ static inline int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) static inline int mtd_suspend(struct mtd_info *mtd) { - if (!mtd->suspend) - return -EOPNOTSUPP; - return mtd->suspend(mtd); + return mtd->suspend ? mtd->suspend(mtd) : 0; } static inline void mtd_resume(struct mtd_info *mtd) @@ -489,7 +487,7 @@ static inline int mtd_has_oob(const struct mtd_info *mtd) static inline int mtd_can_have_bb(const struct mtd_info *mtd) { - return 0; + return !!mtd->block_isbad; } /* Kernel-side ioctl definitions */ diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 08855613ceb3..abb2776be1ba 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -587,6 +587,7 @@ struct hw_perf_event { u64 sample_period; u64 last_period; local64_t period_left; + u64 interrupts_seq; u64 interrupts; u64 freq_time_stamp; diff --git a/include/linux/pm_qos.h b/include/linux/pm_qos.h index e5bbcbaa6f57..4d99e4e6ef83 100644 --- a/include/linux/pm_qos.h +++ b/include/linux/pm_qos.h @@ -110,7 +110,19 @@ static inline void pm_qos_remove_request(struct pm_qos_request *req) { return; } static inline int pm_qos_request(int pm_qos_class) - { return 0; } +{ + switch (pm_qos_class) { + case PM_QOS_CPU_DMA_LATENCY: + return PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; + case PM_QOS_NETWORK_LATENCY: + return PM_QOS_NETWORK_LAT_DEFAULT_VALUE; + case PM_QOS_NETWORK_THROUGHPUT: + return PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE; + default: + return PM_QOS_DEFAULT_VALUE; + } +} + static inline int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier) { return 0; } diff --git a/include/linux/sched.h b/include/linux/sched.h index 2234985a5e65..7d379a6bfd88 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2259,6 +2259,12 @@ static inline void mmdrop(struct mm_struct * mm) extern void mmput(struct mm_struct *); /* Grab a reference to a task's mm, if it is not already going away */ extern struct mm_struct *get_task_mm(struct task_struct *task); +/* + * Grab a reference to a task's mm, if it is not already going away + * and ptrace_may_access with the mode parameter passed to it + * succeeds. + */ +extern struct mm_struct *mm_access(struct task_struct *task, unsigned int mode); /* Remove the current tasks stale references to the old mm_struct */ extern void mm_release(struct task_struct *, struct mm_struct *); /* Allocate a new mm structure and copy contents from tsk->mm */ diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h index 8cd7fe59cf1a..425450b980b8 100644 --- a/include/linux/sh_dma.h +++ b/include/linux/sh_dma.h @@ -70,6 +70,7 @@ struct sh_dmae_pdata { unsigned int needs_tend_set:1; unsigned int no_dmars:1; unsigned int chclr_present:1; + unsigned int slave_only:1; }; /* DMA register */ diff --git a/include/sound/core.h b/include/sound/core.h index 5ab255f196cc..cea1b5426dfa 100644 --- a/include/sound/core.h +++ b/include/sound/core.h @@ -417,6 +417,7 @@ static inline int __snd_bug_on(int cond) #define gameport_get_port_data(gp) (gp)->port_data #endif +#ifdef CONFIG_PCI /* PCI quirk list helper */ struct snd_pci_quirk { unsigned short subvendor; /* PCI subvendor ID */ @@ -456,5 +457,6 @@ snd_pci_quirk_lookup(struct pci_dev *pci, const struct snd_pci_quirk *list); const struct snd_pci_quirk * snd_pci_quirk_lookup_id(u16 vendor, u16 device, const struct snd_pci_quirk *list); +#endif #endif /* __SOUND_CORE_H */ diff --git a/include/target/target_core_backend.h b/include/target/target_core_backend.h index 4866499bdeeb..e5e6ff98f0fa 100644 --- a/include/target/target_core_backend.h +++ b/include/target/target_core_backend.h @@ -59,7 +59,7 @@ int transport_set_vpd_ident_type(struct t10_vpd *, unsigned char *); int transport_set_vpd_ident(struct t10_vpd *, unsigned char *); /* core helpers also used by command snooping in pscsi */ -void *transport_kmap_first_data_page(struct se_cmd *); -void transport_kunmap_first_data_page(struct se_cmd *); +void *transport_kmap_data_sg(struct se_cmd *); +void transport_kunmap_data_sg(struct se_cmd *); #endif /* TARGET_CORE_BACKEND_H */ diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h index daf532bc721a..dc4e345a0163 100644 --- a/include/target/target_core_base.h +++ b/include/target/target_core_base.h @@ -582,6 +582,7 @@ struct se_cmd { struct scatterlist *t_data_sg; unsigned int t_data_nents; + void *t_data_vmap; struct scatterlist *t_bidi_data_sg; unsigned int t_bidi_data_nents; diff --git a/include/target/target_core_fabric.h b/include/target/target_core_fabric.h index 523e8bc104d4..d36fad317e78 100644 --- a/include/target/target_core_fabric.h +++ b/include/target/target_core_fabric.h @@ -114,7 +114,7 @@ void transport_init_se_cmd(struct se_cmd *, struct target_core_fabric_ops *, struct se_session *, u32, int, int, unsigned char *); int transport_lookup_cmd_lun(struct se_cmd *, u32); int transport_generic_allocate_tasks(struct se_cmd *, unsigned char *); -int target_submit_cmd(struct se_cmd *, struct se_session *, unsigned char *, +void target_submit_cmd(struct se_cmd *, struct se_session *, unsigned char *, unsigned char *, u32, u32, int, int, int); int transport_handle_cdb_direct(struct se_cmd *); int transport_generic_handle_cdb_map(struct se_cmd *); diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 062b3b24ff10..483f67caa7ad 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -590,6 +590,11 @@ struct omap_dss_device { int (*get_backlight)(struct omap_dss_device *dssdev); }; +struct omap_dss_hdmi_data +{ + int hpd_gpio; +}; + struct omap_dss_driver { struct device_driver driver; diff --git a/kernel/events/core.c b/kernel/events/core.c index 32b48c889711..ba36013cfb21 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -2300,6 +2300,9 @@ do { \ return div64_u64(dividend, divisor); } +static DEFINE_PER_CPU(int, perf_throttled_count); +static DEFINE_PER_CPU(u64, perf_throttled_seq); + static void perf_adjust_period(struct perf_event *event, u64 nsec, u64 count) { struct hw_perf_event *hwc = &event->hw; @@ -2325,16 +2328,29 @@ static void perf_adjust_period(struct perf_event *event, u64 nsec, u64 count) } } -static void perf_ctx_adjust_freq(struct perf_event_context *ctx, u64 period) +/* + * combine freq adjustment with unthrottling to avoid two passes over the + * events. At the same time, make sure, having freq events does not change + * the rate of unthrottling as that would introduce bias. + */ +static void perf_adjust_freq_unthr_context(struct perf_event_context *ctx, + int needs_unthr) { struct perf_event *event; struct hw_perf_event *hwc; - u64 interrupts, now; + u64 now, period = TICK_NSEC; s64 delta; - if (!ctx->nr_freq) + /* + * only need to iterate over all events iff: + * - context have events in frequency mode (needs freq adjust) + * - there are events to unthrottle on this cpu + */ + if (!(ctx->nr_freq || needs_unthr)) return; + raw_spin_lock(&ctx->lock); + list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { if (event->state != PERF_EVENT_STATE_ACTIVE) continue; @@ -2344,13 +2360,8 @@ static void perf_ctx_adjust_freq(struct perf_event_context *ctx, u64 period) hwc = &event->hw; - interrupts = hwc->interrupts; - hwc->interrupts = 0; - - /* - * unthrottle events on the tick - */ - if (interrupts == MAX_INTERRUPTS) { + if (needs_unthr && hwc->interrupts == MAX_INTERRUPTS) { + hwc->interrupts = 0; perf_log_throttle(event, 1); event->pmu->start(event, 0); } @@ -2358,14 +2369,26 @@ static void perf_ctx_adjust_freq(struct perf_event_context *ctx, u64 period) if (!event->attr.freq || !event->attr.sample_freq) continue; - event->pmu->read(event); + /* + * stop the event and update event->count + */ + event->pmu->stop(event, PERF_EF_UPDATE); + now = local64_read(&event->count); delta = now - hwc->freq_count_stamp; hwc->freq_count_stamp = now; + /* + * restart the event + * reload only if value has changed + */ if (delta > 0) perf_adjust_period(event, period, delta); + + event->pmu->start(event, delta > 0 ? PERF_EF_RELOAD : 0); } + + raw_spin_unlock(&ctx->lock); } /* @@ -2388,16 +2411,13 @@ static void rotate_ctx(struct perf_event_context *ctx) */ static void perf_rotate_context(struct perf_cpu_context *cpuctx) { - u64 interval = (u64)cpuctx->jiffies_interval * TICK_NSEC; struct perf_event_context *ctx = NULL; - int rotate = 0, remove = 1, freq = 0; + int rotate = 0, remove = 1; if (cpuctx->ctx.nr_events) { remove = 0; if (cpuctx->ctx.nr_events != cpuctx->ctx.nr_active) rotate = 1; - if (cpuctx->ctx.nr_freq) - freq = 1; } ctx = cpuctx->task_ctx; @@ -2405,37 +2425,26 @@ static void perf_rotate_context(struct perf_cpu_context *cpuctx) remove = 0; if (ctx->nr_events != ctx->nr_active) rotate = 1; - if (ctx->nr_freq) - freq = 1; } - if (!rotate && !freq) + if (!rotate) goto done; perf_ctx_lock(cpuctx, cpuctx->task_ctx); perf_pmu_disable(cpuctx->ctx.pmu); - if (freq) { - perf_ctx_adjust_freq(&cpuctx->ctx, interval); - if (ctx) - perf_ctx_adjust_freq(ctx, interval); - } - - if (rotate) { - cpu_ctx_sched_out(cpuctx, EVENT_FLEXIBLE); - if (ctx) - ctx_sched_out(ctx, cpuctx, EVENT_FLEXIBLE); + cpu_ctx_sched_out(cpuctx, EVENT_FLEXIBLE); + if (ctx) + ctx_sched_out(ctx, cpuctx, EVENT_FLEXIBLE); - rotate_ctx(&cpuctx->ctx); - if (ctx) - rotate_ctx(ctx); + rotate_ctx(&cpuctx->ctx); + if (ctx) + rotate_ctx(ctx); - perf_event_sched_in(cpuctx, ctx, current); - } + perf_event_sched_in(cpuctx, ctx, current); perf_pmu_enable(cpuctx->ctx.pmu); perf_ctx_unlock(cpuctx, cpuctx->task_ctx); - done: if (remove) list_del_init(&cpuctx->rotation_list); @@ -2445,10 +2454,22 @@ void perf_event_task_tick(void) { struct list_head *head = &__get_cpu_var(rotation_list); struct perf_cpu_context *cpuctx, *tmp; + struct perf_event_context *ctx; + int throttled; WARN_ON(!irqs_disabled()); + __this_cpu_inc(perf_throttled_seq); + throttled = __this_cpu_xchg(perf_throttled_count, 0); + list_for_each_entry_safe(cpuctx, tmp, head, rotation_list) { + ctx = &cpuctx->ctx; + perf_adjust_freq_unthr_context(ctx, throttled); + + ctx = cpuctx->task_ctx; + if (ctx) + perf_adjust_freq_unthr_context(ctx, throttled); + if (cpuctx->jiffies_interval == 1 || !(jiffies % cpuctx->jiffies_interval)) perf_rotate_context(cpuctx); @@ -4509,6 +4530,7 @@ static int __perf_event_overflow(struct perf_event *event, { int events = atomic_read(&event->event_limit); struct hw_perf_event *hwc = &event->hw; + u64 seq; int ret = 0; /* @@ -4518,14 +4540,20 @@ static int __perf_event_overflow(struct perf_event *event, if (unlikely(!is_sampling_event(event))) return 0; - if (unlikely(hwc->interrupts >= max_samples_per_tick)) { - if (throttle) { + seq = __this_cpu_read(perf_throttled_seq); + if (seq != hwc->interrupts_seq) { + hwc->interrupts_seq = seq; + hwc->interrupts = 1; + } else { + hwc->interrupts++; + if (unlikely(throttle + && hwc->interrupts >= max_samples_per_tick)) { + __this_cpu_inc(perf_throttled_count); hwc->interrupts = MAX_INTERRUPTS; perf_log_throttle(event, 0); ret = 1; } - } else - hwc->interrupts++; + } if (event->attr.freq) { u64 now = perf_clock(); diff --git a/kernel/exit.c b/kernel/exit.c index 294b1709170d..4b4042f9bc6a 100644 --- a/kernel/exit.c +++ b/kernel/exit.c @@ -1038,6 +1038,22 @@ void do_exit(long code) if (tsk->nr_dirtied) __this_cpu_add(dirty_throttle_leaks, tsk->nr_dirtied); exit_rcu(); + + /* + * The setting of TASK_RUNNING by try_to_wake_up() may be delayed + * when the following two conditions become true. + * - There is race condition of mmap_sem (It is acquired by + * exit_mm()), and + * - SMI occurs before setting TASK_RUNINNG. + * (or hypervisor of virtual machine switches to other guest) + * As a result, we may become TASK_RUNNING after becoming TASK_DEAD + * + * To avoid it, we have to wait for releasing tsk->pi_lock which + * is held by try_to_wake_up() + */ + smp_mb(); + raw_spin_unlock_wait(&tsk->pi_lock); + /* causes final put_task_struct in finish_task_switch(). */ tsk->state = TASK_DEAD; tsk->flags |= PF_NOFREEZE; /* tell freezer to ignore us */ diff --git a/kernel/fork.c b/kernel/fork.c index 051f090d40c1..1b2ef3c23ae4 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -647,6 +647,26 @@ struct mm_struct *get_task_mm(struct task_struct *task) } EXPORT_SYMBOL_GPL(get_task_mm); +struct mm_struct *mm_access(struct task_struct *task, unsigned int mode) +{ + struct mm_struct *mm; + int err; + + err = mutex_lock_killable(&task->signal->cred_guard_mutex); + if (err) + return ERR_PTR(err); + + mm = get_task_mm(task); + if (mm && mm != current->mm && + !ptrace_may_access(task, mode)) { + mmput(mm); + mm = ERR_PTR(-EACCES); + } + mutex_unlock(&task->signal->cred_guard_mutex); + + return mm; +} + /* Please note the differences between mmput and mm_release. * mmput is called whenever we stop holding onto a mm_struct, * error success whatever. diff --git a/kernel/kprobes.c b/kernel/kprobes.c index 29f5b65bee29..9788c0ec6f43 100644 --- a/kernel/kprobes.c +++ b/kernel/kprobes.c @@ -1673,8 +1673,12 @@ static int __kprobes pre_handler_kretprobe(struct kprobe *p, ri->rp = rp; ri->task = current; - if (rp->entry_handler && rp->entry_handler(ri, regs)) + if (rp->entry_handler && rp->entry_handler(ri, regs)) { + raw_spin_lock_irqsave(&rp->lock, flags); + hlist_add_head(&ri->hlist, &rp->free_instances); + raw_spin_unlock_irqrestore(&rp->lock, flags); return 0; + } arch_prepare_kretprobe(ri, regs); diff --git a/kernel/power/power.h b/kernel/power/power.h index 0c4defe6d3b8..21724eee5206 100644 --- a/kernel/power/power.h +++ b/kernel/power/power.h @@ -231,8 +231,28 @@ extern int pm_test_level; #ifdef CONFIG_SUSPEND_FREEZER static inline int suspend_freeze_processes(void) { - int error = freeze_processes(); - return error ? : freeze_kernel_threads(); + int error; + + error = freeze_processes(); + + /* + * freeze_processes() automatically thaws every task if freezing + * fails. So we need not do anything extra upon error. + */ + if (error) + goto Finish; + + error = freeze_kernel_threads(); + + /* + * freeze_kernel_threads() thaws only kernel threads upon freezing + * failure. So we have to thaw the userspace tasks ourselves. + */ + if (error) + thaw_processes(); + + Finish: + return error; } static inline void suspend_thaw_processes(void) diff --git a/kernel/power/process.c b/kernel/power/process.c index eeca00311f39..7e426459e60a 100644 --- a/kernel/power/process.c +++ b/kernel/power/process.c @@ -143,7 +143,10 @@ int freeze_processes(void) /** * freeze_kernel_threads - Make freezable kernel threads go to the refrigerator. * - * On success, returns 0. On failure, -errno and system is fully thawed. + * On success, returns 0. On failure, -errno and only the kernel threads are + * thawed, so as to give a chance to the caller to do additional cleanups + * (if any) before thawing the userspace tasks. So, it is the responsibility + * of the caller to thaw the userspace tasks, when the time is right. */ int freeze_kernel_threads(void) { @@ -159,7 +162,7 @@ int freeze_kernel_threads(void) BUG_ON(in_atomic()); if (error) - thaw_processes(); + thaw_kernel_threads(); return error; } diff --git a/kernel/power/user.c b/kernel/power/user.c index e5a21a857302..3e100075b13c 100644 --- a/kernel/power/user.c +++ b/kernel/power/user.c @@ -249,13 +249,15 @@ static long snapshot_ioctl(struct file *filp, unsigned int cmd, } pm_restore_gfp_mask(); error = hibernation_snapshot(data->platform_support); - if (!error) { + if (error) { + thaw_kernel_threads(); + } else { error = put_user(in_suspend, (int __user *)arg); if (!error && !freezer_test_done) data->ready = 1; if (freezer_test_done) { freezer_test_done = false; - thaw_processes(); + thaw_kernel_threads(); } } break; diff --git a/kernel/sched/core.c b/kernel/sched/core.c index df00cb09263e..5255c9d2e053 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -74,6 +74,7 @@ #include <asm/tlb.h> #include <asm/irq_regs.h> +#include <asm/mutex.h> #ifdef CONFIG_PARAVIRT #include <asm/paravirt.h> #endif @@ -723,9 +724,6 @@ static void dequeue_task(struct rq *rq, struct task_struct *p, int flags) p->sched_class->dequeue_task(rq, p, flags); } -/* - * activate_task - move a task to the runqueue. - */ void activate_task(struct rq *rq, struct task_struct *p, int flags) { if (task_contributes_to_load(p)) @@ -734,9 +732,6 @@ void activate_task(struct rq *rq, struct task_struct *p, int flags) enqueue_task(rq, p, flags); } -/* - * deactivate_task - remove a task from the runqueue. - */ void deactivate_task(struct rq *rq, struct task_struct *p, int flags) { if (task_contributes_to_load(p)) @@ -4134,7 +4129,7 @@ recheck: on_rq = p->on_rq; running = task_current(rq, p); if (on_rq) - deactivate_task(rq, p, 0); + dequeue_task(rq, p, 0); if (running) p->sched_class->put_prev_task(rq, p); @@ -4147,7 +4142,7 @@ recheck: if (running) p->sched_class->set_curr_task(rq); if (on_rq) - activate_task(rq, p, 0); + enqueue_task(rq, p, 0); check_class_changed(rq, p, prev_class, oldprio); task_rq_unlock(rq, p, &flags); @@ -4998,9 +4993,9 @@ static int __migrate_task(struct task_struct *p, int src_cpu, int dest_cpu) * placed properly. */ if (p->on_rq) { - deactivate_task(rq_src, p, 0); + dequeue_task(rq_src, p, 0); set_task_cpu(p, dest_cpu); - activate_task(rq_dest, p, 0); + enqueue_task(rq_dest, p, 0); check_preempt_curr(rq_dest, p, 0); } done: @@ -7032,10 +7027,10 @@ static void normalize_task(struct rq *rq, struct task_struct *p) on_rq = p->on_rq; if (on_rq) - deactivate_task(rq, p, 0); + dequeue_task(rq, p, 0); __setscheduler(rq, p, SCHED_NORMAL, 0); if (on_rq) { - activate_task(rq, p, 0); + enqueue_task(rq, p, 0); resched_task(rq->curr); } diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 84adb2d66cbd..7c6414fc669d 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -4866,6 +4866,15 @@ static void nohz_balancer_kick(int cpu) return; } +static inline void clear_nohz_tick_stopped(int cpu) +{ + if (unlikely(test_bit(NOHZ_TICK_STOPPED, nohz_flags(cpu)))) { + cpumask_clear_cpu(cpu, nohz.idle_cpus_mask); + atomic_dec(&nohz.nr_cpus); + clear_bit(NOHZ_TICK_STOPPED, nohz_flags(cpu)); + } +} + static inline void set_cpu_sd_state_busy(void) { struct sched_domain *sd; @@ -4904,6 +4913,12 @@ void select_nohz_load_balancer(int stop_tick) { int cpu = smp_processor_id(); + /* + * If this cpu is going down, then nothing needs to be done. + */ + if (!cpu_active(cpu)) + return; + if (stop_tick) { if (test_bit(NOHZ_TICK_STOPPED, nohz_flags(cpu))) return; @@ -4914,6 +4929,18 @@ void select_nohz_load_balancer(int stop_tick) } return; } + +static int __cpuinit sched_ilb_notifier(struct notifier_block *nfb, + unsigned long action, void *hcpu) +{ + switch (action & ~CPU_TASKS_FROZEN) { + case CPU_DYING: + clear_nohz_tick_stopped(smp_processor_id()); + return NOTIFY_OK; + default: + return NOTIFY_DONE; + } +} #endif static DEFINE_SPINLOCK(balancing); @@ -5070,11 +5097,7 @@ static inline int nohz_kick_needed(struct rq *rq, int cpu) * busy tick after returning from idle, we will update the busy stats. */ set_cpu_sd_state_busy(); - if (unlikely(test_bit(NOHZ_TICK_STOPPED, nohz_flags(cpu)))) { - clear_bit(NOHZ_TICK_STOPPED, nohz_flags(cpu)); - cpumask_clear_cpu(cpu, nohz.idle_cpus_mask); - atomic_dec(&nohz.nr_cpus); - } + clear_nohz_tick_stopped(cpu); /* * None are in tickless mode and hence no need for NOHZ idle load @@ -5590,6 +5613,7 @@ __init void init_sched_fair_class(void) #ifdef CONFIG_NO_HZ zalloc_cpumask_var(&nohz.idle_cpus_mask, GFP_NOWAIT); + cpu_notifier(sched_ilb_notifier, 0); #endif #endif /* SMP */ diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c index 3640ebbb466b..f42ae7fb5ec5 100644 --- a/kernel/sched/rt.c +++ b/kernel/sched/rt.c @@ -1587,6 +1587,11 @@ static int push_rt_task(struct rq *rq) if (!next_task) return 0; +#ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW + if (unlikely(task_running(rq, next_task))) + return 0; +#endif + retry: if (unlikely(next_task == rq->curr)) { WARN_ON(1); diff --git a/kernel/watchdog.c b/kernel/watchdog.c index 1d7bca7f4f52..d117262deba3 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -296,7 +296,7 @@ static enum hrtimer_restart watchdog_timer_fn(struct hrtimer *hrtimer) if (__this_cpu_read(soft_watchdog_warn) == true) return HRTIMER_RESTART; - printk(KERN_ERR "BUG: soft lockup - CPU#%d stuck for %us! [%s:%d]\n", + printk(KERN_EMERG "BUG: soft lockup - CPU#%d stuck for %us! [%s:%d]\n", smp_processor_id(), duration, current->comm, task_pid_nr(current)); print_modules(); diff --git a/lib/Kconfig b/lib/Kconfig index 169eb7c598e5..028aba9e72af 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -19,6 +19,9 @@ config RATIONAL config GENERIC_FIND_FIRST_BIT bool +config NO_GENERIC_PCI_IOPORT_MAP + bool + config GENERIC_PCI_IOMAP bool @@ -279,6 +282,9 @@ config AVERAGE If unsure, say N. +config CLZ_TAB + bool + config CORDIC tristate "CORDIC algorithm" help @@ -287,6 +293,7 @@ config CORDIC config MPILIB tristate + select CLZ_TAB help Multiprecision maths library from GnuPG. It is used to implement RSA digital signature verification, diff --git a/lib/Makefile b/lib/Makefile index d71aae1b01b3..18515f0267c4 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -121,6 +121,8 @@ obj-$(CONFIG_DQL) += dynamic_queue_limits.o obj-$(CONFIG_MPILIB) += mpi/ obj-$(CONFIG_SIGNATURE) += digsig.o +obj-$(CONFIG_CLZ_TAB) += clz_tab.o + hostprogs-y := gen_crc32table clean-files := crc32table.h diff --git a/lib/bug.c b/lib/bug.c index 19552096d16b..a28c1415357c 100644 --- a/lib/bug.c +++ b/lib/bug.c @@ -169,7 +169,7 @@ enum bug_trap_type report_bug(unsigned long bugaddr, struct pt_regs *regs) return BUG_TRAP_TYPE_WARN; } - printk(KERN_EMERG "------------[ cut here ]------------\n"); + printk(KERN_DEFAULT "------------[ cut here ]------------\n"); if (file) printk(KERN_CRIT "kernel BUG at %s:%u!\n", diff --git a/lib/clz_tab.c b/lib/clz_tab.c new file mode 100644 index 000000000000..7287b4a991a7 --- /dev/null +++ b/lib/clz_tab.c @@ -0,0 +1,18 @@ +const unsigned char __clz_tab[] = { + 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8, 8, 8, 8, 8, 8, 8, +}; diff --git a/lib/digsig.c b/lib/digsig.c index fd2402f67f89..286d558033e2 100644 --- a/lib/digsig.c +++ b/lib/digsig.c @@ -34,14 +34,9 @@ static int pkcs_1_v1_5_decode_emsa(const unsigned char *msg, unsigned long msglen, unsigned long modulus_bitlen, unsigned char *out, - unsigned long *outlen, - int *is_valid) + unsigned long *outlen) { unsigned long modulus_len, ps_len, i; - int result; - - /* default to invalid packet */ - *is_valid = 0; modulus_len = (modulus_bitlen >> 3) + (modulus_bitlen & 7 ? 1 : 0); @@ -50,39 +45,30 @@ static int pkcs_1_v1_5_decode_emsa(const unsigned char *msg, return -EINVAL; /* separate encoded message */ - if ((msg[0] != 0x00) || (msg[1] != (unsigned char)1)) { - result = -EINVAL; - goto bail; - } + if ((msg[0] != 0x00) || (msg[1] != (unsigned char)1)) + return -EINVAL; for (i = 2; i < modulus_len - 1; i++) if (msg[i] != 0xFF) break; /* separator check */ - if (msg[i] != 0) { + if (msg[i] != 0) /* There was no octet with hexadecimal value 0x00 to separate ps from m. */ - result = -EINVAL; - goto bail; - } + return -EINVAL; ps_len = i - 2; if (*outlen < (msglen - (2 + ps_len + 1))) { *outlen = msglen - (2 + ps_len + 1); - result = -EOVERFLOW; - goto bail; + return -EOVERFLOW; } *outlen = (msglen - (2 + ps_len + 1)); memcpy(out, &msg[2 + ps_len + 1], *outlen); - /* valid packet */ - *is_valid = 1; - result = 0; -bail: - return result; + return 0; } /* @@ -96,7 +82,7 @@ static int digsig_verify_rsa(struct key *key, unsigned long len; unsigned long mlen, mblen; unsigned nret, l; - int valid, head, i; + int head, i; unsigned char *out1 = NULL, *out2 = NULL; MPI in = NULL, res = NULL, pkey[2]; uint8_t *p, *datap, *endp; @@ -105,6 +91,10 @@ static int digsig_verify_rsa(struct key *key, down_read(&key->sem); ukp = key->payload.data; + + if (ukp->datalen < sizeof(*pkh)) + goto err1; + pkh = (struct pubkey_hdr *)ukp->data; if (pkh->version != 1) @@ -117,18 +107,23 @@ static int digsig_verify_rsa(struct key *key, goto err1; datap = pkh->mpi; - endp = datap + ukp->datalen; + endp = ukp->data + ukp->datalen; + + err = -ENOMEM; for (i = 0; i < pkh->nmpi; i++) { unsigned int remaining = endp - datap; pkey[i] = mpi_read_from_buffer(datap, &remaining); + if (!pkey[i]) + goto err; datap += remaining; } mblen = mpi_get_nbits(pkey[0]); mlen = (mblen + 7)/8; - err = -ENOMEM; + if (mlen == 0) + goto err; out1 = kzalloc(mlen, GFP_KERNEL); if (!out1) @@ -167,10 +162,9 @@ static int digsig_verify_rsa(struct key *key, memset(out1, 0, head); memcpy(out1 + head, p, l); - err = -EINVAL; - pkcs_1_v1_5_decode_emsa(out1, len, mblen, out2, &len, &valid); + err = pkcs_1_v1_5_decode_emsa(out1, len, mblen, out2, &len); - if (valid && len == hlen) + if (!err && len == hlen) err = memcmp(out2, h, hlen); err: @@ -178,8 +172,8 @@ err: mpi_free(res); kfree(out1); kfree(out2); - mpi_free(pkey[0]); - mpi_free(pkey[1]); + while (--i >= 0) + mpi_free(pkey[i]); err1: up_read(&key->sem); diff --git a/lib/mpi/longlong.h b/lib/mpi/longlong.h index b87487b40a8b..29f98624ef93 100644 --- a/lib/mpi/longlong.h +++ b/lib/mpi/longlong.h @@ -1200,18 +1200,40 @@ do { \ "r" ((USItype)(v)) \ : "%g1", "%g2" __AND_CLOBBER_CC) #define UMUL_TIME 39 /* 39 instructions */ -#endif -#ifndef udiv_qrnnd -#ifndef LONGLONG_STANDALONE +/* It's quite necessary to add this much assembler for the sparc. + The default udiv_qrnnd (in C) is more than 10 times slower! */ #define udiv_qrnnd(q, r, n1, n0, d) \ -do { USItype __r; \ - (q) = __udiv_qrnnd(&__r, (n1), (n0), (d)); \ - (r) = __r; \ -} while (0) - extern USItype __udiv_qrnnd(); -#define UDIV_TIME 140 -#endif /* LONGLONG_STANDALONE */ -#endif /* udiv_qrnnd */ + __asm__ ("! Inlined udiv_qrnnd\n\t" \ + "mov 32,%%g1\n\t" \ + "subcc %1,%2,%%g0\n\t" \ + "1: bcs 5f\n\t" \ + "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \ + "sub %1,%2,%1 ! this kills msb of n\n\t" \ + "addx %1,%1,%1 ! so this can't give carry\n\t" \ + "subcc %%g1,1,%%g1\n\t" \ + "2: bne 1b\n\t" \ + "subcc %1,%2,%%g0\n\t" \ + "bcs 3f\n\t" \ + "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \ + "b 3f\n\t" \ + "sub %1,%2,%1 ! this kills msb of n\n\t" \ + "4: sub %1,%2,%1\n\t" \ + "5: addxcc %1,%1,%1\n\t" \ + "bcc 2b\n\t" \ + "subcc %%g1,1,%%g1\n\t" \ + "! Got carry from n. Subtract next step to cancel this carry.\n\t" \ + "bne 4b\n\t" \ + "addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n\t" \ + "sub %1,%2,%1\n\t" \ + "3: xnor %0,0,%0\n\t" \ + "! End of inline udiv_qrnnd\n" \ + : "=&r" ((USItype)(q)), \ + "=&r" ((USItype)(r)) \ + : "r" ((USItype)(d)), \ + "1" ((USItype)(n1)), \ + "0" ((USItype)(n0)) : "%g1", "cc") +#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */ +#endif #endif /* __sparc__ */ /*************************************** diff --git a/lib/mpi/mpi-bit.c b/lib/mpi/mpi-bit.c index 854c9c6da025..2f526627e4f5 100644 --- a/lib/mpi/mpi-bit.c +++ b/lib/mpi/mpi-bit.c @@ -21,25 +21,6 @@ #include "mpi-internal.h" #include "longlong.h" -const unsigned char __clz_tab[] = { - 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, - 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, - 6, 6, 6, 6, 6, 6, 6, 6, - 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - 7, 7, 7, 7, 7, 7, 7, 7, - 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - 7, 7, 7, 7, 7, 7, 7, 7, - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 8, 8, 8, 8, -}; - #define A_LIMB_1 ((mpi_limb_t) 1) /**************** diff --git a/lib/mpi/mpi-div.c b/lib/mpi/mpi-div.c index c3087d1390ce..f68cbbb4d4a4 100644 --- a/lib/mpi/mpi-div.c +++ b/lib/mpi/mpi-div.c @@ -149,6 +149,9 @@ int mpi_tdiv_qr(MPI quot, MPI rem, MPI num, MPI den) mpi_ptr_t marker[5]; int markidx = 0; + if (!dsize) + return -EINVAL; + memset(marker, 0, sizeof(marker)); /* Ensure space is enough for quotient and remainder. @@ -207,6 +210,8 @@ int mpi_tdiv_qr(MPI quot, MPI rem, MPI num, MPI den) * numerator would be gradually overwritten by the quotient limbs. */ if (qp == np) { /* Copy NP object to temporary space. */ np = marker[markidx++] = mpi_alloc_limb_space(nsize); + if (!np) + goto nomem; MPN_COPY(np, qp, nsize); } } else /* Put quotient at top of remainder. */ diff --git a/lib/mpi/mpi-pow.c b/lib/mpi/mpi-pow.c index b04a3cf80080..67f3e79af914 100644 --- a/lib/mpi/mpi-pow.c +++ b/lib/mpi/mpi-pow.c @@ -59,7 +59,7 @@ int mpi_powm(MPI res, MPI base, MPI exp, MPI mod) ep = exp->d; if (!msize) - msize = 1 / msize; /* provoke a signal */ + return -EINVAL; if (!esize) { /* Exponent is zero, result is 1 mod MOD, i.e., 1 or 0 diff --git a/lib/mpi/mpicoder.c b/lib/mpi/mpicoder.c index 716802b774ea..f26b41fcb48c 100644 --- a/lib/mpi/mpicoder.c +++ b/lib/mpi/mpicoder.c @@ -20,78 +20,15 @@ #include "mpi-internal.h" -#define DIM(v) (sizeof(v)/sizeof((v)[0])) #define MAX_EXTERN_MPI_BITS 16384 -static uint8_t asn[15] = /* Object ID is 1.3.14.3.2.26 */ -{ 0x30, 0x21, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, - 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14 -}; - -MPI do_encode_md(const void *sha_buffer, unsigned nbits) -{ - int nframe = (nbits + 7) / 8; - uint8_t *frame, *fr_pt; - int i = 0, n; - size_t asnlen = DIM(asn); - MPI a = MPI_NULL; - - if (SHA1_DIGEST_LENGTH + asnlen + 4 > nframe) - pr_info("MPI: can't encode a %d bit MD into a %d bits frame\n", - (int)(SHA1_DIGEST_LENGTH * 8), (int)nbits); - - /* We encode the MD in this way: - * - * 0 A PAD(n bytes) 0 ASN(asnlen bytes) MD(len bytes) - * - * PAD consists of FF bytes. - */ - frame = kmalloc(nframe, GFP_KERNEL); - if (!frame) - return MPI_NULL; - n = 0; - frame[n++] = 0; - frame[n++] = 1; /* block type */ - i = nframe - SHA1_DIGEST_LENGTH - asnlen - 3; - - if (i <= 1) { - pr_info("MPI: message digest encoding failed\n"); - kfree(frame); - return a; - } - - memset(frame + n, 0xff, i); - n += i; - frame[n++] = 0; - memcpy(frame + n, &asn, asnlen); - n += asnlen; - memcpy(frame + n, sha_buffer, SHA1_DIGEST_LENGTH); - n += SHA1_DIGEST_LENGTH; - - i = nframe; - fr_pt = frame; - - if (n != nframe) { - printk - ("MPI: message digest encoding failed, frame length is wrong\n"); - kfree(frame); - return a; - } - - a = mpi_alloc((nframe + BYTES_PER_MPI_LIMB - 1) / BYTES_PER_MPI_LIMB); - mpi_set_buffer(a, frame, nframe, 0); - kfree(frame); - - return a; -} - MPI mpi_read_from_buffer(const void *xbuffer, unsigned *ret_nread) { const uint8_t *buffer = xbuffer; int i, j; unsigned nbits, nbytes, nlimbs, nread = 0; mpi_limb_t a; - MPI val = MPI_NULL; + MPI val = NULL; if (*ret_nread < 2) goto leave; @@ -108,7 +45,7 @@ MPI mpi_read_from_buffer(const void *xbuffer, unsigned *ret_nread) nlimbs = (nbytes + BYTES_PER_MPI_LIMB - 1) / BYTES_PER_MPI_LIMB; val = mpi_alloc(nlimbs); if (!val) - return MPI_NULL; + return NULL; i = BYTES_PER_MPI_LIMB - nbytes % BYTES_PER_MPI_LIMB; i %= BYTES_PER_MPI_LIMB; val->nbits = nbits; @@ -212,30 +149,6 @@ int mpi_fromstr(MPI val, const char *str) EXPORT_SYMBOL_GPL(mpi_fromstr); /**************** - * Special function to get the low 8 bytes from an mpi. - * This can be used as a keyid; KEYID is an 2 element array. - * Return the low 4 bytes. - */ -u32 mpi_get_keyid(const MPI a, u32 *keyid) -{ -#if BYTES_PER_MPI_LIMB == 4 - if (keyid) { - keyid[0] = a->nlimbs >= 2 ? a->d[1] : 0; - keyid[1] = a->nlimbs >= 1 ? a->d[0] : 0; - } - return a->nlimbs >= 1 ? a->d[0] : 0; -#elif BYTES_PER_MPI_LIMB == 8 - if (keyid) { - keyid[0] = a->nlimbs ? (u32) (a->d[0] >> 32) : 0; - keyid[1] = a->nlimbs ? (u32) (a->d[0] & 0xffffffff) : 0; - } - return a->nlimbs ? (u32) (a->d[0] & 0xffffffff) : 0; -#else -#error Make this function work with other LIMB sizes -#endif -} - -/**************** * Return an allocated buffer with the MPI (msb first). * NBYTES receives the length of this buffer. Caller must free the * return string (This function does return a 0 byte buffer with NBYTES diff --git a/lib/mpi/mpih-div.c b/lib/mpi/mpih-div.c index 87ede162dfab..cde1aaec18da 100644 --- a/lib/mpi/mpih-div.c +++ b/lib/mpi/mpih-div.c @@ -217,6 +217,10 @@ mpihelp_divrem(mpi_ptr_t qp, mpi_size_t qextra_limbs, case 0: /* We are asked to divide by zero, so go ahead and do it! (To make the compiler not remove this statement, return the value.) */ + /* + * existing clients of this function have been modified + * not to call it with dsize == 0, so this should not happen + */ return 1 / dsize; case 1: diff --git a/lib/mpi/mpiutil.c b/lib/mpi/mpiutil.c index eefc55d6b7f5..26e4ed31e256 100644 --- a/lib/mpi/mpiutil.c +++ b/lib/mpi/mpiutil.c @@ -58,6 +58,9 @@ mpi_ptr_t mpi_alloc_limb_space(unsigned nlimbs) { size_t len = nlimbs * sizeof(mpi_limb_t); + if (!len) + return NULL; + return kmalloc(len, GFP_KERNEL); } @@ -135,7 +138,7 @@ int mpi_copy(MPI *copied, const MPI a) size_t i; MPI b; - *copied = MPI_NULL; + *copied = NULL; if (a) { b = mpi_alloc(a->nlimbs); diff --git a/lib/pci_iomap.c b/lib/pci_iomap.c index 4b0fdc22e688..0d83ea8a9605 100644 --- a/lib/pci_iomap.c +++ b/lib/pci_iomap.c @@ -34,7 +34,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) if (maxlen && len > maxlen) len = maxlen; if (flags & IORESOURCE_IO) - return ioport_map(start, len); + return __pci_ioport_map(dev, start, len); if (flags & IORESOURCE_MEM) { if (flags & IORESOURCE_CACHEABLE) return ioremap(start, len); diff --git a/mm/compaction.c b/mm/compaction.c index 71a58f67f481..d9ebebe1a2aa 100644 --- a/mm/compaction.c +++ b/mm/compaction.c @@ -313,12 +313,34 @@ static isolate_migrate_t isolate_migratepages(struct zone *zone, } else if (!locked) spin_lock_irq(&zone->lru_lock); + /* + * migrate_pfn does not necessarily start aligned to a + * pageblock. Ensure that pfn_valid is called when moving + * into a new MAX_ORDER_NR_PAGES range in case of large + * memory holes within the zone + */ + if ((low_pfn & (MAX_ORDER_NR_PAGES - 1)) == 0) { + if (!pfn_valid(low_pfn)) { + low_pfn += MAX_ORDER_NR_PAGES - 1; + continue; + } + } + if (!pfn_valid_within(low_pfn)) continue; nr_scanned++; - /* Get the page and skip if free */ + /* + * Get the page and ensure the page is within the same zone. + * See the comment in isolate_freepages about overlapping + * nodes. It is deliberate that the new zone lock is not taken + * as memory compaction should not move pages between nodes. + */ page = pfn_to_page(low_pfn); + if (page_zone(page) != zone) + continue; + + /* Skip if free */ if (PageBuddy(page)) continue; diff --git a/mm/filemap.c b/mm/filemap.c index 97f49ed35bd2..b66275757c28 100644 --- a/mm/filemap.c +++ b/mm/filemap.c @@ -1400,15 +1400,12 @@ generic_file_aio_read(struct kiocb *iocb, const struct iovec *iov, unsigned long seg = 0; size_t count; loff_t *ppos = &iocb->ki_pos; - struct blk_plug plug; count = 0; retval = generic_segment_checks(iov, &nr_segs, &count, VERIFY_WRITE); if (retval) return retval; - blk_start_plug(&plug); - /* coalesce the iovecs and go direct-to-BIO for O_DIRECT */ if (filp->f_flags & O_DIRECT) { loff_t size; @@ -1424,8 +1421,12 @@ generic_file_aio_read(struct kiocb *iocb, const struct iovec *iov, retval = filemap_write_and_wait_range(mapping, pos, pos + iov_length(iov, nr_segs) - 1); if (!retval) { + struct blk_plug plug; + + blk_start_plug(&plug); retval = mapping->a_ops->direct_IO(READ, iocb, iov, pos, nr_segs); + blk_finish_plug(&plug); } if (retval > 0) { *ppos = pos + retval; @@ -1481,7 +1482,6 @@ generic_file_aio_read(struct kiocb *iocb, const struct iovec *iov, break; } out: - blk_finish_plug(&plug); return retval; } EXPORT_SYMBOL(generic_file_aio_read); diff --git a/mm/filemap_xip.c b/mm/filemap_xip.c index f91b2f687343..a4eb31132229 100644 --- a/mm/filemap_xip.c +++ b/mm/filemap_xip.c @@ -263,7 +263,12 @@ found: xip_pfn); if (err == -ENOMEM) return VM_FAULT_OOM; - BUG_ON(err); + /* + * err == -EBUSY is fine, we've raced against another thread + * that faulted-in the same page + */ + if (err != -EBUSY) + BUG_ON(err); return VM_FAULT_NOPAGE; } else { int err, ret = VM_FAULT_OOM; diff --git a/mm/huge_memory.c b/mm/huge_memory.c index b3ffc21ce801..91d3efb25d15 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c @@ -2083,7 +2083,7 @@ static void collect_mm_slot(struct mm_slot *mm_slot) { struct mm_struct *mm = mm_slot->mm; - VM_BUG_ON(!spin_is_locked(&khugepaged_mm_lock)); + VM_BUG_ON(NR_CPUS != 1 && !spin_is_locked(&khugepaged_mm_lock)); if (khugepaged_test_exit(mm)) { /* free mm_slot */ @@ -2113,7 +2113,7 @@ static unsigned int khugepaged_scan_mm_slot(unsigned int pages, int progress = 0; VM_BUG_ON(!pages); - VM_BUG_ON(!spin_is_locked(&khugepaged_mm_lock)); + VM_BUG_ON(NR_CPUS != 1 && !spin_is_locked(&khugepaged_mm_lock)); if (khugepaged_scan.mm_slot) mm_slot = khugepaged_scan.mm_slot; diff --git a/mm/kmemleak.c b/mm/kmemleak.c index c833addd94d7..45eb6217bf38 100644 --- a/mm/kmemleak.c +++ b/mm/kmemleak.c @@ -1036,7 +1036,7 @@ void __ref kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) { pr_debug("%s(0x%p)\n", __func__, ptr); - if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) + if (atomic_read(&kmemleak_enabled) && ptr && size && !IS_ERR(ptr)) add_scan_area((unsigned long)ptr, size, gfp); else if (atomic_read(&kmemleak_early_log)) log_early(KMEMLEAK_SCAN_AREA, ptr, size, 0); @@ -1757,6 +1757,7 @@ void __init kmemleak_init(void) #ifdef CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF if (!kmemleak_skip_disable) { + atomic_set(&kmemleak_early_log, 0); kmemleak_disable(); return; } diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 556859fec4ef..6728a7ae6f2d 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c @@ -776,7 +776,8 @@ static void memcg_check_events(struct mem_cgroup *memcg, struct page *page) /* threshold event is triggered in finer grain than soft limit */ if (unlikely(mem_cgroup_event_ratelimit(memcg, MEM_CGROUP_TARGET_THRESH))) { - bool do_softlimit, do_numainfo; + bool do_softlimit; + bool do_numainfo __maybe_unused; do_softlimit = mem_cgroup_event_ratelimit(memcg, MEM_CGROUP_TARGET_SOFTLIMIT); diff --git a/mm/migrate.c b/mm/migrate.c index 9871a56d82c3..df141f60289e 100644 --- a/mm/migrate.c +++ b/mm/migrate.c @@ -445,7 +445,6 @@ void migrate_page_copy(struct page *newpage, struct page *page) ClearPageSwapCache(page); ClearPagePrivate(page); set_page_private(page, 0); - page->mapping = NULL; /* * If any waiters have accumulated on the new page then @@ -667,6 +666,7 @@ static int move_to_new_page(struct page *newpage, struct page *page, } else { if (remap_swapcache) remove_migration_ptes(page, newpage); + page->mapping = NULL; } unlock_page(newpage); diff --git a/mm/process_vm_access.c b/mm/process_vm_access.c index e920aa3ce104..c20ff48994c2 100644 --- a/mm/process_vm_access.c +++ b/mm/process_vm_access.c @@ -298,23 +298,18 @@ static ssize_t process_vm_rw_core(pid_t pid, const struct iovec *lvec, goto free_proc_pages; } - task_lock(task); - if (__ptrace_may_access(task, PTRACE_MODE_ATTACH)) { - task_unlock(task); - rc = -EPERM; - goto put_task_struct; - } - mm = task->mm; - - if (!mm || (task->flags & PF_KTHREAD)) { - task_unlock(task); - rc = -EINVAL; + mm = mm_access(task, PTRACE_MODE_ATTACH); + if (!mm || IS_ERR(mm)) { + rc = IS_ERR(mm) ? PTR_ERR(mm) : -ESRCH; + /* + * Explicitly map EACCES to EPERM as EPERM is a more a + * appropriate error code for process_vw_readv/writev + */ + if (rc == -EACCES) + rc = -EPERM; goto put_task_struct; } - atomic_inc(&mm->mm_users); - task_unlock(task); - for (i = 0; i < riovcnt && iov_l_curr_idx < liovcnt; i++) { rc = process_vm_rw_single_vec( (unsigned long)rvec[i].iov_base, rvec[i].iov_len, diff --git a/mm/swap.c b/mm/swap.c index b0f529b38979..fff1ff7fb9ad 100644 --- a/mm/swap.c +++ b/mm/swap.c @@ -659,7 +659,7 @@ void lru_add_page_tail(struct zone* zone, VM_BUG_ON(!PageHead(page)); VM_BUG_ON(PageCompound(page_tail)); VM_BUG_ON(PageLRU(page_tail)); - VM_BUG_ON(!spin_is_locked(&zone->lru_lock)); + VM_BUG_ON(NR_CPUS != 1 && !spin_is_locked(&zone->lru_lock)); SetPageLRU(page_tail); diff --git a/net/ceph/ceph_common.c b/net/ceph/ceph_common.c index 97f70e50ad3b..761ad9d6cc3b 100644 --- a/net/ceph/ceph_common.c +++ b/net/ceph/ceph_common.c @@ -85,8 +85,6 @@ int ceph_check_fsid(struct ceph_client *client, struct ceph_fsid *fsid) } else { pr_info("client%lld fsid %pU\n", ceph_client_id(client), fsid); memcpy(&client->fsid, fsid, sizeof(*fsid)); - ceph_debugfs_client_init(client); - client->have_fsid = true; } return 0; } diff --git a/net/ceph/mon_client.c b/net/ceph/mon_client.c index 0b62deae42bd..1845cde26227 100644 --- a/net/ceph/mon_client.c +++ b/net/ceph/mon_client.c @@ -8,8 +8,8 @@ #include <linux/ceph/mon_client.h> #include <linux/ceph/libceph.h> +#include <linux/ceph/debugfs.h> #include <linux/ceph/decode.h> - #include <linux/ceph/auth.h> /* @@ -340,8 +340,19 @@ static void ceph_monc_handle_map(struct ceph_mon_client *monc, client->monc.monmap = monmap; kfree(old); + if (!client->have_fsid) { + client->have_fsid = true; + mutex_unlock(&monc->mutex); + /* + * do debugfs initialization without mutex to avoid + * creating a locking dependency + */ + ceph_debugfs_client_init(client); + goto out_unlocked; + } out: mutex_unlock(&monc->mutex); +out_unlocked: wake_up_all(&client->auth_wq); } diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index e3bfcbe8a520..a3b9782441f9 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -1924,6 +1924,12 @@ sub process { my $pre_ctx = "$1$2"; my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, 0); + + if ($line =~ /^\+\t{6,}/) { + WARN("DEEP_INDENTATION", + "Too many leading tabs - consider code refactoring\n" . $herecurr); + } + my $ctx_cnt = $realcnt - $#ctx - 1; my $ctx = join("\n", @ctx); diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index d1aa4218f129..d760371c32f5 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -17,6 +17,7 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/module.h> +#include <linux/io.h> #include <sound/ac97_codec.h> #include <sound/pxa2xx-lib.h> diff --git a/sound/arm/pxa2xx-ac97.c b/sound/arm/pxa2xx-ac97.c index 3a39626a82d6..afef72c4f0d3 100644 --- a/sound/arm/pxa2xx-ac97.c +++ b/sound/arm/pxa2xx-ac97.c @@ -11,6 +11,7 @@ */ #include <linux/init.h> +#include <linux/io.h> #include <linux/module.h> #include <linux/platform_device.h> diff --git a/sound/isa/sb/emu8000_patch.c b/sound/isa/sb/emu8000_patch.c index e09f144177f5..c99c6078be33 100644 --- a/sound/isa/sb/emu8000_patch.c +++ b/sound/isa/sb/emu8000_patch.c @@ -22,7 +22,6 @@ #include "emu8000_local.h" #include <asm/uaccess.h> #include <linux/moduleparam.h> -#include <linux/moduleparam.h> static int emu8000_reset_addr; module_param(emu8000_reset_addr, int, 0444); diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 4df72c0e8c37..c2c65f63bf06 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -1447,7 +1447,7 @@ void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid, for (i = 0; i < c->cvt_setups.used; i++) { p = snd_array_elem(&c->cvt_setups, i); if (!p->active && p->stream_tag == stream_tag && - get_wcaps_type(get_wcaps(codec, p->nid)) == type) + get_wcaps_type(get_wcaps(c, p->nid)) == type) p->dirty = 1; } } diff --git a/sound/pci/hda/hda_jack.c b/sound/pci/hda/hda_jack.c index d8a35da0803f..9d819c4b4923 100644 --- a/sound/pci/hda/hda_jack.c +++ b/sound/pci/hda/hda_jack.c @@ -282,7 +282,8 @@ int snd_hda_jack_add_kctl(struct hda_codec *codec, hda_nid_t nid, EXPORT_SYMBOL_HDA(snd_hda_jack_add_kctl); static int add_jack_kctl(struct hda_codec *codec, hda_nid_t nid, - const struct auto_pin_cfg *cfg) + const struct auto_pin_cfg *cfg, + char *lastname, int *lastidx) { unsigned int def_conf, conn; char name[44]; @@ -298,6 +299,10 @@ static int add_jack_kctl(struct hda_codec *codec, hda_nid_t nid, return 0; snd_hda_get_pin_label(codec, nid, cfg, name, sizeof(name), &idx); + if (!strcmp(name, lastname) && idx == *lastidx) + idx++; + strncpy(lastname, name, 44); + *lastidx = idx; err = snd_hda_jack_add_kctl(codec, nid, name, idx); if (err < 0) return err; @@ -311,41 +316,42 @@ int snd_hda_jack_add_kctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) { const hda_nid_t *p; - int i, err; + int i, err, lastidx = 0; + char lastname[44] = ""; for (i = 0, p = cfg->line_out_pins; i < cfg->line_outs; i++, p++) { - err = add_jack_kctl(codec, *p, cfg); + err = add_jack_kctl(codec, *p, cfg, lastname, &lastidx); if (err < 0) return err; } for (i = 0, p = cfg->hp_pins; i < cfg->hp_outs; i++, p++) { if (*p == *cfg->line_out_pins) /* might be duplicated */ break; - err = add_jack_kctl(codec, *p, cfg); + err = add_jack_kctl(codec, *p, cfg, lastname, &lastidx); if (err < 0) return err; } for (i = 0, p = cfg->speaker_pins; i < cfg->speaker_outs; i++, p++) { if (*p == *cfg->line_out_pins) /* might be duplicated */ break; - err = add_jack_kctl(codec, *p, cfg); + err = add_jack_kctl(codec, *p, cfg, lastname, &lastidx); if (err < 0) return err; } for (i = 0; i < cfg->num_inputs; i++) { - err = add_jack_kctl(codec, cfg->inputs[i].pin, cfg); + err = add_jack_kctl(codec, cfg->inputs[i].pin, cfg, lastname, &lastidx); if (err < 0) return err; } for (i = 0, p = cfg->dig_out_pins; i < cfg->dig_outs; i++, p++) { - err = add_jack_kctl(codec, *p, cfg); + err = add_jack_kctl(codec, *p, cfg, lastname, &lastidx); if (err < 0) return err; } - err = add_jack_kctl(codec, cfg->dig_in_pin, cfg); + err = add_jack_kctl(codec, cfg->dig_in_pin, cfg, lastname, &lastidx); if (err < 0) return err; - err = add_jack_kctl(codec, cfg->mono_out_pin, cfg); + err = add_jack_kctl(codec, cfg->mono_out_pin, cfg, lastname, &lastidx); if (err < 0) return err; return 0; diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c index 35abe3c62908..21d91d580da8 100644 --- a/sound/pci/hda/patch_ca0132.c +++ b/sound/pci/hda/patch_ca0132.c @@ -728,18 +728,19 @@ static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol, err = chipio_read(codec, REG_CODEC_MUTE, &data); if (err < 0) - return err; + goto exit; /* *valp 0 is mute, 1 is unmute */ data = (data & 0x7f) | (*valp ? 0 : 0x80); - chipio_write(codec, REG_CODEC_MUTE, data); + err = chipio_write(codec, REG_CODEC_MUTE, data); if (err < 0) - return err; + goto exit; spec->curr_hp_switch = *valp; + exit: snd_hda_power_down(codec); - return 1; + return err < 0 ? err : 1; } static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol, @@ -770,18 +771,19 @@ static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol, err = chipio_read(codec, REG_CODEC_MUTE, &data); if (err < 0) - return err; + goto exit; /* *valp 0 is mute, 1 is unmute */ data = (data & 0xef) | (*valp ? 0 : 0x10); - chipio_write(codec, REG_CODEC_MUTE, data); + err = chipio_write(codec, REG_CODEC_MUTE, data); if (err < 0) - return err; + goto exit; spec->curr_speaker_switch = *valp; + exit: snd_hda_power_down(codec); - return 1; + return err < 0 ? err : 1; } static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol, @@ -819,25 +821,26 @@ static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol, err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data); if (err < 0) - return err; + goto exit; val = 31 - left_vol; data = (data & 0xe0) | val; - chipio_write(codec, REG_CODEC_HP_VOL_L, data); + err = chipio_write(codec, REG_CODEC_HP_VOL_L, data); if (err < 0) - return err; + goto exit; val = 31 - right_vol; data = (data & 0xe0) | val; - chipio_write(codec, REG_CODEC_HP_VOL_R, data); + err = chipio_write(codec, REG_CODEC_HP_VOL_R, data); if (err < 0) - return err; + goto exit; spec->curr_hp_volume[0] = left_vol; spec->curr_hp_volume[1] = right_vol; + exit: snd_hda_power_down(codec); - return 1; + return err < 0 ? err : 1; } static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid) @@ -936,6 +939,8 @@ static int ca0132_build_controls(struct hda_codec *codec) if (err < 0) return err; err = add_in_volume(codec, spec->dig_in, "IEC958"); + if (err < 0) + return err; } return 0; } diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 0e99357e822c..bc5a993d1146 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c @@ -988,8 +988,10 @@ static void cs_automic(struct hda_codec *codec) change_cur_input(codec, !spec->automic_idx, 0); } else { if (present) { - spec->last_input = spec->cur_input; - spec->cur_input = spec->automic_idx; + if (spec->cur_input != spec->automic_idx) { + spec->last_input = spec->cur_input; + spec->cur_input = spec->automic_idx; + } } else { spec->cur_input = spec->last_input; } diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 0db1dc49382b..9350f3c3bdf8 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -177,6 +177,7 @@ struct alc_spec { unsigned int detect_lo:1; /* Line-out detection enabled */ unsigned int automute_speaker_possible:1; /* there are speakers and either LO or HP */ unsigned int automute_lo_possible:1; /* there are line outs and HP */ + unsigned int keep_vref_in_automute:1; /* Don't clear VREF in automute */ /* other flags */ unsigned int no_analog :1; /* digital I/O only */ @@ -495,13 +496,24 @@ static void do_automute(struct hda_codec *codec, int num_pins, hda_nid_t *pins, for (i = 0; i < num_pins; i++) { hda_nid_t nid = pins[i]; + unsigned int val; if (!nid) break; switch (spec->automute_mode) { case ALC_AUTOMUTE_PIN: + /* don't reset VREF value in case it's controlling + * the amp (see alc861_fixup_asus_amp_vref_0f()) + */ + if (spec->keep_vref_in_automute) { + val = snd_hda_codec_read(codec, nid, 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + val &= ~PIN_HP; + } else + val = 0; + val |= pin_bits; snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, - pin_bits); + val); break; case ALC_AUTOMUTE_AMP: snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0, @@ -1843,6 +1855,8 @@ static const char * const alc_slave_vols[] = { "Speaker Playback Volume", "Mono Playback Volume", "Line-Out Playback Volume", + "CLFE Playback Volume", + "Bass Speaker Playback Volume", "PCM Playback Volume", NULL, }; @@ -1858,6 +1872,8 @@ static const char * const alc_slave_sws[] = { "Mono Playback Switch", "IEC958 Playback Switch", "Line-Out Playback Switch", + "CLFE Playback Switch", + "Bass Speaker Playback Switch", "PCM Playback Switch", NULL, }; @@ -2306,7 +2322,7 @@ static int alc_build_pcms(struct hda_codec *codec) "%s Analog", codec->chip_name); info->name = spec->stream_name_analog; - if (spec->multiout.dac_nids > 0) { + if (spec->multiout.num_dacs > 0) { p = spec->stream_analog_playback; if (!p) p = &alc_pcm_analog_playback; @@ -4735,7 +4751,6 @@ enum { ALC262_FIXUP_FSC_H270, ALC262_FIXUP_HP_Z200, ALC262_FIXUP_TYAN, - ALC262_FIXUP_TOSHIBA_RX1, ALC262_FIXUP_LENOVO_3000, ALC262_FIXUP_BENQ, ALC262_FIXUP_BENQ_T31, @@ -4765,16 +4780,6 @@ static const struct alc_fixup alc262_fixups[] = { { } } }, - [ALC262_FIXUP_TOSHIBA_RX1] = { - .type = ALC_FIXUP_PINS, - .v.pins = (const struct alc_pincfg[]) { - { 0x14, 0x90170110 }, /* speaker */ - { 0x15, 0x0421101f }, /* HP */ - { 0x1a, 0x40f000f0 }, /* N/A */ - { 0x1b, 0x40f000f0 }, /* N/A */ - { 0x1e, 0x40f000f0 }, /* N/A */ - } - }, [ALC262_FIXUP_LENOVO_3000] = { .type = ALC_FIXUP_VERBS, .v.verbs = (const struct hda_verb[]) { @@ -4807,8 +4812,6 @@ static const struct snd_pci_quirk alc262_fixup_tbl[] = { SND_PCI_QUIRK(0x10cf, 0x1397, "Fujitsu", ALC262_FIXUP_BENQ), SND_PCI_QUIRK(0x10cf, 0x142d, "Fujitsu Lifebook E8410", ALC262_FIXUP_BENQ), SND_PCI_QUIRK(0x10f1, 0x2915, "Tyan Thunder n6650W", ALC262_FIXUP_TYAN), - SND_PCI_QUIRK(0x1179, 0x0001, "Toshiba dynabook SS RX1", - ALC262_FIXUP_TOSHIBA_RX1), SND_PCI_QUIRK(0x1734, 0x1147, "FSC Celsius H270", ALC262_FIXUP_FSC_H270), SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000", ALC262_FIXUP_LENOVO_3000), SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_FIXUP_BENQ), @@ -5377,7 +5380,6 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x8330, "ASUS Eeepc P703 P900A", ALC269_FIXUP_AMIC), SND_PCI_QUIRK(0x1043, 0x1013, "ASUS N61Da", ALC269_FIXUP_AMIC), - SND_PCI_QUIRK(0x1043, 0x1113, "ASUS N63Jn", ALC269_FIXUP_AMIC), SND_PCI_QUIRK(0x1043, 0x1143, "ASUS B53f", ALC269_FIXUP_AMIC), SND_PCI_QUIRK(0x1043, 0x1133, "ASUS UJ20ft", ALC269_FIXUP_AMIC), SND_PCI_QUIRK(0x1043, 0x1183, "ASUS K72DR", ALC269_FIXUP_AMIC), @@ -5589,6 +5591,25 @@ enum { PINFIX_ASUS_A6RP, }; +/* On some laptops, VREF of pin 0x0f is abused for controlling the main amp */ +static void alc861_fixup_asus_amp_vref_0f(struct hda_codec *codec, + const struct alc_fixup *fix, int action) +{ + struct alc_spec *spec = codec->spec; + unsigned int val; + + if (action != ALC_FIXUP_ACT_INIT) + return; + val = snd_hda_codec_read(codec, 0x0f, 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + if (!(val & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))) + val |= AC_PINCTL_IN_EN; + val |= AC_PINCTL_VREF_50; + snd_hda_codec_write(codec, 0x0f, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, val); + spec->keep_vref_in_automute = 1; +} + static const struct alc_fixup alc861_fixups[] = { [PINFIX_FSC_AMILO_PI1505] = { .type = ALC_FIXUP_PINS, @@ -5599,17 +5620,14 @@ static const struct alc_fixup alc861_fixups[] = { } }, [PINFIX_ASUS_A6RP] = { - .type = ALC_FIXUP_VERBS, - .v.verbs = (const struct hda_verb[]) { - /* node 0x0f VREF seems controlling the master output */ - { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50 }, - { } - }, + .type = ALC_FIXUP_FUNC, + .v.func = alc861_fixup_asus_amp_vref_0f, }, }; static const struct snd_pci_quirk alc861_fixup_tbl[] = { - SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", PINFIX_ASUS_A6RP), + SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", PINFIX_ASUS_A6RP), + SND_PCI_QUIRK(0x1584, 0x0000, "Uniwill ECS M31EI", PINFIX_ASUS_A6RP), SND_PCI_QUIRK(0x1584, 0x2b01, "Haier W18", PINFIX_ASUS_A6RP), SND_PCI_QUIRK(0x1734, 0x10c7, "FSC Amilo Pi1505", PINFIX_FSC_AMILO_PI1505), {} diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 03e63fed9caf..284e311040fe 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c @@ -199,6 +199,9 @@ struct via_spec { unsigned int no_pin_power_ctl; enum VIA_HDA_CODEC codec_type; + /* analog low-power control */ + bool alc_mode; + /* smart51 setup */ unsigned int smart51_nums; hda_nid_t smart51_pins[2]; @@ -687,6 +690,15 @@ static void via_auto_init_analog_input(struct hda_codec *codec) } } +static void update_power_state(struct hda_codec *codec, hda_nid_t nid, + unsigned int parm) +{ + if (snd_hda_codec_read(codec, nid, 0, + AC_VERB_GET_POWER_STATE, 0) == parm) + return; + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, parm); +} + static void set_pin_power_state(struct hda_codec *codec, hda_nid_t nid, unsigned int *affected_parm) { @@ -709,7 +721,7 @@ static void set_pin_power_state(struct hda_codec *codec, hda_nid_t nid, } else parm = AC_PWRST_D3; - snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, nid, parm); } static int via_pin_power_ctl_info(struct snd_kcontrol *kcontrol, @@ -749,6 +761,7 @@ static int via_pin_power_ctl_put(struct snd_kcontrol *kcontrol, return 0; spec->no_pin_power_ctl = val; set_widgets_power_state(codec); + analog_low_current_mode(codec); return 1; } @@ -1036,13 +1049,19 @@ static bool is_aa_path_mute(struct hda_codec *codec) } /* enter/exit analog low-current mode */ -static void analog_low_current_mode(struct hda_codec *codec) +static void __analog_low_current_mode(struct hda_codec *codec, bool force) { struct via_spec *spec = codec->spec; bool enable; unsigned int verb, parm; - enable = is_aa_path_mute(codec) && (spec->opened_streams != 0); + if (spec->no_pin_power_ctl) + enable = false; + else + enable = is_aa_path_mute(codec) && !spec->opened_streams; + if (enable == spec->alc_mode && !force) + return; + spec->alc_mode = enable; /* decide low current mode's verb & parameter */ switch (spec->codec_type) { @@ -1074,6 +1093,11 @@ static void analog_low_current_mode(struct hda_codec *codec) snd_hda_codec_write(codec, codec->afg, 0, verb, parm); } +static void analog_low_current_mode(struct hda_codec *codec) +{ + return __analog_low_current_mode(codec, false); +} + /* * generic initialization of ADC, input mixers and output mixers */ @@ -1446,6 +1470,7 @@ static int via_build_controls(struct hda_codec *codec) struct snd_kcontrol *kctl; int err, i; + spec->no_pin_power_ctl = 1; if (spec->set_widgets_power_state) if (!via_clone_control(spec, &via_pin_power_ctl_enum)) return -ENOMEM; @@ -1499,10 +1524,6 @@ static int via_build_controls(struct hda_codec *codec) return err; } - /* init power states */ - set_widgets_power_state(codec); - analog_low_current_mode(codec); - via_free_kctls(codec); /* no longer needed */ err = snd_hda_jack_add_kctls(codec, &spec->autocfg); @@ -2295,10 +2316,7 @@ static int via_mux_enum_put(struct snd_kcontrol *kcontrol, if (mux) { /* switch to D0 beofre change index */ - if (snd_hda_codec_read(codec, mux, 0, - AC_VERB_GET_POWER_STATE, 0x00) != AC_PWRST_D0) - snd_hda_codec_write(codec, mux, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, mux, AC_PWRST_D0); snd_hda_codec_write(codec, mux, 0, AC_VERB_SET_CONNECT_SEL, spec->inputs[cur].mux_idx); @@ -2776,6 +2794,10 @@ static int via_init(struct hda_codec *codec) for (i = 0; i < spec->num_iverbs; i++) snd_hda_sequence_write(codec, spec->init_verbs[i]); + /* init power states */ + set_widgets_power_state(codec); + __analog_low_current_mode(codec, true); + via_auto_init_multi_out(codec); via_auto_init_hp_out(codec); via_auto_init_speaker_out(codec); @@ -2922,9 +2944,9 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) if (imux_is_smixer) parm = AC_PWRST_D0; /* SW0 (17h), AIW 0/1 (13h/14h) */ - snd_hda_codec_write(codec, 0x17, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x14, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x17, parm); + update_power_state(codec, 0x13, parm); + update_power_state(codec, 0x14, parm); /* outputs */ /* PW0 (19h), SW1 (18h), AOW1 (11h) */ @@ -2932,8 +2954,8 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) set_pin_power_state(codec, 0x19, &parm); if (spec->smart51_enabled) set_pin_power_state(codec, 0x1b, &parm); - snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x18, parm); + update_power_state(codec, 0x11, parm); /* PW6 (22h), SW2 (26h), AOW2 (24h) */ if (is_8ch) { @@ -2941,20 +2963,16 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) set_pin_power_state(codec, 0x22, &parm); if (spec->smart51_enabled) set_pin_power_state(codec, 0x1a, &parm); - snd_hda_codec_write(codec, 0x26, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x24, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x26, parm); + update_power_state(codec, 0x24, parm); } else if (codec->vendor_id == 0x11064397) { /* PW7(23h), SW2(27h), AOW2(25h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x23, &parm); if (spec->smart51_enabled) set_pin_power_state(codec, 0x1a, &parm); - snd_hda_codec_write(codec, 0x27, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x25, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x27, parm); + update_power_state(codec, 0x25, parm); } /* PW 3/4/7 (1ch/1dh/23h) */ @@ -2966,17 +2984,13 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) set_pin_power_state(codec, 0x23, &parm); /* MW0 (16h), Sw3 (27h), AOW 0/3 (10h/25h) */ - snd_hda_codec_write(codec, 0x16, 0, AC_VERB_SET_POWER_STATE, - imux_is_smixer ? AC_PWRST_D0 : parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x16, imux_is_smixer ? AC_PWRST_D0 : parm); + update_power_state(codec, 0x10, parm); if (is_8ch) { - snd_hda_codec_write(codec, 0x25, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x27, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x25, parm); + update_power_state(codec, 0x27, parm); } else if (codec->vendor_id == 0x11064397 && spec->hp_independent_mode) - snd_hda_codec_write(codec, 0x25, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x25, parm); } static int patch_vt1708S(struct hda_codec *codec); @@ -3149,10 +3163,10 @@ static void set_widgets_power_state_vt1702(struct hda_codec *codec) if (imux_is_smixer) parm = AC_PWRST_D0; /* SW0 (13h) = stereo mixer (idx 3) */ /* SW0 (13h), AIW 0/1/2 (12h/1fh/20h) */ - snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x12, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x13, parm); + update_power_state(codec, 0x12, parm); + update_power_state(codec, 0x1f, parm); + update_power_state(codec, 0x20, parm); /* outputs */ /* PW 3/4 (16h/17h) */ @@ -3160,10 +3174,9 @@ static void set_widgets_power_state_vt1702(struct hda_codec *codec) set_pin_power_state(codec, 0x17, &parm); set_pin_power_state(codec, 0x16, &parm); /* MW0 (1ah), AOW 0/1 (10h/1dh) */ - snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_POWER_STATE, - imux_is_smixer ? AC_PWRST_D0 : parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1d, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1a, imux_is_smixer ? AC_PWRST_D0 : parm); + update_power_state(codec, 0x10, parm); + update_power_state(codec, 0x1d, parm); } static int patch_vt1702(struct hda_codec *codec) @@ -3228,52 +3241,48 @@ static void set_widgets_power_state_vt1718S(struct hda_codec *codec) if (imux_is_smixer) parm = AC_PWRST_D0; /* MUX6/7 (1eh/1fh), AIW 0/1 (10h/11h) */ - snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1e, parm); + update_power_state(codec, 0x1f, parm); + update_power_state(codec, 0x10, parm); + update_power_state(codec, 0x11, parm); /* outputs */ /* PW3 (27h), MW2 (1ah), AOW3 (bh) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x27, &parm); - snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0xb, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1a, parm); + update_power_state(codec, 0xb, parm); /* PW2 (26h), AOW2 (ah) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x26, &parm); if (spec->smart51_enabled) set_pin_power_state(codec, 0x2b, &parm); - snd_hda_codec_write(codec, 0xa, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0xa, parm); /* PW0 (24h), AOW0 (8h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x24, &parm); if (!spec->hp_independent_mode) /* check for redirected HP */ set_pin_power_state(codec, 0x28, &parm); - snd_hda_codec_write(codec, 0x8, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x8, parm); /* MW9 (21h), Mw2 (1ah), AOW0 (8h) */ - snd_hda_codec_write(codec, 0x21, 0, AC_VERB_SET_POWER_STATE, - imux_is_smixer ? AC_PWRST_D0 : parm); + update_power_state(codec, 0x21, imux_is_smixer ? AC_PWRST_D0 : parm); /* PW1 (25h), AOW1 (9h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x25, &parm); if (spec->smart51_enabled) set_pin_power_state(codec, 0x2a, &parm); - snd_hda_codec_write(codec, 0x9, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x9, parm); if (spec->hp_independent_mode) { /* PW4 (28h), MW3 (1bh), MUX1(34h), AOW4 (ch) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x28, &parm); - snd_hda_codec_write(codec, 0x1b, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x34, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0xc, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1b, parm); + update_power_state(codec, 0x34, parm); + update_power_state(codec, 0xc, parm); } } @@ -3433,8 +3442,8 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) if (imux_is_smixer) parm = AC_PWRST_D0; /* SW0 (17h), AIW0(13h) */ - snd_hda_codec_write(codec, 0x17, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x17, parm); + update_power_state(codec, 0x13, parm); parm = AC_PWRST_D3; set_pin_power_state(codec, 0x1e, &parm); @@ -3442,12 +3451,11 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) if (spec->dmic_enabled) set_pin_power_state(codec, 0x22, &parm); else - snd_hda_codec_write(codec, 0x22, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); + update_power_state(codec, 0x22, AC_PWRST_D3); /* SW2(26h), AIW1(14h) */ - snd_hda_codec_write(codec, 0x26, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x14, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x26, parm); + update_power_state(codec, 0x14, parm); /* outputs */ /* PW0 (19h), SW1 (18h), AOW1 (11h) */ @@ -3456,8 +3464,8 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) /* Smart 5.1 PW2(1bh) */ if (spec->smart51_enabled) set_pin_power_state(codec, 0x1b, &parm); - snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x18, parm); + update_power_state(codec, 0x11, parm); /* PW7 (23h), SW3 (27h), AOW3 (25h) */ parm = AC_PWRST_D3; @@ -3465,12 +3473,12 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) /* Smart 5.1 PW1(1ah) */ if (spec->smart51_enabled) set_pin_power_state(codec, 0x1a, &parm); - snd_hda_codec_write(codec, 0x27, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x27, parm); /* Smart 5.1 PW5(1eh) */ if (spec->smart51_enabled) set_pin_power_state(codec, 0x1e, &parm); - snd_hda_codec_write(codec, 0x25, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x25, parm); /* Mono out */ /* SW4(28h)->MW1(29h)-> PW12 (2ah)*/ @@ -3486,9 +3494,9 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) mono_out = 1; } parm = mono_out ? AC_PWRST_D0 : AC_PWRST_D3; - snd_hda_codec_write(codec, 0x28, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x29, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x2a, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x28, parm); + update_power_state(codec, 0x29, parm); + update_power_state(codec, 0x2a, parm); /* PW 3/4 (1ch/1dh) */ parm = AC_PWRST_D3; @@ -3496,15 +3504,12 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) set_pin_power_state(codec, 0x1d, &parm); /* HP Independent Mode, power on AOW3 */ if (spec->hp_independent_mode) - snd_hda_codec_write(codec, 0x25, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x25, parm); /* force to D0 for internal Speaker */ /* MW0 (16h), AOW0 (10h) */ - snd_hda_codec_write(codec, 0x16, 0, AC_VERB_SET_POWER_STATE, - imux_is_smixer ? AC_PWRST_D0 : parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, - mono_out ? AC_PWRST_D0 : parm); + update_power_state(codec, 0x16, imux_is_smixer ? AC_PWRST_D0 : parm); + update_power_state(codec, 0x10, mono_out ? AC_PWRST_D0 : parm); } static int patch_vt1716S(struct hda_codec *codec) @@ -3580,54 +3585,45 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) set_pin_power_state(codec, 0x2b, &parm); parm = AC_PWRST_D0; /* MUX9/10 (1eh/1fh), AIW 0/1 (10h/11h) */ - snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1e, parm); + update_power_state(codec, 0x1f, parm); + update_power_state(codec, 0x10, parm); + update_power_state(codec, 0x11, parm); /* outputs */ /* AOW0 (8h)*/ - snd_hda_codec_write(codec, 0x8, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x8, parm); if (spec->codec_type == VT1802) { /* PW4 (28h), MW4 (18h), MUX4(38h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x28, &parm); - snd_hda_codec_write(codec, 0x18, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x38, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x18, parm); + update_power_state(codec, 0x38, parm); } else { /* PW4 (26h), MW4 (1ch), MUX4(37h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x26, &parm); - snd_hda_codec_write(codec, 0x1c, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x37, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1c, parm); + update_power_state(codec, 0x37, parm); } if (spec->codec_type == VT1802) { /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x25, &parm); - snd_hda_codec_write(codec, 0x15, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x35, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x15, parm); + update_power_state(codec, 0x35, parm); } else { /* PW1 (25h), MW1 (19h), MUX1(35h), AOW1 (9h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x25, &parm); - snd_hda_codec_write(codec, 0x19, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x35, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x19, parm); + update_power_state(codec, 0x35, parm); } if (spec->hp_independent_mode) - snd_hda_codec_write(codec, 0x9, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x9, AC_PWRST_D0); /* Class-D */ /* PW0 (24h), MW0(18h/14h), MUX0(34h) */ @@ -3637,12 +3633,10 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) set_pin_power_state(codec, 0x24, &parm); parm = present ? AC_PWRST_D3 : AC_PWRST_D0; if (spec->codec_type == VT1802) - snd_hda_codec_write(codec, 0x14, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x14, parm); else - snd_hda_codec_write(codec, 0x18, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x34, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x18, parm); + update_power_state(codec, 0x34, parm); /* Mono Out */ present = snd_hda_jack_detect(codec, 0x26); @@ -3650,28 +3644,20 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) parm = present ? AC_PWRST_D3 : AC_PWRST_D0; if (spec->codec_type == VT1802) { /* PW15 (33h), MW8(1ch), MUX8(3ch) */ - snd_hda_codec_write(codec, 0x33, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1c, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x3c, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x33, parm); + update_power_state(codec, 0x1c, parm); + update_power_state(codec, 0x3c, parm); } else { /* PW15 (31h), MW8(17h), MUX8(3bh) */ - snd_hda_codec_write(codec, 0x31, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x17, 0, - AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x3b, 0, - AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x31, parm); + update_power_state(codec, 0x17, parm); + update_power_state(codec, 0x3b, parm); } /* MW9 (21h) */ if (imux_is_smixer || !is_aa_path_mute(codec)) - snd_hda_codec_write(codec, 0x21, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x21, AC_PWRST_D0); else - snd_hda_codec_write(codec, 0x21, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); + update_power_state(codec, 0x21, AC_PWRST_D3); } /* patch for vt2002P */ @@ -3731,30 +3717,28 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) set_pin_power_state(codec, 0x2b, &parm); parm = AC_PWRST_D0; /* MUX10/11 (1eh/1fh), AIW 0/1 (10h/11h) */ - snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1e, parm); + update_power_state(codec, 0x1f, parm); + update_power_state(codec, 0x10, parm); + update_power_state(codec, 0x11, parm); /* outputs */ /* AOW0 (8h)*/ - snd_hda_codec_write(codec, 0x8, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x8, AC_PWRST_D0); /* PW4 (28h), MW4 (18h), MUX4(38h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x28, &parm); - snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x38, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x18, parm); + update_power_state(codec, 0x38, parm); /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x25, &parm); - snd_hda_codec_write(codec, 0x15, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x35, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x15, parm); + update_power_state(codec, 0x35, parm); if (spec->hp_independent_mode) - snd_hda_codec_write(codec, 0x9, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x9, AC_PWRST_D0); /* Internal Speaker */ /* PW0 (24h), MW0(14h), MUX0(34h) */ @@ -3763,15 +3747,11 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) parm = AC_PWRST_D3; set_pin_power_state(codec, 0x24, &parm); if (present) { - snd_hda_codec_write(codec, 0x14, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); - snd_hda_codec_write(codec, 0x34, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); + update_power_state(codec, 0x14, AC_PWRST_D3); + update_power_state(codec, 0x34, AC_PWRST_D3); } else { - snd_hda_codec_write(codec, 0x14, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); - snd_hda_codec_write(codec, 0x34, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x14, AC_PWRST_D0); + update_power_state(codec, 0x34, AC_PWRST_D0); } @@ -3782,26 +3762,20 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) parm = AC_PWRST_D3; set_pin_power_state(codec, 0x31, &parm); if (present) { - snd_hda_codec_write(codec, 0x1c, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); - snd_hda_codec_write(codec, 0x3c, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); - snd_hda_codec_write(codec, 0x3e, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D3); + update_power_state(codec, 0x1c, AC_PWRST_D3); + update_power_state(codec, 0x3c, AC_PWRST_D3); + update_power_state(codec, 0x3e, AC_PWRST_D3); } else { - snd_hda_codec_write(codec, 0x1c, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); - snd_hda_codec_write(codec, 0x3c, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); - snd_hda_codec_write(codec, 0x3e, 0, - AC_VERB_SET_POWER_STATE, AC_PWRST_D0); + update_power_state(codec, 0x1c, AC_PWRST_D0); + update_power_state(codec, 0x3c, AC_PWRST_D0); + update_power_state(codec, 0x3e, AC_PWRST_D0); } /* PW15 (33h), MW15 (1dh), MUX15(3dh) */ parm = AC_PWRST_D3; set_pin_power_state(codec, 0x33, &parm); - snd_hda_codec_write(codec, 0x1d, 0, AC_VERB_SET_POWER_STATE, parm); - snd_hda_codec_write(codec, 0x3d, 0, AC_VERB_SET_POWER_STATE, parm); + update_power_state(codec, 0x1d, parm); + update_power_state(codec, 0x3d, parm); } diff --git a/sound/pci/oxygen/oxygen_mixer.c b/sound/pci/oxygen/oxygen_mixer.c index 26c7e8bcb229..c0dbb52d45be 100644 --- a/sound/pci/oxygen/oxygen_mixer.c +++ b/sound/pci/oxygen/oxygen_mixer.c @@ -618,9 +618,12 @@ static int ac97_volume_get(struct snd_kcontrol *ctl, mutex_lock(&chip->mutex); reg = oxygen_read_ac97(chip, codec, index); mutex_unlock(&chip->mutex); - value->value.integer.value[0] = 31 - (reg & 0x1f); - if (stereo) - value->value.integer.value[1] = 31 - ((reg >> 8) & 0x1f); + if (!stereo) { + value->value.integer.value[0] = 31 - (reg & 0x1f); + } else { + value->value.integer.value[0] = 31 - ((reg >> 8) & 0x1f); + value->value.integer.value[1] = 31 - (reg & 0x1f); + } return 0; } @@ -636,14 +639,14 @@ static int ac97_volume_put(struct snd_kcontrol *ctl, mutex_lock(&chip->mutex); oldreg = oxygen_read_ac97(chip, codec, index); - newreg = oldreg; - newreg = (newreg & ~0x1f) | - (31 - (value->value.integer.value[0] & 0x1f)); - if (stereo) - newreg = (newreg & ~0x1f00) | - ((31 - (value->value.integer.value[1] & 0x1f)) << 8); - else - newreg = (newreg & ~0x1f00) | ((newreg & 0x1f) << 8); + if (!stereo) { + newreg = oldreg & ~0x1f; + newreg |= 31 - (value->value.integer.value[0] & 0x1f); + } else { + newreg = oldreg & ~0x1f1f; + newreg |= (31 - (value->value.integer.value[0] & 0x1f)) << 8; + newreg |= 31 - (value->value.integer.value[1] & 0x1f); + } change = newreg != oldreg; if (change) oxygen_write_ac97(chip, codec, index, newreg); diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c index 9d38db8f1919..78979b3e0e95 100644 --- a/sound/soc/codecs/cs42l73.c +++ b/sound/soc/codecs/cs42l73.c @@ -1113,7 +1113,7 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream, priv->config[id].mmcc &= 0xC0; priv->config[id].mmcc |= cs42l73_mclk_coeffs[mclk_coeff].mmcc; priv->config[id].spc &= 0xFC; - priv->config[id].spc &= MCK_SCLK_64FS; + priv->config[id].spc |= MCK_SCLK_MCLK; } else { /* CS42L73 Slave */ priv->config[id].spc &= 0xFC; diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c index 66f0611e68b6..89f2af77b1c3 100644 --- a/sound/soc/codecs/wm5100.c +++ b/sound/soc/codecs/wm5100.c @@ -1405,6 +1405,7 @@ static int wm5100_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_OFF: regcache_cache_only(wm5100->regmap, true); + regcache_mark_dirty(wm5100->regmap); if (wm5100->pdata.ldo_ena) gpio_set_value_cansleep(wm5100->pdata.ldo_ena, 0); regulator_bulk_disable(ARRAY_SIZE(wm5100->core_supplies), @@ -2183,6 +2184,7 @@ static void wm5100_micd_irq(struct snd_soc_codec *codec) if (wm5100->jack_detecting) { dev_dbg(codec->dev, "Microphone detected\n"); wm5100->jack_mic = true; + wm5100->jack_detecting = false; snd_soc_jack_report(wm5100->jack, SND_JACK_HEADSET, SND_JACK_HEADSET | SND_JACK_BTN_0); @@ -2221,6 +2223,7 @@ static void wm5100_micd_irq(struct snd_soc_codec *codec) SND_JACK_BTN_0); } else if (wm5100->jack_detecting) { dev_dbg(codec->dev, "Headphone detected\n"); + wm5100->jack_detecting = false; snd_soc_jack_report(wm5100->jack, SND_JACK_HEADPHONE, SND_JACK_HEADPHONE); @@ -2610,6 +2613,13 @@ static const struct regmap_config wm5100_regmap = { .cache_type = REGCACHE_RBTREE, }; +static const unsigned int wm5100_mic_ctrl_reg[] = { + WM5100_IN1L_CONTROL, + WM5100_IN2L_CONTROL, + WM5100_IN3L_CONTROL, + WM5100_IN4L_CONTROL, +}; + static __devinit int wm5100_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -2742,7 +2752,7 @@ static __devinit int wm5100_i2c_probe(struct i2c_client *i2c, } for (i = 0; i < ARRAY_SIZE(wm5100->pdata.in_mode); i++) { - regmap_update_bits(wm5100->regmap, WM5100_IN1L_CONTROL, + regmap_update_bits(wm5100->regmap, wm5100_mic_ctrl_reg[i], WM5100_IN1_MODE_MASK | WM5100_IN1_DMIC_SUP_MASK, (wm5100->pdata.in_mode[i] << diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 296de4e30d26..29c4b02c4790 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -96,7 +96,7 @@ static int wm8962_regulator_event_##n(struct notifier_block *nb, \ struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \ disable_nb[n]); \ if (event & REGULATOR_EVENT_DISABLE) { \ - regcache_cache_only(wm8962->regmap, true); \ + regcache_mark_dirty(wm8962->regmap); \ } \ return 0; \ } @@ -3159,13 +3159,13 @@ static int wm8962_hw_params(struct snd_pcm_substream *substream, case SNDRV_PCM_FORMAT_S16_LE: break; case SNDRV_PCM_FORMAT_S20_3LE: - aif0 |= 0x40; + aif0 |= 0x4; break; case SNDRV_PCM_FORMAT_S24_LE: - aif0 |= 0x80; + aif0 |= 0x8; break; case SNDRV_PCM_FORMAT_S32_LE: - aif0 |= 0xc0; + aif0 |= 0xc; break; default: return -EINVAL; diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 93d27b660257..ec69a6c152fe 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -770,6 +770,8 @@ static void vmid_reference(struct snd_soc_codec *codec) { struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); + pm_runtime_get_sync(codec->dev); + wm8994->vmid_refcount++; dev_dbg(codec->dev, "Referencing VMID, refcount is now %d\n", @@ -783,7 +785,12 @@ static void vmid_reference(struct snd_soc_codec *codec) WM8994_VMID_RAMP_MASK, WM8994_STARTUP_BIAS_ENA | WM8994_VMID_BUF_ENA | - (0x11 << WM8994_VMID_RAMP_SHIFT)); + (0x3 << WM8994_VMID_RAMP_SHIFT)); + + /* Remove discharge for line out */ + snd_soc_update_bits(codec, WM8994_ANTIPOP_1, + WM8994_LINEOUT1_DISCH | + WM8994_LINEOUT2_DISCH, 0); /* Main bias enable, VMID=2x40k */ snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, @@ -837,6 +844,8 @@ static void vmid_dereference(struct snd_soc_codec *codec) WM8994_VMID_BUF_ENA | WM8994_VMID_RAMP_MASK, 0); } + + pm_runtime_put(codec->dev); } static int vmid_event(struct snd_soc_dapm_widget *w, @@ -2753,11 +2762,6 @@ static int wm8994_resume(struct snd_soc_codec *codec) codec->cache_only = 0; } - /* Restore the registers */ - ret = snd_soc_cache_sync(codec); - if (ret != 0) - dev_err(codec->dev, "Failed to sync cache: %d\n", ret); - wm8994_set_bias_level(codec, SND_SOC_BIAS_STANDBY); for (i = 0; i < ARRAY_SIZE(wm8994->fll); i++) { diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index 13aa2bdaa7d7..61f7daa4d0e6 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c @@ -108,7 +108,7 @@ static int wm8996_regulator_event_##n(struct notifier_block *nb, \ struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \ disable_nb[n]); \ if (event & REGULATOR_EVENT_DISABLE) { \ - regcache_cache_only(wm8996->regmap, true); \ + regcache_mark_dirty(wm8996->regmap); \ } \ return 0; \ } diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c index 2a61094075f8..8a68cea4a3ee 100644 --- a/sound/soc/codecs/wm_hubs.c +++ b/sound/soc/codecs/wm_hubs.c @@ -586,14 +586,14 @@ SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), }; static const struct snd_kcontrol_new line2_mix[] = { -SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0), -SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0), +SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0), +SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0), SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), }; static const struct snd_kcontrol_new line2n_mix[] = { -SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), -SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), +SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), +SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), }; static const struct snd_kcontrol_new line2p_mix[] = { @@ -613,6 +613,8 @@ SND_SOC_DAPM_INPUT("IN2RP:VXRP"), SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("LINEOUT_VMID_BUF", WM8993_ANTIPOP1, 7, 0, NULL, 0), + SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0, in1l_pga, ARRAY_SIZE(in1l_pga)), SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0, @@ -834,9 +836,11 @@ static const struct snd_soc_dapm_route lineout1_diff_routes[] = { }; static const struct snd_soc_dapm_route lineout1_se_routes[] = { + { "LINEOUT1N Mixer", NULL, "LINEOUT_VMID_BUF" }, { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" }, { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" }, + { "LINEOUT1P Mixer", NULL, "LINEOUT_VMID_BUF" }, { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" }, { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" }, @@ -844,8 +848,8 @@ static const struct snd_soc_dapm_route lineout1_se_routes[] = { }; static const struct snd_soc_dapm_route lineout2_diff_routes[] = { - { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" }, - { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" }, + { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" }, + { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" }, { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" }, { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" }, @@ -853,9 +857,11 @@ static const struct snd_soc_dapm_route lineout2_diff_routes[] = { }; static const struct snd_soc_dapm_route lineout2_se_routes[] = { + { "LINEOUT2N Mixer", NULL, "LINEOUT_VMID_BUF" }, { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" }, { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" }, + { "LINEOUT2P Mixer", NULL, "LINEOUT_VMID_BUF" }, { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" }, { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" }, diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c index 837ff341fd6d..b4bfd97bbb61 100644 --- a/sound/soc/pxa/pxa2xx-ac97.c +++ b/sound/soc/pxa/pxa2xx-ac97.c @@ -11,6 +11,7 @@ */ #include <linux/init.h> +#include <linux/io.h> #include <linux/module.h> #include <linux/platform_device.h> diff --git a/sound/soc/samsung/neo1973_wm8753.c b/sound/soc/samsung/neo1973_wm8753.c index 7ac0ba2025c3..c6012ff5bd3e 100644 --- a/sound/soc/samsung/neo1973_wm8753.c +++ b/sound/soc/samsung/neo1973_wm8753.c @@ -230,8 +230,6 @@ static const struct snd_kcontrol_new neo1973_wm8753_controls[] = { /* GTA02 specific routes and controls */ -#ifdef CONFIG_MACH_NEO1973_GTA02 - static int gta02_speaker_enabled; static int lm4853_set_spk(struct snd_kcontrol *kcontrol, @@ -311,10 +309,6 @@ static int neo1973_gta02_wm8753_init(struct snd_soc_codec *codec) return 0; } -#else -static int neo1973_gta02_wm8753_init(struct snd_soc_code *codec) { return 0; } -#endif - static int neo1973_wm8753_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_codec *codec = rtd->codec; @@ -322,10 +316,6 @@ static int neo1973_wm8753_init(struct snd_soc_pcm_runtime *rtd) int ret; /* set up NC codec pins */ - if (machine_is_neo1973_gta01()) { - snd_soc_dapm_nc_pin(dapm, "LOUT2"); - snd_soc_dapm_nc_pin(dapm, "ROUT2"); - } snd_soc_dapm_nc_pin(dapm, "OUT3"); snd_soc_dapm_nc_pin(dapm, "OUT4"); snd_soc_dapm_nc_pin(dapm, "LINE1"); @@ -370,50 +360,6 @@ static int neo1973_wm8753_init(struct snd_soc_pcm_runtime *rtd) return 0; } -/* GTA01 specific controls */ - -#ifdef CONFIG_MACH_NEO1973_GTA01 - -static const struct snd_soc_dapm_route neo1973_lm4857_routes[] = { - {"Amp IN", NULL, "ROUT1"}, - {"Amp IN", NULL, "LOUT1"}, - - {"Handset Spk", NULL, "Amp EP"}, - {"Stereo Out", NULL, "Amp LS"}, - {"Headphone", NULL, "Amp HP"}, -}; - -static const struct snd_soc_dapm_widget neo1973_lm4857_dapm_widgets[] = { - SND_SOC_DAPM_SPK("Handset Spk", NULL), - SND_SOC_DAPM_SPK("Stereo Out", NULL), - SND_SOC_DAPM_HP("Headphone", NULL), -}; - -static int neo1973_lm4857_init(struct snd_soc_dapm_context *dapm) -{ - int ret; - - ret = snd_soc_dapm_new_controls(dapm, neo1973_lm4857_dapm_widgets, - ARRAY_SIZE(neo1973_lm4857_dapm_widgets)); - if (ret) - return ret; - - ret = snd_soc_dapm_add_routes(dapm, neo1973_lm4857_routes, - ARRAY_SIZE(neo1973_lm4857_routes)); - if (ret) - return ret; - - snd_soc_dapm_ignore_suspend(dapm, "Stereo Out"); - snd_soc_dapm_ignore_suspend(dapm, "Handset Spk"); - snd_soc_dapm_ignore_suspend(dapm, "Headphone"); - - return 0; -} - -#else -static int neo1973_lm4857_init(struct snd_soc_dapm_context *dapm) { return 0; }; -#endif - static struct snd_soc_dai_link neo1973_dai[] = { { /* Hifi Playback - for similatious use with voice below */ .name = "WM8753", @@ -440,11 +386,6 @@ static struct snd_soc_aux_dev neo1973_aux_devs[] = { .name = "dfbmcs320", .codec_name = "dfbmcs320.0", }, - { - .name = "lm4857", - .codec_name = "lm4857.0-007c", - .init = neo1973_lm4857_init, - }, }; static struct snd_soc_codec_conf neo1973_codec_conf[] = { @@ -454,14 +395,10 @@ static struct snd_soc_codec_conf neo1973_codec_conf[] = { }, }; -#ifdef CONFIG_MACH_NEO1973_GTA02 static const struct gpio neo1973_gta02_gpios[] = { { GTA02_GPIO_HP_IN, GPIOF_OUT_INIT_HIGH, "GTA02_HP_IN" }, { GTA02_GPIO_AMP_SHUT, GPIOF_OUT_INIT_HIGH, "GTA02_AMP_SHUT" }, }; -#else -static const struct gpio neo1973_gta02_gpios[] = {}; -#endif static struct snd_soc_card neo1973 = { .name = "neo1973", @@ -480,7 +417,7 @@ static int __init neo1973_init(void) { int ret; - if (!machine_is_neo1973_gta01() && !machine_is_neo1973_gta02()) + if (!machine_is_neo1973_gta02()) return -ENODEV; if (machine_is_neo1973_gta02()) { diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index b5ecf6d23214..92cee24ed2dc 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -567,6 +567,17 @@ int snd_soc_suspend(struct device *dev) if (!codec->suspended && codec->driver->suspend) { switch (codec->dapm.bias_level) { case SND_SOC_BIAS_STANDBY: + /* + * If the CODEC is capable of idle + * bias off then being in STANDBY + * means it's doing something, + * otherwise fall through. + */ + if (codec->dapm.idle_bias_off) { + dev_dbg(codec->dev, + "idle_bias_off CODEC on over suspend\n"); + break; + } case SND_SOC_BIAS_OFF: codec->driver->suspend(codec); codec->suspended = 1; diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index 8edc5035fc8f..d89ab4c7d44b 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h @@ -1618,6 +1618,14 @@ YAMAHA_DEVICE(0x7010, "UB99"), } }, { + /* Edirol UM-3G */ + USB_DEVICE_VENDOR_SPEC(0x0582, 0x0108), + .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { + .ifnum = 0, + .type = QUIRK_MIDI_STANDARD_INTERFACE + } +}, +{ /* Boss JS-8 Jam Station */ USB_DEVICE(0x0582, 0x0109), .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { diff --git a/tools/perf/Makefile b/tools/perf/Makefile index ac86d67b636e..7c12650165ae 100644 --- a/tools/perf/Makefile +++ b/tools/perf/Makefile @@ -104,7 +104,7 @@ endif CFLAGS = -fno-omit-frame-pointer -ggdb3 -Wall -Wextra -std=gnu99 $(CFLAGS_WERROR) $(CFLAGS_OPTIMIZE) -D_FORTIFY_SOURCE=2 $(EXTRA_WARNINGS) $(EXTRA_CFLAGS) EXTLIBS = -lpthread -lrt -lelf -lm -ALL_CFLAGS = $(CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 +ALL_CFLAGS = $(CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -D_GNU_SOURCE ALL_LDFLAGS = $(LDFLAGS) STRIP ?= strip @@ -168,10 +168,7 @@ endif ### --- END CONFIGURATION SECTION --- -# Those must not be GNU-specific; they are shared with perl/ which may -# be built by a different compiler. (Note that this is an artifact now -# but it still might be nice to keep that distinction.) -BASIC_CFLAGS = -Iutil/include -Iarch/$(ARCH)/include +BASIC_CFLAGS = -Iutil/include -Iarch/$(ARCH)/include -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -D_GNU_SOURCE BASIC_LDFLAGS = # Guard against environment variables diff --git a/tools/perf/builtin-probe.c b/tools/perf/builtin-probe.c index 59d43abfbfec..fb8566181f27 100644 --- a/tools/perf/builtin-probe.c +++ b/tools/perf/builtin-probe.c @@ -20,7 +20,6 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * */ -#define _GNU_SOURCE #include <sys/utsname.h> #include <sys/types.h> #include <sys/stat.h> @@ -31,7 +30,6 @@ #include <stdlib.h> #include <string.h> -#undef _GNU_SOURCE #include "perf.h" #include "builtin.h" #include "util/util.h" diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c index 8f80df896038..dd162aa24baa 100644 --- a/tools/perf/builtin-top.c +++ b/tools/perf/builtin-top.c @@ -89,8 +89,6 @@ void get_term_dimensions(struct winsize *ws) static void perf_top__update_print_entries(struct perf_top *top) { - top->print_entries = top->winsize.ws_row; - if (top->print_entries > 9) top->print_entries -= 9; } @@ -100,6 +98,13 @@ static void perf_top__sig_winch(int sig __used, siginfo_t *info __used, void *ar struct perf_top *top = arg; get_term_dimensions(&top->winsize); + if (!top->print_entries + || (top->print_entries+4) > top->winsize.ws_row) { + top->print_entries = top->winsize.ws_row; + } else { + top->print_entries += 4; + top->winsize.ws_row = top->print_entries; + } perf_top__update_print_entries(top); } @@ -453,8 +458,10 @@ static void perf_top__handle_keypress(struct perf_top *top, int c) }; perf_top__sig_winch(SIGWINCH, NULL, top); sigaction(SIGWINCH, &act, NULL); - } else + } else { + perf_top__sig_winch(SIGWINCH, NULL, top); signal(SIGWINCH, SIG_DFL); + } break; case 'E': if (top->evlist->nr_entries > 1) { diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c index 3e7e0b09c12c..ecd7f4dd7eea 100644 --- a/tools/perf/util/header.c +++ b/tools/perf/util/header.c @@ -2105,7 +2105,7 @@ int perf_event__synthesize_event_type(struct perf_tool *tool, strncpy(ev.event_type.event_type.name, name, MAX_EVENT_NAME - 1); ev.event_type.header.type = PERF_RECORD_HEADER_EVENT_TYPE; - size = strlen(name); + size = strlen(ev.event_type.event_type.name); size = ALIGN(size, sizeof(u64)); ev.event_type.header.size = sizeof(ev.event_type) - (sizeof(ev.event_type.event_type.name) - size); diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c index eb25900e2211..29cb65459811 100644 --- a/tools/perf/util/probe-event.c +++ b/tools/perf/util/probe-event.c @@ -19,7 +19,6 @@ * */ -#define _GNU_SOURCE #include <sys/utsname.h> #include <sys/types.h> #include <sys/stat.h> @@ -33,7 +32,6 @@ #include <limits.h> #include <elf.h> -#undef _GNU_SOURCE #include "util.h" #include "event.h" #include "string.h" diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c index 215d50f2042e..0975438c3e72 100644 --- a/tools/perf/util/symbol.c +++ b/tools/perf/util/symbol.c @@ -1,4 +1,3 @@ -#define _GNU_SOURCE #include <ctype.h> #include <dirent.h> #include <errno.h> diff --git a/tools/perf/util/trace-event-parse.c b/tools/perf/util/trace-event-parse.c index 6c164dc9ee95..1a8d4dc4f386 100644 --- a/tools/perf/util/trace-event-parse.c +++ b/tools/perf/util/trace-event-parse.c @@ -21,14 +21,13 @@ * The parts for function graph printing was taken and modified from the * Linux Kernel that were written by Frederic Weisbecker. */ -#define _GNU_SOURCE + #include <stdio.h> #include <stdlib.h> #include <string.h> #include <ctype.h> #include <errno.h> -#undef _GNU_SOURCE #include "../perf.h" #include "util.h" #include "trace-event.h" diff --git a/tools/perf/util/ui/browsers/hists.c b/tools/perf/util/ui/browsers/hists.c index 1212a386a033..e81aef1f2569 100644 --- a/tools/perf/util/ui/browsers/hists.c +++ b/tools/perf/util/ui/browsers/hists.c @@ -1,6 +1,4 @@ -#define _GNU_SOURCE #include <stdio.h> -#undef _GNU_SOURCE #include "../libslang.h" #include <stdlib.h> #include <string.h> diff --git a/tools/perf/util/ui/helpline.c b/tools/perf/util/ui/helpline.c index 6ef3c5691762..4f48f5901b30 100644 --- a/tools/perf/util/ui/helpline.c +++ b/tools/perf/util/ui/helpline.c @@ -1,4 +1,3 @@ -#define _GNU_SOURCE #include <stdio.h> #include <stdlib.h> #include <string.h> diff --git a/tools/perf/util/util.h b/tools/perf/util/util.h index b9c530cce79a..ecf9898169c8 100644 --- a/tools/perf/util/util.h +++ b/tools/perf/util/util.h @@ -40,7 +40,6 @@ #define decimal_length(x) ((int)(sizeof(x) * 2.56 + 0.5) + 1) #define _ALL_SOURCE 1 -#define _GNU_SOURCE 1 #define _BSD_SOURCE 1 #define HAS_BOOL diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c index 7287bf5d1c9e..a91f980077d8 100644 --- a/virt/kvm/kvm_main.c +++ b/virt/kvm/kvm_main.c @@ -1543,7 +1543,7 @@ void mark_page_dirty_in_slot(struct kvm *kvm, struct kvm_memory_slot *memslot, if (memslot && memslot->dirty_bitmap) { unsigned long rel_gfn = gfn - memslot->base_gfn; - if (!__test_and_set_bit_le(rel_gfn, memslot->dirty_bitmap)) + if (!test_and_set_bit_le(rel_gfn, memslot->dirty_bitmap)) memslot->nr_dirty_pages++; } } |