diff options
| -rw-r--r-- | arch/xtensa/boot/dts/xtfpga.dtsi | 4 | ||||
| -rw-r--r-- | arch/xtensa/kernel/setup.c | 2 | ||||
| -rw-r--r-- | arch/xtensa/kernel/time.c | 40 | ||||
| -rw-r--r-- | arch/xtensa/platforms/xtfpga/setup.c | 39 |
4 files changed, 41 insertions, 44 deletions
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi index ded56984dd23..91616a9d79df 100644 --- a/arch/xtensa/boot/dts/xtfpga.dtsi +++ b/arch/xtensa/boot/dts/xtfpga.dtsi @@ -19,9 +19,7 @@ cpu@0 { compatible = "cdns,xtensa-cpu"; reg = <0>; - /* Filled in by platform_setup from FPGA register - * clock-frequency = <100000000>; - */ + clocks = <&osc>; }; }; diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 7ed63688f93c..d61c8468abea 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -23,7 +23,6 @@ #include <linux/bootmem.h> #include <linux/kernel.h> #include <linux/percpu.h> -#include <linux/clk-provider.h> #include <linux/cpu.h> #include <linux/of.h> #include <linux/of_fdt.h> @@ -249,7 +248,6 @@ void __init early_init_devtree(void *params) static int __init xtensa_device_probe(void) { - of_clk_init(NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); return 0; } diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c index b9ad9feadc2d..9a5bcd0381a7 100644 --- a/arch/xtensa/kernel/time.c +++ b/arch/xtensa/kernel/time.c @@ -12,6 +12,8 @@ * Chris Zankel <chris@zankel.net> */ +#include <linux/clk.h> +#include <linux/clk-provider.h> #include <linux/errno.h> #include <linux/sched.h> #include <linux/time.h> @@ -134,16 +136,52 @@ void local_timer_setup(unsigned cpu) 0xf, 0xffffffff); } +#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT +#ifdef CONFIG_OF +static void __init calibrate_ccount(void) +{ + struct device_node *cpu; + struct clk *clk; + + cpu = of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu"); + if (cpu) { + clk = of_clk_get(cpu, 0); + if (!IS_ERR(clk)) { + ccount_freq = clk_get_rate(clk); + return; + } else { + pr_warn("%s: CPU input clock not found\n", + __func__); + } + } else { + pr_warn("%s: CPU node not found in the device tree\n", + __func__); + } + + platform_calibrate_ccount(); +} +#else +static inline void calibrate_ccount(void) +{ + platform_calibrate_ccount(); +} +#endif +#endif + void __init time_init(void) { + of_clk_init(NULL); #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT printk("Calibrating CPU frequency "); - platform_calibrate_ccount(); + calibrate_ccount(); printk("%d.%02d MHz\n", (int)ccount_freq/1000000, (int)(ccount_freq/10000)%100); #else ccount_freq = CONFIG_XTENSA_CPU_CLOCK*1000000UL; #endif + WARN(!ccount_freq, + "%s: CPU clock frequency is not set up correctly\n", + __func__); clocksource_register_hz(&ccount_clocksource, ccount_freq); local_timer_setup(0); setup_irq(this_cpu_ptr(&ccount_timer)->evt.irq, &timer_irqaction); diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c index 99a38a6febea..e236df450a7b 100644 --- a/arch/xtensa/platforms/xtfpga/setup.c +++ b/arch/xtensa/platforms/xtfpga/setup.c @@ -66,29 +66,6 @@ void __init platform_setup(char **cmdline) #ifdef CONFIG_OF -static void __init update_clock_frequency(struct device_node *node) -{ - struct property *newfreq; - u32 freq; - - if (!of_property_read_u32(node, "clock-frequency", &freq) && freq != 0) - return; - - newfreq = kzalloc(sizeof(*newfreq) + sizeof(u32), GFP_KERNEL); - if (!newfreq) - return; - newfreq->value = newfreq + 1; - newfreq->length = sizeof(freq); - newfreq->name = kstrdup("clock-frequency", GFP_KERNEL); - if (!newfreq->name) { - kfree(newfreq); - return; - } - - *(u32 *)newfreq->value = cpu_to_be32(*(u32 *)XTFPGA_CLKFRQ_VADDR); - of_update_property(node, newfreq); -} - static void __init xtfpga_clk_setup(struct device_node *np) { void __iomem *base = of_iomap(np, 0); @@ -172,21 +149,7 @@ void platform_heartbeat(void) void __init platform_calibrate_ccount(void) { - long clk_freq = 0; -#ifdef CONFIG_OF - struct device_node *cpu = - of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu"); - if (cpu) { - u32 freq; - update_clock_frequency(cpu); - if (!of_property_read_u32(cpu, "clock-frequency", &freq)) - clk_freq = freq; - } -#endif - if (!clk_freq) - clk_freq = *(long *)XTFPGA_CLKFRQ_VADDR; - - ccount_freq = clk_freq; + ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR; } #endif |