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Diffstat (limited to 'Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml new file mode 100644 index 000000000000..2c459b8c76ff --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ce.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner Crypto Engine driver + +maintainers: + - Corentin Labbe <clabbe.montjoie@gmail.com> + +properties: + compatible: + enum: + - allwinner,sun8i-h3-crypto + - allwinner,sun8i-r40-crypto + - allwinner,sun50i-a64-crypto + - allwinner,sun50i-h5-crypto + - allwinner,sun50i-h6-crypto + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus clock + - description: Module clock + - description: MBus clock + minItems: 2 + maxItems: 3 + + clock-names: + items: + - const: bus + - const: mod + - const: ram + minItems: 2 + maxItems: 3 + + resets: + maxItems: 1 + +if: + properties: + compatible: + items: + const: allwinner,sun50i-h6-crypto +then: + properties: + clocks: + minItems: 3 + clock-names: + minItems: 3 +else: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sun50i-a64-ccu.h> + #include <dt-bindings/reset/sun50i-a64-ccu.h> + + crypto: crypto@1c15000 { + compatible = "allwinner,sun8i-h3-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_CE>; + }; + |