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-rw-r--r--Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt61
1 files changed, 59 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt b/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt
index 7c4a0cc370cf..76df9173825a 100644
--- a/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt
+++ b/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt
@@ -1,7 +1,10 @@
* Marvell International Ltd. NCI NFC Controller
Required properties:
-- compatible: Should be "mrvl,nfc-uart".
+- compatible: Should be:
+ - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
+ - "marvell,nfc-i2c" for I2C devices
+ - "marvell,nfc-spi" for SPI devices
Optional SoC specific properties:
- pinctrl-names: Contains only one value - "default".
@@ -13,13 +16,19 @@ Optional UART-based chip specific properties:
- flow-control: Specifies that the chip is using RTS/CTS.
- break-control: Specifies that the chip needs specific break management.
+Optional I2C-based chip specific properties:
+- i2c-int-falling: Specifies that the chip read event shall be trigged on
+ falling edge.
+- i2c-int-rising: Specifies that the chip read event shall be trigged on
+ rising edge.
+
Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):
&uart5 {
status = "okay";
nfcmrvluart: nfcmrvluart@5 {
- compatible = "mrvl,nfc-uart";
+ compatible = "marvell,nfc-uart";
reset-n-io = <&gpio3 16 0>;
@@ -27,3 +36,51 @@ Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):
flow-control;
}
};
+
+
+Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1):
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ nfcmrvli2c0: i2c@1 {
+ compatible = "marvell,nfc-i2c";
+
+ reg = <0x8>;
+
+ /* I2C INT configuration */
+ interrupt-parent = <&gpio3>;
+ interrupts = <21 0>;
+
+ /* I2C INT trigger configuration */
+ i2c-int-rising;
+
+ /* Reset IO */
+ reset-n-io = <&gpio3 19 0>;
+ };
+};
+
+
+Example (for ARM-based BeagleBoard Black on SPI0):
+
+&spi0 {
+
+ mrvlnfcspi0: spi@0 {
+ compatible = "marvell,nfc-spi";
+
+ reg = <0>;
+
+ /* SPI Bus configuration */
+ spi-max-frequency = <3000000>;
+ spi-cpha;
+ spi-cpol;
+
+ /* SPI INT configuration */
+ interrupt-parent = <&gpio1>;
+ interrupts = <17 0>;
+
+ /* Reset IO */
+ reset-n-io = <&gpio3 19 0>;
+ };
+};