diff options
Diffstat (limited to 'arch/arm/mach-mx3/cpu.c')
| -rw-r--r-- | arch/arm/mach-mx3/cpu.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c index d00a75457812..d1d339576fdf 100644 --- a/arch/arm/mach-mx3/cpu.c +++ b/arch/arm/mach-mx3/cpu.c @@ -25,15 +25,15 @@ struct mx3_cpu_type { }; static struct mx3_cpu_type mx31_cpu_type[] __initdata = { - { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = MX3x_CHIP_REV_1_0 }, - { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 }, - { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 }, - { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 }, - { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 }, - { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 }, - { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 }, - { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 }, - { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 }, + { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 }, + { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, + { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, + { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, + { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, + { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, + { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, + { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, + { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, }; void __init mx31_read_cpu_rev(void) @@ -53,6 +53,8 @@ void __init mx31_read_cpu_rev(void) return; } + mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; + printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); } @@ -62,22 +64,25 @@ EXPORT_SYMBOL(mx35_cpu_rev); void __init mx35_read_cpu_rev(void) { u32 rev; - char *srev = "unknown"; + char *srev; rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); switch (rev) { case 0x00: - mx35_cpu_rev = MX3x_CHIP_REV_1_0; + mx35_cpu_rev = IMX_CHIP_REVISION_1_0; srev = "1.0"; break; case 0x10: - mx35_cpu_rev = MX3x_CHIP_REV_2_0; + mx35_cpu_rev = IMX_CHIP_REVISION_2_0; srev = "2.0"; break; case 0x11: - mx35_cpu_rev = MX3x_CHIP_REV_2_1; + mx35_cpu_rev = IMX_CHIP_REVISION_2_1; srev = "2.1"; break; + default: + mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; + srev = "unknown"; } printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); |