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-rw-r--r--arch/arm/mach-vexpress/tc2_pm.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index 68adb40d2c71..7aeb5d60e484 100644
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -151,8 +151,13 @@ static void tc2_pm_down(u64 residency)
* Let's do it in the safest possible way i.e. with
* no memory access within the following sequence
* including the stack.
+ *
+ * Note: fp is preserved to the stack explicitly prior doing
+ * this since adding it to the clobber list is incompatible
+ * with having CONFIG_FRAME_POINTER=y.
*/
asm volatile(
+ "str fp, [sp, #-4]! \n\t"
"mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t"
"bic r0, r0, #"__stringify(CR_C)" \n\t"
"mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t"
@@ -163,9 +168,10 @@ static void tc2_pm_down(u64 residency)
"bic r0, r0, #(1 << 6) @ disable local coherency \n\t"
"mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t"
"isb \n\t"
- "dsb "
+ "dsb \n\t"
+ "ldr fp, [sp], #4"
: : : "r0","r1","r2","r3","r4","r5","r6","r7",
- "r9","r10","r11","lr","memory");
+ "r9","r10","lr","memory");
cci_disable_port_by_cpu(mpidr);
@@ -186,6 +192,7 @@ static void tc2_pm_down(u64 residency)
* Let's do it in the safest possible way as above.
*/
asm volatile(
+ "str fp, [sp, #-4]! \n\t"
"mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t"
"bic r0, r0, #"__stringify(CR_C)" \n\t"
"mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t"
@@ -196,9 +203,10 @@ static void tc2_pm_down(u64 residency)
"bic r0, r0, #(1 << 6) @ disable local coherency \n\t"
"mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t"
"isb \n\t"
- "dsb "
+ "dsb \n\t"
+ "ldr fp, [sp], #4"
: : : "r0","r1","r2","r3","r4","r5","r6","r7",
- "r9","r10","r11","lr","memory");
+ "r9","r10","lr","memory");
}
__mcpm_cpu_down(cpu, cluster);