diff options
Diffstat (limited to 'arch/arm/plat-omap/include')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/board-apollon.h | 4 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/board-h2.h | 6 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/board-ldp.h | 5 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/board.h | 22 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/control.h | 17 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/cpu.h | 82 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/gpio.h | 31 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/io.h | 6 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/memory.h | 17 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/mmc.h | 74 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/mux.h | 41 |
11 files changed, 191 insertions, 114 deletions
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h index 731c858cf3fe..61bd5e8f09b1 100644 --- a/arch/arm/plat-omap/include/mach/board-apollon.h +++ b/arch/arm/plat-omap/include/mach/board-apollon.h @@ -29,12 +29,14 @@ #ifndef __ASM_ARCH_OMAP_APOLLON_H #define __ASM_ARCH_OMAP_APOLLON_H +#include <mach/cpu.h> + extern void apollon_mmc_init(void); static inline int apollon_plus(void) { /* The apollon plus has IDCODE revision 5 */ - return system_rev & 0xc0; + return omap_rev() & 0xc0; } /* Placeholder for APOLLON specific defines */ diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h index 2a050e9be65f..15531c8dc0e6 100644 --- a/arch/arm/plat-omap/include/mach/board-h2.h +++ b/arch/arm/plat-omap/include/mach/board-h2.h @@ -29,13 +29,13 @@ #ifndef __ASM_ARCH_OMAP_H2_H #define __ASM_ARCH_OMAP_H2_H -/* Placeholder for H2 specific defines */ - /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 +#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3) + extern void h2_mmc_init(void); -extern void h2_mmc_slot_cover_handler(void *arg, int state); #endif /* __ASM_ARCH_OMAP_H2_H */ diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h index 66e2746c04ca..f23399665212 100644 --- a/arch/arm/plat-omap/include/mach/board-ldp.h +++ b/arch/arm/plat-omap/include/mach/board-ldp.h @@ -32,5 +32,8 @@ extern void twl4030_bci_battery_init(void); #define TWL4030_IRQNUM INT_34XX_SYS_NIRQ - +#define LDP_SMC911X_CS 1 +#define LDP_SMC911X_GPIO 152 +#define DEBUG_BASE 0x08000000 +#define OMAP34XX_ETHR_START DEBUG_BASE #endif /* __ASM_ARCH_OMAP_LDP_H */ diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index c23c12ccb353..9466772fc7c8 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h @@ -16,7 +16,6 @@ /* Different peripheral ids */ #define OMAP_TAG_CLOCK 0x4f01 -#define OMAP_TAG_MMC 0x4f02 #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 #define OMAP_TAG_USB 0x4f04 #define OMAP_TAG_LCD 0x4f05 @@ -35,27 +34,6 @@ struct omap_clock_config { u8 system_clock_type; }; -struct omap_mmc_conf { - unsigned enabled:1; - /* nomux means "standard" muxing is wrong on this board, and that - * board-specific code handled it before common init logic. - */ - unsigned nomux:1; - /* switch pin can be for card detect (default) or card cover */ - unsigned cover:1; - /* 4 wire signaling is optional, and is only used for SD/SDIO */ - unsigned wire4:1; - /* use the internal clock */ - unsigned internal_clock:1; - s16 power_pin; - s16 switch_pin; - s16 wp_pin; -}; - -struct omap_mmc_config { - struct omap_mmc_conf mmc[2]; -}; - struct omap_serial_console_config { u8 console_uart; u32 console_speed; diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index dc9886760577..269147f3836f 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -74,6 +74,7 @@ #define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) #define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) +#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) /* 24xx-only CONTROL_GENERAL register offsets */ #define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) @@ -140,6 +141,7 @@ #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) /* @@ -154,11 +156,14 @@ * and the security mode (secure, non-secure, don't care) */ /* CONTROL_DEVCONF0 bits */ +#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ #define OMAP24XX_USBSTANDBYCTRL (1 << 15) #define OMAP2_MCBSP2_CLKS_MASK (1 << 6) #define OMAP2_MCBSP1_CLKS_MASK (1 << 2) /* CONTROL_DEVCONF1 bits */ +#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) +#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ #define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ #define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ #define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ @@ -172,6 +177,18 @@ #define OMAP2_SYSBOOT_1_MASK (1 << 1) #define OMAP2_SYSBOOT_0_MASK (1 << 0) +/* CONTROL_PBIAS_LITE bits */ +#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) +#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) +#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) +#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) +#define OMAP343X_PBIASLITEVMODE1 (1 << 8) +#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) +#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) +#define OMAP2_PBIASSPEEDCTRL0 (1 << 2) +#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) +#define OMAP2_PBIASLITEVMODE0 (1 << 0) + #ifndef __ASSEMBLY__ #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) extern void __iomem *omap_ctrl_base_get(void); diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index e0464187209d..b2062f1175de 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h @@ -28,13 +28,18 @@ struct omap_chip_id { u8 oc; + u8 type; }; #define OMAP_CHIP_INIT(x) { .oc = x } -extern unsigned int system_rev; - -#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f) +/* + * omap_rev bits: + * CPU id bits (0730, 1510, 1710, 2422...) [31:16] + * CPU revision (See _REV_ defined in cpu.h) [15:08] + * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] + */ +unsigned int omap_rev(void); /* * Test if multicore OMAP support is needed @@ -108,7 +113,7 @@ extern unsigned int system_rev; * cpu_is_omap243x(): True for OMAP2430 * cpu_is_omap343x(): True for OMAP3430 */ -#define GET_OMAP_CLASS ((system_rev >> 24) & 0xff) +#define GET_OMAP_CLASS (omap_rev() & 0xff) #define IS_OMAP_CLASS(class, id) \ static inline int is_omap ##class (void) \ @@ -116,7 +121,7 @@ static inline int is_omap ##class (void) \ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ } -#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff) +#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) #define IS_OMAP_SUBCLASS(subclass, id) \ static inline int is_omap ##subclass (void) \ @@ -226,7 +231,7 @@ IS_OMAP_SUBCLASS(343x, 0x343) * cpu_is_omap2430(): True for OMAP2430 * cpu_is_omap3430(): True for OMAP3430 */ -#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) +#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) #define IS_OMAP_TYPE(type, id) \ static inline int is_omap ##type (void) \ @@ -320,44 +325,20 @@ IS_OMAP_TYPE(3430, 0x3430) #define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -/* - * Macros to detect silicon revision of OMAP2/3 processors. - * is_sil_rev_greater_than: true if passed cpu type & its rev is greater. - * is_sil_rev_lesser_than: true if passed cpu type & its rev is lesser. - * is_sil_rev_equal_to: true if passed cpu type & its rev is equal. - * get_sil_rev: return the silicon rev value. - */ -#define get_sil_omap_type(rev) ((rev & 0xffff0000) >> 16) -#define get_sil_revision(rev) ((rev & 0x0000f000) >> 12) -#define is_sil_rev_greater_than(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) > get_sil_revision(rev))) +/* Various silicon revisions for omap2 */ +#define OMAP242X_CLASS 0x24200024 +#define OMAP2420_REV_ES1_0 0x24200024 +#define OMAP2420_REV_ES2_0 0x24201024 -#define is_sil_rev_less_than(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) < get_sil_revision(rev))) +#define OMAP243X_CLASS 0x24300024 +#define OMAP2430_REV_ES1_0 0x24300024 -#define is_sil_rev_equal_to(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) == get_sil_revision(rev))) - -#define get_sil_rev() \ - get_sil_revision(system_rev) - -/* Various silicon macros defined here */ -#define OMAP242X_CLASS 0x24200000 -#define OMAP2420_REV_ES1_0 0x24200000 -#define OMAP2420_REV_ES2_0 0x24201000 - -#define OMAP243X_CLASS 0x24300000 -#define OMAP2430_REV_ES1_0 0x24300000 - -#define OMAP343X_CLASS 0x34300000 -#define OMAP3430_REV_ES1_0 0x34300000 -#define OMAP3430_REV_ES2_0 0x34301000 -#define OMAP3430_REV_ES2_1 0x34302000 -#define OMAP3430_REV_ES2_2 0x34303000 +#define OMAP343X_CLASS 0x34300034 +#define OMAP3430_REV_ES1_0 0x34300034 +#define OMAP3430_REV_ES2_0 0x34301034 +#define OMAP3430_REV_ES2_1 0x34302034 +#define OMAP3430_REV_ES3_0 0x34303034 /* * omap_chip bits @@ -382,23 +363,16 @@ IS_OMAP_TYPE(3430, 0x3430) #define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) int omap_chip_is(struct omap_chip_id oci); - +int omap_type(void); /* * Macro to detect device type i.e. EMU/HS/TST/GP/BAD */ -#define DEVICE_TYPE_TEST 0 -#define DEVICE_TYPE_EMU 1 -#define DEVICE_TYPE_SEC 2 -#define DEVICE_TYPE_GP 3 -#define DEVICE_TYPE_BAD 4 - -#define get_device_type() ((system_rev & 0x700) >> 8) -#define is_device_type_test() (get_device_type() == DEVICE_TYPE_TEST) -#define is_device_type_emu() (get_device_type() == DEVICE_TYPE_EMU) -#define is_device_type_sec() (get_device_type() == DEVICE_TYPE_SEC) -#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP) -#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD) +#define OMAP2_DEVICE_TYPE_TEST 0 +#define OMAP2_DEVICE_TYPE_EMU 1 +#define OMAP2_DEVICE_TYPE_SEC 2 +#define OMAP2_DEVICE_TYPE_GP 3 +#define OMAP2_DEVICE_TYPE_BAD 4 void omap2_check_revision(void); diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h index 98e9008b7e9d..04e68e88f134 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/mach/gpio.h @@ -71,11 +71,6 @@ IH_GPIO_BASE + (nr)) extern int omap_gpio_init(void); /* Call from board init only */ -extern int omap_request_gpio(int gpio); -extern void omap_free_gpio(int gpio); -extern void omap_set_gpio_direction(int gpio, int is_input); -extern void omap_set_gpio_dataout(int gpio, int enable); -extern int omap_get_gpio_datain(int gpio); extern void omap2_gpio_prepare_for_retention(void); extern void omap2_gpio_resume_after_retention(void); extern void omap_set_gpio_debounce(int gpio, int enable); @@ -92,6 +87,16 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable); #include <linux/errno.h> #include <asm-generic/gpio.h> +static inline int omap_request_gpio(int gpio) +{ + return gpio_request(gpio, "FIXME"); +} + +static inline void omap_free_gpio(int gpio) +{ + gpio_free(gpio); +} + static inline int gpio_get_value(unsigned gpio) { return __gpio_get_value(gpio); @@ -109,16 +114,24 @@ static inline int gpio_cansleep(unsigned gpio) static inline int gpio_to_irq(unsigned gpio) { - if (gpio < (OMAP_MAX_GPIO_LINES + 16)) - return OMAP_GPIO_IRQ(gpio); - return -EINVAL; + return __gpio_to_irq(gpio); } static inline int irq_to_gpio(unsigned irq) { + int tmp; + + /* omap1 SOC mpuio */ if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16))) return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES; - return irq - IH_GPIO_BASE; + + /* SOC gpio */ + tmp = irq - IH_GPIO_BASE; + if (tmp < OMAP_MAX_GPIO_LINES) + return tmp; + + /* we don't supply reverse mappings for non-SOC gpios */ + return -EIO; } #endif diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index adc83b7b8205..d92bf7964481 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -42,8 +42,8 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#define __mem_pci(a) (a) +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) /* * ---------------------------------------------------------------------------- @@ -51,8 +51,6 @@ * ---------------------------------------------------------------------------- */ -#define PCIO_BASE 0 - #if defined(CONFIG_ARCH_OMAP1) #define IO_PHYS 0xFFFB0000 diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h index d40cac60b959..211c9f6619e9 100644 --- a/arch/arm/plat-omap/include/mach/memory.h +++ b/arch/arm/plat-omap/include/mach/memory.h @@ -43,18 +43,7 @@ #endif /* - * Conversion between SDRAM and fake PCI bus, used by USB - * NOTE: Physical address must be converted to Local Bus address - * on OMAP-1510 only - */ - -/* * Bus address is physical address, except for OMAP-1510 Local Bus. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* * OMAP-1510 bus address is translated into a Local Bus address if the * OMAP bus type is lbus. We do the address translation based on the * device overriding the defaults used in the dma-mapping API. @@ -74,16 +63,16 @@ #define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ (dma_addr_t)virt_to_lbus(page_address(page)) : \ - (dma_addr_t)__virt_to_bus(page_address(page));}) + (dma_addr_t)__virt_to_phys(page_address(page));}) #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ lbus_to_virt(addr) : \ - __bus_to_virt(addr)); }) + __phys_to_virt(addr)); }) #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ (dma_addr_t) (is_lbus_device(dev) ? \ virt_to_lbus(__addr) : \ - __virt_to_bus(__addr)); }) + __virt_to_phys(__addr)); }) #endif /* CONFIG_ARCH_OMAP15XX */ diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h index fc15d13058fc..031250f02805 100644 --- a/arch/arm/plat-omap/include/mach/mmc.h +++ b/arch/arm/plat-omap/include/mach/mmc.h @@ -17,12 +17,28 @@ #include <mach/board.h> +#define OMAP15XX_NR_MMC 1 +#define OMAP16XX_NR_MMC 2 +#define OMAP1_MMC_SIZE 0x080 +#define OMAP1_MMC1_BASE 0xfffb7800 +#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ + +#define OMAP24XX_NR_MMC 2 +#define OMAP34XX_NR_MMC 3 +#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE +#define HSMMC_SIZE 0x200 +#define OMAP2_MMC1_BASE 0x4809c000 +#define OMAP2_MMC2_BASE 0x480b4000 +#define OMAP3_MMC3_BASE 0x480ad000 +#define HSMMC3 (1 << 2) +#define HSMMC2 (1 << 1) +#define HSMMC1 (1 << 0) + #define OMAP_MMC_MAX_SLOTS 2 struct omap_mmc_platform_data { - struct omap_mmc_conf conf; - /* number of slots on board */ + /* number of slots per controller */ unsigned nr_slots:2; /* set if your board has components or wiring that limits the @@ -41,7 +57,31 @@ struct omap_mmc_platform_data { int (*suspend)(struct device *dev, int slot); int (*resume)(struct device *dev, int slot); + u64 dma_mask; + struct omap_mmc_slot_data { + + /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC; + * 8 wire signaling is also optional, and is used with HSMMC + */ + u8 wires; + + /* + * nomux means "standard" muxing is wrong on this board, and + * that board-specific code handled it before common init logic. + */ + unsigned nomux:1; + + /* switch pin can be for card detect (default) or card cover */ + unsigned cover:1; + + /* use the internal clock */ + unsigned internal_clock:1; + s16 power_pin; + + int switch_pin; /* gpio (card detect) */ + int gpio_wp; /* gpio (write protect) */ + int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); int (* set_power)(struct device *dev, int slot, int power_on, int vdd); int (* get_ro)(struct device *dev, int slot); @@ -49,8 +89,8 @@ struct omap_mmc_platform_data { /* return MMC cover switch state, can be NULL if not supported. * * possible return values: - * 0 - open - * 1 - closed + * 0 - closed + * 1 - open */ int (* get_cover_state)(struct device *dev, int slot); @@ -66,9 +106,31 @@ struct omap_mmc_platform_data { } slots[OMAP_MMC_MAX_SLOTS]; }; -extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); - /* called from board-specific card detection service routine */ extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); +#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ + defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) +void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers); +void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers); +int omap_mmc_add(int id, unsigned long base, unsigned long size, + unsigned int irq, struct omap_mmc_platform_data *data); +#else +static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers) +{ +} +static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, + int nr_controllers) +{ +} +static inline int omap_mmc_add(int id, unsigned long base, unsigned long size, + unsigned int irq, struct omap_mmc_platform_data *data) +{ + return 0; +} + +#endif #endif diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 6bbf1789bed5..f4362b8682c7 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h @@ -632,6 +632,15 @@ enum omap24xx_index { AC7_2430_USB0HS_DATA7, /* 2430 McBSP */ + AD6_2430_MCBSP_CLKS, + + AB2_2430_MCBSP1_CLKR, + AD5_2430_MCBSP1_FSR, + AA1_2430_MCBSP1_DX, + AF3_2430_MCBSP1_DR, + AB3_2430_MCBSP1_FSX, + Y9_2430_MCBSP1_CLKX, + AC10_2430_MCBSP2_FSX, AD16_2430_MCBSP2_CLX, AE13_2430_MCBSP2_DX, @@ -641,6 +650,30 @@ enum omap24xx_index { AE13_2430_MCBSP2_DX_OFF, AD13_2430_MCBSP2_DR_OFF, + AC9_2430_MCBSP3_CLKX, + AE4_2430_MCBSP3_FSX, + AE2_2430_MCBSP3_DR, + AF4_2430_MCBSP3_DX, + + N3_2430_MCBSP4_CLKX, + AD23_2430_MCBSP4_DR, + AB25_2430_MCBSP4_DX, + AC25_2430_MCBSP4_FSX, + + AE16_2430_MCBSP5_CLKX, + AF12_2430_MCBSP5_FSX, + K7_2430_MCBSP5_DX, + M1_2430_MCBSP5_DR, + + /* 2430 McSPI*/ + Y18_2430_MCSPI1_CLK, + AD15_2430_MCSPI1_SIMO, + AE17_2430_MCSPI1_SOMI, + U1_2430_MCSPI1_CS0, + + /* Touchscreen GPIO */ + AF19_2430_GPIO_85, + }; enum omap34xx_index { @@ -749,6 +782,14 @@ enum omap34xx_index { AD2_3430_USB3FS_PHY_MM3_TXDAT, AC1_3430_USB3FS_PHY_MM3_TXEN_N, + /* 34xx GPIO + * - normally these are bidirectional, no internal pullup/pulldown + * - "_UP" suffix (GPIO3_UP) if internal pullup is configured + * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown + * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx) + */ + AH8_34XX_GPIO29, + J25_34XX_GPIO170, }; struct omap_mux_cfg { |