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-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-db.dts111
1 files changed, 73 insertions, 38 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index d97b72bed662..dba55baff20f 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -61,46 +61,53 @@
reg = <0x0 0x0 0x0 0x80000000>;
};
- cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
+ aliases {
+ ethernet0 = &cp0_eth0;
+ ethernet1 = &cp0_eth2;
+ ethernet2 = &cp1_eth0;
+ ethernet3 = &cp1_eth1;
+ };
+
+ cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
compatible = "regulator-fixed";
- regulator-name = "cpm-usb3h0-vbus";
+ regulator-name = "cp0-usb3h0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
};
- cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
+ cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
compatible = "regulator-fixed";
- regulator-name = "cpm-usb3h1-vbus";
+ regulator-name = "cp0-usb3h1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
};
- cpm_usb3_0_phy: cpm-usb3-0-phy {
+ cp0_usb3_0_phy: cp0-usb3-0-phy {
compatible = "usb-nop-xceiv";
- vcc-supply = <&cpm_reg_usb3_0_vbus>;
+ vcc-supply = <&cp0_reg_usb3_0_vbus>;
};
- cpm_usb3_1_phy: cpm-usb3-1-phy {
+ cp0_usb3_1_phy: cp0-usb3-1-phy {
compatible = "usb-nop-xceiv";
- vcc-supply = <&cpm_reg_usb3_1_vbus>;
+ vcc-supply = <&cp0_reg_usb3_1_vbus>;
};
- cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
+ cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
compatible = "regulator-fixed";
- regulator-name = "cps-usb3h0-vbus";
+ regulator-name = "cp1-usb3h0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
};
- cps_usb3_0_phy: cps-usb3-0-phy {
+ cp1_usb3_0_phy: cp1-usb3-0-phy {
compatible = "usb-nop-xceiv";
- vcc-supply = <&cps_reg_usb3_0_vbus>;
+ vcc-supply = <&cp1_reg_usb3_0_vbus>;
};
};
@@ -144,16 +151,16 @@
};
/* CON6 on CP0 expansion */
-&cpm_pcie0 {
+&cp0_pcie0 {
status = "okay";
};
/* CON5 on CP0 expansion */
-&cpm_pcie2 {
+&cp0_pcie2 {
status = "okay";
};
-&cpm_i2c0 {
+&cp0_i2c0 {
status = "okay";
clock-frequency = <100000>;
@@ -178,23 +185,23 @@
};
/* CON4 on CP0 expansion */
-&cpm_sata0 {
+&cp0_sata0 {
status = "okay";
};
/* CON9 on CP0 expansion */
-&cpm_usb3_0 {
- usb-phy = <&cpm_usb3_0_phy>;
+&cp0_usb3_0 {
+ usb-phy = <&cp0_usb3_0_phy>;
status = "okay";
};
/* CON10 on CP0 expansion */
-&cpm_usb3_1 {
- usb-phy = <&cpm_usb3_1_phy>;
+&cp0_usb3_1 {
+ usb-phy = <&cp0_usb3_1_phy>;
status = "okay";
};
-&cpm_mdio {
+&cp0_mdio {
status = "okay";
phy1: ethernet-phy@1 {
@@ -202,42 +209,42 @@
};
};
-&cpm_ethernet {
+&cp0_ethernet {
status = "okay";
};
-&cpm_eth0 {
+&cp0_eth0 {
status = "okay";
phy-mode = "10gbase-kr";
};
-&cpm_eth2 {
+&cp0_eth2 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
/* CON6 on CP1 expansion */
-&cps_pcie0 {
+&cp1_pcie0 {
status = "okay";
};
/* CON7 on CP1 expansion */
-&cps_pcie1 {
+&cp1_pcie1 {
status = "okay";
};
/* CON5 on CP1 expansion */
-&cps_pcie2 {
+&cp1_pcie2 {
status = "okay";
};
-&cps_i2c0 {
+&cp1_i2c0 {
status = "okay";
clock-frequency = <100000>;
};
-&cps_spi1 {
+&cp1_spi1 {
status = "okay";
spi-flash@0 {
@@ -268,23 +275,51 @@
};
};
+/*
+ * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
+ * MDIO signal of CP1.
+ */
+&cp1_nand {
+ num-cs = <1>;
+ pinctrl-0 = <&nand_pins>, <&nand_rb>;
+ pinctrl-names = "default";
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ marvell,nand-enable-arbiter;
+ marvell,system-controller = <&cp1_syscon0>;
+ nand-on-flash-bbt;
+
+ partition@0 {
+ label = "U-Boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "Linux";
+ reg = <0x200000 0xe00000>;
+ };
+ partition@1000000 {
+ label = "Filesystem";
+ reg = <0x1000000 0x3f000000>;
+ };
+};
+
/* CON4 on CP1 expansion */
-&cps_sata0 {
+&cp1_sata0 {
status = "okay";
};
/* CON9 on CP1 expansion */
-&cps_usb3_0 {
- usb-phy = <&cps_usb3_0_phy>;
+&cp1_usb3_0 {
+ usb-phy = <&cp1_usb3_0_phy>;
status = "okay";
};
/* CON10 on CP1 expansion */
-&cps_usb3_1 {
+&cp1_usb3_1 {
status = "okay";
};
-&cps_mdio {
+&cp1_mdio {
status = "okay";
phy0: ethernet-phy@0 {
@@ -292,16 +327,16 @@
};
};
-&cps_ethernet {
+&cp1_ethernet {
status = "okay";
};
-&cps_eth0 {
+&cp1_eth0 {
status = "okay";
phy-mode = "10gbase-kr";
};
-&cps_eth1 {
+&cp1_eth1 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
@@ -313,7 +348,7 @@
non-removable;
};
-&cpm_sdhci0 {
+&cp0_sdhci0 {
status = "okay";
bus-width = <8>;
non-removable;