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-rw-r--r--arch/microblaze/include/asm/cpuinfo.h1
-rw-r--r--arch/microblaze/include/asm/irqflags.h20
-rw-r--r--arch/microblaze/include/asm/mmu_context_mm.h2
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h64
-rw-r--r--arch/microblaze/include/asm/processor.h3
-rw-r--r--arch/microblaze/include/asm/prom.h10
-rw-r--r--arch/microblaze/include/asm/ptrace.h2
-rw-r--r--arch/microblaze/include/asm/pvr.h5
-rw-r--r--arch/microblaze/include/asm/setup.h1
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c1
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo-static.c1
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo.c4
-rw-r--r--arch/microblaze/kernel/cpu/mb.c9
-rw-r--r--arch/microblaze/kernel/early_printk.c68
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S56
-rw-r--r--arch/microblaze/kernel/intc.c2
-rw-r--r--arch/microblaze/kernel/process.c1
-rw-r--r--arch/microblaze/kernel/prom.c97
-rw-r--r--arch/microblaze/kernel/setup.c5
19 files changed, 161 insertions, 191 deletions
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index d8f013347a9e..7d6831ac8a46 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -38,6 +38,7 @@ struct cpuinfo {
u32 use_exc;
u32 ver_code;
u32 mmu;
+ u32 mmu_privins;
u32 endian;
/* CPU caches */
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h
index c4532f032b3b..c9a6262832c4 100644
--- a/arch/microblaze/include/asm/irqflags.h
+++ b/arch/microblaze/include/asm/irqflags.h
@@ -14,7 +14,7 @@
#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
-static inline unsigned long arch_local_irq_save(void)
+static inline notrace unsigned long arch_local_irq_save(void)
{
unsigned long flags;
asm volatile(" msrclr %0, %1 \n"
@@ -25,7 +25,7 @@ static inline unsigned long arch_local_irq_save(void)
return flags;
}
-static inline void arch_local_irq_disable(void)
+static inline notrace void arch_local_irq_disable(void)
{
/* this uses r0 without declaring it - is that correct? */
asm volatile(" msrclr r0, %0 \n"
@@ -35,7 +35,7 @@ static inline void arch_local_irq_disable(void)
: "memory");
}
-static inline void arch_local_irq_enable(void)
+static inline notrace void arch_local_irq_enable(void)
{
/* this uses r0 without declaring it - is that correct? */
asm volatile(" msrset r0, %0 \n"
@@ -47,7 +47,7 @@ static inline void arch_local_irq_enable(void)
#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
-static inline unsigned long arch_local_irq_save(void)
+static inline notrace unsigned long arch_local_irq_save(void)
{
unsigned long flags, tmp;
asm volatile (" mfs %0, rmsr \n"
@@ -61,7 +61,7 @@ static inline unsigned long arch_local_irq_save(void)
return flags;
}
-static inline void arch_local_irq_disable(void)
+static inline notrace void arch_local_irq_disable(void)
{
unsigned long tmp;
asm volatile(" mfs %0, rmsr \n"
@@ -74,7 +74,7 @@ static inline void arch_local_irq_disable(void)
: "memory");
}
-static inline void arch_local_irq_enable(void)
+static inline notrace void arch_local_irq_enable(void)
{
unsigned long tmp;
asm volatile(" mfs %0, rmsr \n"
@@ -89,7 +89,7 @@ static inline void arch_local_irq_enable(void)
#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
-static inline unsigned long arch_local_save_flags(void)
+static inline notrace unsigned long arch_local_save_flags(void)
{
unsigned long flags;
asm volatile(" mfs %0, rmsr \n"
@@ -100,7 +100,7 @@ static inline unsigned long arch_local_save_flags(void)
return flags;
}
-static inline void arch_local_irq_restore(unsigned long flags)
+static inline notrace void arch_local_irq_restore(unsigned long flags)
{
asm volatile(" mts rmsr, %0 \n"
" nop \n"
@@ -109,12 +109,12 @@ static inline void arch_local_irq_restore(unsigned long flags)
: "memory");
}
-static inline bool arch_irqs_disabled_flags(unsigned long flags)
+static inline notrace bool arch_irqs_disabled_flags(unsigned long flags)
{
return (flags & MSR_IE) == 0;
}
-static inline bool arch_irqs_disabled(void)
+static inline notrace bool arch_irqs_disabled(void)
{
return arch_irqs_disabled_flags(arch_local_save_flags());
}
diff --git a/arch/microblaze/include/asm/mmu_context_mm.h b/arch/microblaze/include/asm/mmu_context_mm.h
index 3e5c254e8d1c..d68647746448 100644
--- a/arch/microblaze/include/asm/mmu_context_mm.h
+++ b/arch/microblaze/include/asm/mmu_context_mm.h
@@ -11,7 +11,7 @@
#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
#define _ASM_MICROBLAZE_MMU_CONTEXT_H
-#include <asm/atomic.h>
+#include <linux/atomic.h>
#include <asm/bitops.h>
#include <asm/mmu.h>
#include <asm-generic/mm_hooks.h>
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 242be57a319c..32764cd077c6 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -10,28 +10,19 @@
#include <linux/pci.h>
#include <linux/list.h>
#include <linux/ioport.h>
+#include <asm-generic/pci-bridge.h>
struct device_node;
-enum {
- /* Force re-assigning all resources (ignore firmware
- * setup completely)
- */
- PCI_REASSIGN_ALL_RSRC = 0x00000001,
-
- /* Do not try to assign, just use existing setup */
- PCI_PROBE_ONLY = 0x00000004,
-
- /* Don't bother with ISA alignment unless the bridge has
- * ISA forwarding enabled
- */
- PCI_CAN_SKIP_ISA_ALIGN = 0x00000008,
-
- /* Enable domain numbers in /proc */
- PCI_ENABLE_PROC_DOMAINS = 0x00000010,
- /* ... except for domain 0 */
- PCI_COMPAT_DOMAIN_0 = 0x00000020,
-};
+#ifdef CONFIG_PCI
+extern struct list_head hose_list;
+extern int pcibios_vaddr_is_ioport(void __iomem *address);
+#else
+static inline int pcibios_vaddr_is_ioport(void __iomem *address)
+{
+ return 0;
+}
+#endif
/*
* Structure of a PCI controller (host bridge)
@@ -151,40 +142,5 @@ extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
extern void pcibios_free_controller(struct pci_controller *phb);
extern void pcibios_setup_phb_resources(struct pci_controller *hose);
-#ifdef CONFIG_PCI
-extern unsigned int pci_flags;
-
-static inline void pci_set_flags(int flags)
-{
- pci_flags = flags;
-}
-
-static inline void pci_add_flags(int flags)
-{
- pci_flags |= flags;
-}
-
-static inline int pci_has_flag(int flag)
-{
- return pci_flags & flag;
-}
-
-extern struct list_head hose_list;
-
-extern int pcibios_vaddr_is_ioport(void __iomem *address);
-#else
-static inline int pcibios_vaddr_is_ioport(void __iomem *address)
-{
- return 0;
-}
-
-static inline void pci_set_flags(int flags) { }
-static inline void pci_add_flags(int flags) { }
-static inline int pci_has_flag(int flag)
-{
- return 0;
-}
-#endif /* CONFIG_PCI */
-
#endif /* __KERNEL__ */
#endif /* _ASM_MICROBLAZE_PCI_BRIDGE_H */
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index aed2a6be8e27..7283bfb2f7e4 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -125,9 +125,6 @@ struct thread_struct {
.pgdir = swapper_pg_dir, \
}
-/* Do necessary setup to start up a newly executed thread. */
-void start_thread(struct pt_regs *regs,
- unsigned long pc, unsigned long usp);
/* Free all resources held by a thread. */
extern inline void release_thread(struct task_struct *dead_task)
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 9bd01ecb00d6..20c5e8e5121b 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -21,13 +21,17 @@
#include <linux/types.h>
#include <asm/irq.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
#define HAVE_ARCH_DEVTREE_FIXUPS
/* Other Prototypes */
-extern int early_uartlite_console(void);
-extern int early_uart16550_console(void);
+enum early_consoles {
+ UARTLITE = 1,
+ UART16550 = 2,
+};
+
+extern int of_early_console(void *version);
/*
* OF address retreival & translation
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h
index d9b66304d5dd..816bee64b196 100644
--- a/arch/microblaze/include/asm/ptrace.h
+++ b/arch/microblaze/include/asm/ptrace.h
@@ -61,8 +61,6 @@ struct pt_regs {
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
-void show_regs(struct pt_regs *);
-
#else /* __KERNEL__ */
/* pt_regs offsets used by gdbserver etc in ptrace syscalls */
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
index a10bec62e857..4bbdb4c03b57 100644
--- a/arch/microblaze/include/asm/pvr.h
+++ b/arch/microblaze/include/asm/pvr.h
@@ -111,16 +111,16 @@ struct pvr_s {
/* Target family PVR mask */
#define PVR10_TARGET_FAMILY_MASK 0xFF000000
-/* MMU descrtiption */
+/* MMU description */
#define PVR11_USE_MMU 0xC0000000
#define PVR11_MMU_ITLB_SIZE 0x38000000
#define PVR11_MMU_DTLB_SIZE 0x07000000
#define PVR11_MMU_TLB_ACCESS 0x00C00000
#define PVR11_MMU_ZONES 0x003C0000
+#define PVR11_MMU_PRIVINS 0x00010000
/* MSR Reset value PVR mask */
#define PVR11_MSR_RESET_VALUE_MASK 0x000007FF
-
/* PVR access macros */
#define PVR_IS_FULL(_pvr) (_pvr.pvr[0] & PVR0_PVR_FULL_MASK)
#define PVR_USE_BARREL(_pvr) (_pvr.pvr[0] & PVR0_USE_BARREL_MASK)
@@ -216,6 +216,7 @@ struct pvr_s {
#define PVR_MMU_DTLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
#define PVR_MMU_TLB_ACCESS(_pvr) (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
#define PVR_MMU_ZONES(_pvr) (_pvr.pvr[11] & PVR11_MMU_ZONES)
+#define PVR_MMU_PRIVINS(pvr) (pvr.pvr[11] & PVR11_MMU_PRIVINS)
/* endian */
#define PVR_ENDIAN(_pvr) (_pvr.pvr[0] & PVR0_ENDI)
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 8f3968971e4e..904e5ef6a11b 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -23,6 +23,7 @@ extern char cmd_line[COMMAND_LINE_SIZE];
void early_printk(const char *fmt, ...);
int setup_early_printk(char *opt);
+void remap_early_printk(void);
void disable_early_printk(void);
#if defined(CONFIG_EARLY_PRINTK)
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
index f70a6047f08e..916aaedf1945 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
CI(pvr_user2, USER2);
CI(mmu, USE_MMU);
+ CI(mmu_privins, MMU_PRIVINS);
CI(endian, ENDIAN);
CI(use_icache, USE_ICACHE);
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
index b16b994ca3d2..592bb2e838c4 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
ci->mmu = fcpu(cpu, "xlnx,use-mmu");
+ ci->mmu_privins = fcpu(cpu, "xlnx,mmu-privileged-instr");
ci->endian = fcpu(cpu, "xlnx,endianness");
ci->ver_code = 0;
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index c1640c52711f..44394d80a683 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -88,4 +88,8 @@ void __init setup_cpuinfo(void)
printk(KERN_WARNING "%s: Unsupported PVR setting\n", __func__);
set_cpuinfo_static(&cpuinfo, cpu);
}
+
+ if (cpuinfo.mmu_privins)
+ printk(KERN_WARNING "%s: Stream instructions enabled"
+ " - USERSPACE CAN LOCK THIS KERNEL!\n", __func__);
}
diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
index b4048af02615..7b5dca7ed39d 100644
--- a/arch/microblaze/kernel/cpu/mb.c
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -97,6 +97,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
(cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
(cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
+ count += seq_printf(m,
+ "Stream-insns:\t%sprivileged\n",
+ cpuinfo.mmu_privins ? "un" : "");
+
if (cpuinfo.use_icache)
count += seq_printf(m,
"Icache:\t\t%ukB\tline length:\t%dB\n",
@@ -110,10 +114,11 @@ static int show_cpuinfo(struct seq_file *m, void *v)
"Dcache:\t\t%ukB\tline length:\t%dB\n",
cpuinfo.dcache_size >> 10,
cpuinfo.dcache_line_length);
+ seq_printf(m, "Dcache-Policy:\t");
if (cpuinfo.dcache_wb)
- count += seq_printf(m, "\t\twrite-back\n");
+ count += seq_printf(m, "write-back\n");
else
- count += seq_printf(m, "\t\twrite-through\n");
+ count += seq_printf(m, "write-through\n");
} else
count += seq_printf(m, "Dcache:\t\tno\n");
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c
index c3616a080ebf..d26d92d47754 100644
--- a/arch/microblaze/kernel/early_printk.c
+++ b/arch/microblaze/kernel/early_printk.c
@@ -35,7 +35,7 @@ static void early_printk_uartlite_putc(char c)
* we'll never timeout on a working UART.
*/
- unsigned retries = 10000;
+ unsigned retries = 1000000;
/* read status bit - 0x8 offset */
while (--retries && (in_be32(base_addr + 8) & (1 << 3)))
;
@@ -60,7 +60,7 @@ static void early_printk_uartlite_write(struct console *unused,
static struct console early_serial_uartlite_console = {
.name = "earlyser",
.write = early_printk_uartlite_write,
- .flags = CON_PRINTBUFFER,
+ .flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1,
};
#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
@@ -104,7 +104,7 @@ static void early_printk_uart16550_write(struct console *unused,
static struct console early_serial_uart16550_console = {
.name = "earlyser",
.write = early_printk_uart16550_write,
- .flags = CON_PRINTBUFFER,
+ .flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1,
};
#endif /* CONFIG_SERIAL_8250_CONSOLE */
@@ -127,48 +127,56 @@ void early_printk(const char *fmt, ...)
int __init setup_early_printk(char *opt)
{
+ int version = 0;
+
if (early_console_initialized)
return 1;
-#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
- base_addr = early_uartlite_console();
+ base_addr = of_early_console(&version);
if (base_addr) {
- early_console_initialized = 1;
#ifdef CONFIG_MMU
early_console_reg_tlb_alloc(base_addr);
#endif
- early_console = &early_serial_uartlite_console;
- early_printk("early_printk_console is enabled at 0x%08x\n",
- base_addr);
-
- /* register_console(early_console); */
-
- return 0;
- }
-#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
-
+ switch (version) {
+#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
+ case UARTLITE:
+ printk(KERN_INFO "Early console on uartlite "
+ "at 0x%08x\n", base_addr);
+ early_console = &early_serial_uartlite_console;
+ break;
+#endif
#ifdef CONFIG_SERIAL_8250_CONSOLE
- base_addr = early_uart16550_console();
- base_addr &= ~3; /* clear register offset */
- if (base_addr) {
- early_console_initialized = 1;
-#ifdef CONFIG_MMU
- early_console_reg_tlb_alloc(base_addr);
+ case UART16550:
+ printk(KERN_INFO "Early console on uart16650 "
+ "at 0x%08x\n", base_addr);
+ early_console = &early_serial_uart16550_console;
+ break;
#endif
- early_console = &early_serial_uart16550_console;
-
- early_printk("early_printk_console is enabled at 0x%08x\n",
- base_addr);
-
- /* register_console(early_console); */
+ default:
+ printk(KERN_INFO "Unsupported early console %d\n",
+ version);
+ return 1;
+ }
+ register_console(early_console);
+ early_console_initialized = 1;
return 0;
}
-#endif /* CONFIG_SERIAL_8250_CONSOLE */
-
return 1;
}
+/* Remap early console to virtual address and do not allocate one TLB
+ * only for early console because of performance degression */
+void __init remap_early_printk(void)
+{
+ if (!early_console_initialized || !early_console)
+ return;
+ printk(KERN_INFO "early_printk_console remaping from 0x%x to ",
+ base_addr);
+ base_addr = (u32) ioremap(base_addr, PAGE_SIZE);
+ printk(KERN_CONT "0x%x\n", base_addr);
+}
+
void __init disable_early_printk(void)
{
if (!early_console_initialized || !early_console)
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 56572e923a83..e62be8379604 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -1113,23 +1113,23 @@ lw_r10_vm: R3_TO_LWREG_VM_V (10);
lw_r11_vm: R3_TO_LWREG_VM_V (11);
lw_r12_vm: R3_TO_LWREG_VM_V (12);
lw_r13_vm: R3_TO_LWREG_VM_V (13);
-lw_r14_vm: R3_TO_LWREG_VM (14);
+lw_r14_vm: R3_TO_LWREG_VM_V (14);
lw_r15_vm: R3_TO_LWREG_VM_V (15);
-lw_r16_vm: R3_TO_LWREG_VM (16);
+lw_r16_vm: R3_TO_LWREG_VM_V (16);
lw_r17_vm: R3_TO_LWREG_VM_V (17);
lw_r18_vm: R3_TO_LWREG_VM_V (18);
-lw_r19_vm: R3_TO_LWREG_VM (19);
-lw_r20_vm: R3_TO_LWREG_VM (20);
-lw_r21_vm: R3_TO_LWREG_VM (21);
-lw_r22_vm: R3_TO_LWREG_VM (22);
-lw_r23_vm: R3_TO_LWREG_VM (23);
-lw_r24_vm: R3_TO_LWREG_VM (24);
-lw_r25_vm: R3_TO_LWREG_VM (25);
-lw_r26_vm: R3_TO_LWREG_VM (26);
-lw_r27_vm: R3_TO_LWREG_VM (27);
-lw_r28_vm: R3_TO_LWREG_VM (28);
-lw_r29_vm: R3_TO_LWREG_VM (29);
-lw_r30_vm: R3_TO_LWREG_VM (30);
+lw_r19_vm: R3_TO_LWREG_VM_V (19);
+lw_r20_vm: R3_TO_LWREG_VM_V (20);
+lw_r21_vm: R3_TO_LWREG_VM_V (21);
+lw_r22_vm: R3_TO_LWREG_VM_V (22);
+lw_r23_vm: R3_TO_LWREG_VM_V (23);
+lw_r24_vm: R3_TO_LWREG_VM_V (24);
+lw_r25_vm: R3_TO_LWREG_VM_V (25);
+lw_r26_vm: R3_TO_LWREG_VM_V (26);
+lw_r27_vm: R3_TO_LWREG_VM_V (27);
+lw_r28_vm: R3_TO_LWREG_VM_V (28);
+lw_r29_vm: R3_TO_LWREG_VM_V (29);
+lw_r30_vm: R3_TO_LWREG_VM_V (30);
lw_r31_vm: R3_TO_LWREG_VM_V (31);
sw_table_vm:
@@ -1147,23 +1147,23 @@ sw_r10_vm: SWREG_TO_R3_VM_V (10);
sw_r11_vm: SWREG_TO_R3_VM_V (11);
sw_r12_vm: SWREG_TO_R3_VM_V (12);
sw_r13_vm: SWREG_TO_R3_VM_V (13);
-sw_r14_vm: SWREG_TO_R3_VM (14);
+sw_r14_vm: SWREG_TO_R3_VM_V (14);
sw_r15_vm: SWREG_TO_R3_VM_V (15);
-sw_r16_vm: SWREG_TO_R3_VM (16);
+sw_r16_vm: SWREG_TO_R3_VM_V (16);
sw_r17_vm: SWREG_TO_R3_VM_V (17);
sw_r18_vm: SWREG_TO_R3_VM_V (18);
-sw_r19_vm: SWREG_TO_R3_VM (19);
-sw_r20_vm: SWREG_TO_R3_VM (20);
-sw_r21_vm: SWREG_TO_R3_VM (21);
-sw_r22_vm: SWREG_TO_R3_VM (22);
-sw_r23_vm: SWREG_TO_R3_VM (23);
-sw_r24_vm: SWREG_TO_R3_VM (24);
-sw_r25_vm: SWREG_TO_R3_VM (25);
-sw_r26_vm: SWREG_TO_R3_VM (26);
-sw_r27_vm: SWREG_TO_R3_VM (27);
-sw_r28_vm: SWREG_TO_R3_VM (28);
-sw_r29_vm: SWREG_TO_R3_VM (29);
-sw_r30_vm: SWREG_TO_R3_VM (30);
+sw_r19_vm: SWREG_TO_R3_VM_V (19);
+sw_r20_vm: SWREG_TO_R3_VM_V (20);
+sw_r21_vm: SWREG_TO_R3_VM_V (21);
+sw_r22_vm: SWREG_TO_R3_VM_V (22);
+sw_r23_vm: SWREG_TO_R3_VM_V (23);
+sw_r24_vm: SWREG_TO_R3_VM_V (24);
+sw_r25_vm: SWREG_TO_R3_VM_V (25);
+sw_r26_vm: SWREG_TO_R3_VM_V (26);
+sw_r27_vm: SWREG_TO_R3_VM_V (27);
+sw_r28_vm: SWREG_TO_R3_VM_V (28);
+sw_r29_vm: SWREG_TO_R3_VM_V (29);
+sw_r30_vm: SWREG_TO_R3_VM_V (30);
sw_r31_vm: SWREG_TO_R3_VM_V (31);
#endif /* CONFIG_MMU */
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index c88f066f41bd..eb41441c7fd0 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -134,7 +134,7 @@ void __init init_IRQ(void)
intr_type =
be32_to_cpup(of_get_property(intc,
"xlnx,kind-of-intr", NULL));
- if (intr_type >= (1 << (nr_irq + 1)))
+ if (intr_type > (u32)((1ULL << nr_irq) - 1))
printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n");
#ifdef CONFIG_SELFMOD_INTC
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 968648a81c1e..dbb812421d8a 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -237,7 +237,6 @@ unsigned long get_wchan(struct task_struct *p)
/* Set up a thread for executing a new program */
void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
{
- set_fs(USER_DS);
regs->pc = pc;
regs->r1 = usp;
regs->pt_mode = 0;
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index b15cc219b1d9..977484add216 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -53,69 +53,58 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
}
#ifdef CONFIG_EARLY_PRINTK
-/* MS this is Microblaze specifig function */
-static int __init early_init_dt_scan_serial(unsigned long node,
- const char *uname, int depth, void *data)
-{
- unsigned long l;
- char *p;
- const __be32 *addr;
-
- pr_debug("search \"serial\", depth: %d, uname: %s\n", depth, uname);
-
-/* find all serial nodes */
- if (strncmp(uname, "serial", 6) != 0)
- return 0;
-
-/* find compatible node with uartlite */
- p = of_get_flat_dt_prop(node, "compatible", &l);
- if ((strncmp(p, "xlnx,xps-uartlite", 17) != 0) &&
- (strncmp(p, "xlnx,opb-uartlite", 17) != 0) &&
- (strncmp(p, "xlnx,axi-uartlite", 17) != 0))
- return 0;
-
- addr = of_get_flat_dt_prop(node, "reg", &l);
- return be32_to_cpup(addr); /* return address */
-}
+char *stdout;
-/* this function is looking for early uartlite console - Microblaze specific */
-int __init early_uartlite_console(void)
-{
- return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
-}
-
-/* MS this is Microblaze specifig function */
-static int __init early_init_dt_scan_serial_full(unsigned long node,
+int __init early_init_dt_scan_chosen_serial(unsigned long node,
const char *uname, int depth, void *data)
{
unsigned long l;
char *p;
- unsigned int addr;
-
- pr_debug("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
-
-/* find all serial nodes */
- if (strncmp(uname, "serial", 6) != 0)
- return 0;
- early_init_dt_check_for_initrd(node);
-
-/* find compatible node with uartlite */
- p = of_get_flat_dt_prop(node, "compatible", &l);
-
- if ((strncmp(p, "xlnx,xps-uart16550", 18) != 0) &&
- (strncmp(p, "xlnx,axi-uart16550", 18) != 0))
- return 0;
-
- addr = *(u32 *)of_get_flat_dt_prop(node, "reg", &l);
- addr += *(u32 *)of_get_flat_dt_prop(node, "reg-offset", &l);
- return be32_to_cpu(addr); /* return address */
+ pr_debug("%s: depth: %d, uname: %s\n", __func__, depth, uname);
+
+ if (depth == 1 && (strcmp(uname, "chosen") == 0 ||
+ strcmp(uname, "chosen@0") == 0)) {
+ p = of_get_flat_dt_prop(node, "linux,stdout-path", &l);
+ if (p != NULL && l > 0)
+ stdout = p; /* store pointer to stdout-path */
+ }
+
+ if (stdout && strstr(stdout, uname)) {
+ p = of_get_flat_dt_prop(node, "compatible", &l);
+ pr_debug("Compatible string: %s\n", p);
+
+ if ((strncmp(p, "xlnx,xps-uart16550", 18) == 0) ||
+ (strncmp(p, "xlnx,axi-uart16550", 18) == 0)) {
+ unsigned int addr;
+
+ *(u32 *)data = UART16550;
+
+ addr = *(u32 *)of_get_flat_dt_prop(node, "reg", &l);
+ addr += *(u32 *)of_get_flat_dt_prop(node,
+ "reg-offset", &l);
+ /* clear register offset */
+ return be32_to_cpu(addr) & ~3;
+ }
+ if ((strncmp(p, "xlnx,xps-uartlite", 17) == 0) ||
+ (strncmp(p, "xlnx,opb-uartlite", 17) == 0) ||
+ (strncmp(p, "xlnx,axi-uartlite", 17) == 0) ||
+ (strncmp(p, "xlnx,mdm", 8) == 0)) {
+ unsigned int *addrp;
+
+ *(u32 *)data = UARTLITE;
+
+ addrp = of_get_flat_dt_prop(node, "reg", &l);
+ return be32_to_cpup(addrp); /* return address */
+ }
+ }
+ return 0;
}
-/* this function is looking for early uartlite console - Microblaze specific */
-int __init early_uart16550_console(void)
+/* this function is looking for early console - Microblaze specific */
+int __init of_early_console(void *version)
{
- return of_scan_flat_dt(early_init_dt_scan_serial_full, NULL);
+ return of_scan_flat_dt(early_init_dt_scan_chosen_serial, version);
}
#endif
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 8e2c09b7ff26..0e654a12d37e 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -59,6 +59,11 @@ void __init setup_arch(char **cmdline_p)
setup_memory();
+#ifdef CONFIG_EARLY_PRINTK
+ /* remap early console to virtual address */
+ remap_early_printk();
+#endif
+
xilinx_pci_init();
#if defined(CONFIG_SELFMOD_INTC) || defined(CONFIG_SELFMOD_TIMER)