diff options
Diffstat (limited to 'arch/ppc64/kernel')
| -rw-r--r-- | arch/ppc64/kernel/kprobes.c | 1 | ||||
| -rw-r--r-- | arch/ppc64/kernel/maple_setup.c | 3 | ||||
| -rw-r--r-- | arch/ppc64/kernel/mpic.c | 3 | ||||
| -rw-r--r-- | arch/ppc64/kernel/mpic.h | 273 | ||||
| -rw-r--r-- | arch/ppc64/kernel/pSeries_setup.c | 2 | ||||
| -rw-r--r-- | arch/ppc64/kernel/pSeries_smp.c | 2 | ||||
| -rw-r--r-- | arch/ppc64/kernel/pmac_setup.c | 2 | ||||
| -rw-r--r-- | arch/ppc64/kernel/pmac_smp.c | 3 | ||||
| -rw-r--r-- | arch/ppc64/kernel/rtas_pci.c | 2 | ||||
| -rw-r--r-- | arch/ppc64/kernel/smp.c | 3 | ||||
| -rw-r--r-- | arch/ppc64/kernel/traps.c | 4 |
11 files changed, 10 insertions, 288 deletions
diff --git a/arch/ppc64/kernel/kprobes.c b/arch/ppc64/kernel/kprobes.c index 7e80d49c589a..abb90e67534a 100644 --- a/arch/ppc64/kernel/kprobes.c +++ b/arch/ppc64/kernel/kprobes.c @@ -395,7 +395,6 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, if (post_kprobe_handler(args->regs)) ret = NOTIFY_STOP; break; - case DIE_GPF: case DIE_PAGE_FAULT: if (kprobe_running() && kprobe_fault_handler(args->regs, args->trapnr)) diff --git a/arch/ppc64/kernel/maple_setup.c b/arch/ppc64/kernel/maple_setup.c index fc0567498a3a..2a7fae01eee1 100644 --- a/arch/ppc64/kernel/maple_setup.c +++ b/arch/ppc64/kernel/maple_setup.c @@ -59,8 +59,7 @@ #include <asm/time.h> #include <asm/of_device.h> #include <asm/lmb.h> - -#include "mpic.h" +#include <asm/mpic.h> #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) diff --git a/arch/ppc64/kernel/mpic.c b/arch/ppc64/kernel/mpic.c index cc262a05ddb4..ec22321342ad 100644 --- a/arch/ppc64/kernel/mpic.c +++ b/arch/ppc64/kernel/mpic.c @@ -31,8 +31,7 @@ #include <asm/pgtable.h> #include <asm/irq.h> #include <asm/machdep.h> - -#include "mpic.h" +#include <asm/mpic.h> #ifdef DEBUG #define DBG(fmt...) printk(fmt) diff --git a/arch/ppc64/kernel/mpic.h b/arch/ppc64/kernel/mpic.h deleted file mode 100644 index ca78a7f10528..000000000000 --- a/arch/ppc64/kernel/mpic.h +++ /dev/null @@ -1,273 +0,0 @@ -#include <linux/irq.h> - -/* - * Global registers - */ - -#define MPIC_GREG_BASE 0x01000 - -#define MPIC_GREG_FEATURE_0 0x00000 -#define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000 -#define MPIC_GREG_FEATURE_LAST_SRC_SHIFT 16 -#define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00 -#define MPIC_GREG_FEATURE_LAST_CPU_SHIFT 8 -#define MPIC_GREG_FEATURE_VERSION_MASK 0xff -#define MPIC_GREG_FEATURE_1 0x00010 -#define MPIC_GREG_GLOBAL_CONF_0 0x00020 -#define MPIC_GREG_GCONF_RESET 0x80000000 -#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 -#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff -#define MPIC_GREG_GLOBAL_CONF_1 0x00030 -#define MPIC_GREG_VENDOR_0 0x00040 -#define MPIC_GREG_VENDOR_1 0x00050 -#define MPIC_GREG_VENDOR_2 0x00060 -#define MPIC_GREG_VENDOR_3 0x00070 -#define MPIC_GREG_VENDOR_ID 0x00080 -#define MPIC_GREG_VENDOR_ID_STEPPING_MASK 0x00ff0000 -#define MPIC_GREG_VENDOR_ID_STEPPING_SHIFT 16 -#define MPIC_GREG_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 -#define MPIC_GREG_VENDOR_ID_DEVICE_ID_SHIFT 8 -#define MPIC_GREG_VENDOR_ID_VENDOR_ID_MASK 0x000000ff -#define MPIC_GREG_PROCESSOR_INIT 0x00090 -#define MPIC_GREG_IPI_VECTOR_PRI_0 0x000a0 -#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0 -#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0 -#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0 -#define MPIC_GREG_SPURIOUS 0x000e0 -#define MPIC_GREG_TIMER_FREQ 0x000f0 - -/* - * - * Timer registers - */ -#define MPIC_TIMER_BASE 0x01100 -#define MPIC_TIMER_STRIDE 0x40 - -#define MPIC_TIMER_CURRENT_CNT 0x00000 -#define MPIC_TIMER_BASE_CNT 0x00010 -#define MPIC_TIMER_VECTOR_PRI 0x00020 -#define MPIC_TIMER_DESTINATION 0x00030 - -/* - * Per-Processor registers - */ - -#define MPIC_CPU_THISBASE 0x00000 -#define MPIC_CPU_BASE 0x20000 -#define MPIC_CPU_STRIDE 0x01000 - -#define MPIC_CPU_IPI_DISPATCH_0 0x00040 -#define MPIC_CPU_IPI_DISPATCH_1 0x00050 -#define MPIC_CPU_IPI_DISPATCH_2 0x00060 -#define MPIC_CPU_IPI_DISPATCH_3 0x00070 -#define MPIC_CPU_CURRENT_TASK_PRI 0x00080 -#define MPIC_CPU_TASKPRI_MASK 0x0000000f -#define MPIC_CPU_WHOAMI 0x00090 -#define MPIC_CPU_WHOAMI_MASK 0x0000001f -#define MPIC_CPU_INTACK 0x000a0 -#define MPIC_CPU_EOI 0x000b0 - -/* - * Per-source registers - */ - -#define MPIC_IRQ_BASE 0x10000 -#define MPIC_IRQ_STRIDE 0x00020 -#define MPIC_IRQ_VECTOR_PRI 0x00000 -#define MPIC_VECPRI_MASK 0x80000000 -#define MPIC_VECPRI_ACTIVITY 0x40000000 /* Read Only */ -#define MPIC_VECPRI_PRIORITY_MASK 0x000f0000 -#define MPIC_VECPRI_PRIORITY_SHIFT 16 -#define MPIC_VECPRI_VECTOR_MASK 0x000007ff -#define MPIC_VECPRI_POLARITY_POSITIVE 0x00800000 -#define MPIC_VECPRI_POLARITY_NEGATIVE 0x00000000 -#define MPIC_VECPRI_POLARITY_MASK 0x00800000 -#define MPIC_VECPRI_SENSE_LEVEL 0x00400000 -#define MPIC_VECPRI_SENSE_EDGE 0x00000000 -#define MPIC_VECPRI_SENSE_MASK 0x00400000 -#define MPIC_IRQ_DESTINATION 0x00010 - -#define MPIC_MAX_IRQ_SOURCES 2048 -#define MPIC_MAX_CPUS 32 -#define MPIC_MAX_ISU 32 - -/* - * Special vector numbers (internal use only) - */ -#define MPIC_VEC_SPURRIOUS 255 -#define MPIC_VEC_IPI_3 254 -#define MPIC_VEC_IPI_2 253 -#define MPIC_VEC_IPI_1 252 -#define MPIC_VEC_IPI_0 251 - -/* unused */ -#define MPIC_VEC_TIMER_3 250 -#define MPIC_VEC_TIMER_2 249 -#define MPIC_VEC_TIMER_1 248 -#define MPIC_VEC_TIMER_0 247 - -/* Type definition of the cascade handler */ -typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data); - -#ifdef CONFIG_MPIC_BROKEN_U3 -/* Fixup table entry */ -struct mpic_irq_fixup -{ - u8 __iomem *base; - unsigned int irq; -}; -#endif /* CONFIG_MPIC_BROKEN_U3 */ - - -/* The instance data of a given MPIC */ -struct mpic -{ - /* The "linux" controller struct */ - hw_irq_controller hc_irq; -#ifdef CONFIG_SMP - hw_irq_controller hc_ipi; -#endif - const char *name; - /* Flags */ - unsigned int flags; - /* How many irq sources in a given ISU */ - unsigned int isu_size; - unsigned int isu_shift; - unsigned int isu_mask; - /* Offset of irq vector numbers */ - unsigned int irq_offset; - unsigned int irq_count; - /* Offset of ipi vector numbers */ - unsigned int ipi_offset; - /* Number of sources */ - unsigned int num_sources; - /* Number of CPUs */ - unsigned int num_cpus; - /* cascade handler */ - mpic_cascade_t cascade; - void *cascade_data; - unsigned int cascade_vec; - /* senses array */ - unsigned char *senses; - unsigned int senses_count; - -#ifdef CONFIG_MPIC_BROKEN_U3 - /* The fixup table */ - struct mpic_irq_fixup *fixups; - spinlock_t fixup_lock; -#endif - - /* The various ioremap'ed bases */ - volatile u32 __iomem *gregs; - volatile u32 __iomem *tmregs; - volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS]; - volatile u32 __iomem *isus[MPIC_MAX_ISU]; - - /* link */ - struct mpic *next; -}; - -/* This is the primary controller, only that one has IPIs and - * has afinity control. A non-primary MPIC always uses CPU0 - * registers only - */ -#define MPIC_PRIMARY 0x00000001 -/* Set this for a big-endian MPIC */ -#define MPIC_BIG_ENDIAN 0x00000002 -/* Broken U3 MPIC */ -#define MPIC_BROKEN_U3 0x00000004 -/* Broken IPI registers (autodetected) */ -#define MPIC_BROKEN_IPI 0x00000008 -/* MPIC wants a reset */ -#define MPIC_WANTS_RESET 0x00000010 - -/* Allocate the controller structure and setup the linux irq descs - * for the range if interrupts passed in. No HW initialization is - * actually performed. - * - * @phys_addr: physial base address of the MPIC - * @flags: flags, see constants above - * @isu_size: number of interrupts in an ISU. Use 0 to use a - * standard ISU-less setup (aka powermac) - * @irq_offset: first irq number to assign to this mpic - * @irq_count: number of irqs to use with this mpic IRQ sources. Pass 0 - * to match the number of sources - * @ipi_offset: first irq number to assign to this mpic IPI sources, - * used only on primary mpic - * @senses: array of sense values - * @senses_num: number of entries in the array - * - * Note about the sense array. If none is passed, all interrupts are - * setup to be level negative unless MPIC_BROKEN_U3 is set in which - * case they are edge positive (and the array is ignored anyway). - * The values in the array start at the first source of the MPIC, - * that is senses[0] correspond to linux irq "irq_offset". - */ -extern struct mpic *mpic_alloc(unsigned long phys_addr, - unsigned int flags, - unsigned int isu_size, - unsigned int irq_offset, - unsigned int irq_count, - unsigned int ipi_offset, - unsigned char *senses, - unsigned int senses_num, - const char *name); - -/* Assign ISUs, to call before mpic_init() - * - * @mpic: controller structure as returned by mpic_alloc() - * @isu_num: ISU number - * @phys_addr: physical address of the ISU - */ -extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, - unsigned long phys_addr); - -/* Initialize the controller. After this has been called, none of the above - * should be called again for this mpic - */ -extern void mpic_init(struct mpic *mpic); - -/* Setup a cascade. Currently, only one cascade is supported this - * way, though you can always do a normal request_irq() and add - * other cascades this way. You should call this _after_ having - * added all the ISUs - * - * @irq_no: "linux" irq number of the cascade (that is offset'ed vector) - * @handler: cascade handler function - */ -extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder, - void *data); - -/* - * All of the following functions must only be used after the - * ISUs have been assigned and the controller fully initialized - * with mpic_init() - */ - - -/* Change/Read the priority of an interrupt. Default is 8 for irqs and - * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the - * IPI number is then the offset'ed (linux irq number mapped to the IPI) - */ -extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri); -extern unsigned int mpic_irq_get_priority(unsigned int irq); - -/* Setup a non-boot CPU */ -extern void mpic_setup_this_cpu(void); - -/* Clean up for kexec (or cpu offline or ...) */ -extern void mpic_teardown_this_cpu(int secondary); - -/* Request IPIs on primary mpic */ -extern void mpic_request_ipis(void); - -/* Send an IPI (non offseted number 0..3) */ -extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask); - -/* Fetch interrupt from a given mpic */ -extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs); -/* This one gets to the primary mpic */ -extern int mpic_get_irq(struct pt_regs *regs); - -/* global mpic for pSeries */ -extern struct mpic *pSeries_mpic; diff --git a/arch/ppc64/kernel/pSeries_setup.c b/arch/ppc64/kernel/pSeries_setup.c index 3009701eb90d..b9bcff21b463 100644 --- a/arch/ppc64/kernel/pSeries_setup.c +++ b/arch/ppc64/kernel/pSeries_setup.c @@ -62,9 +62,9 @@ #include <asm/xics.h> #include <asm/firmware.h> #include <asm/pmc.h> +#include <asm/mpic.h> #include "i8259.h" -#include "mpic.h" #include "pci.h" #ifdef DEBUG diff --git a/arch/ppc64/kernel/pSeries_smp.c b/arch/ppc64/kernel/pSeries_smp.c index d2c7e2c4733b..5d1ed850f47b 100644 --- a/arch/ppc64/kernel/pSeries_smp.c +++ b/arch/ppc64/kernel/pSeries_smp.c @@ -46,8 +46,8 @@ #include <asm/rtas.h> #include <asm/plpar_wrappers.h> #include <asm/pSeries_reconfig.h> +#include <asm/mpic.h> -#include "mpic.h" #include "bpa_iic.h" #ifdef DEBUG diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c index bb0c3bfbb7e2..497c3cd95bc3 100644 --- a/arch/ppc64/kernel/pmac_setup.c +++ b/arch/ppc64/kernel/pmac_setup.c @@ -72,9 +72,9 @@ #include <asm/lmb.h> #include <asm/smu.h> #include <asm/pmc.h> +#include <asm/mpic.h> #include "pmac.h" -#include "mpic.h" #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) diff --git a/arch/ppc64/kernel/pmac_smp.c b/arch/ppc64/kernel/pmac_smp.c index 9fd23ea55bc9..3a1683f5b07f 100644 --- a/arch/ppc64/kernel/pmac_smp.c +++ b/arch/ppc64/kernel/pmac_smp.c @@ -51,8 +51,7 @@ #include <asm/cacheflush.h> #include <asm/keylargo.h> #include <asm/pmac_low_i2c.h> - -#include "mpic.h" +#include <asm/mpic.h> #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) diff --git a/arch/ppc64/kernel/rtas_pci.c b/arch/ppc64/kernel/rtas_pci.c index 4a9719b48abe..4d920dd41dc6 100644 --- a/arch/ppc64/kernel/rtas_pci.c +++ b/arch/ppc64/kernel/rtas_pci.c @@ -38,8 +38,8 @@ #include <asm/pci-bridge.h> #include <asm/iommu.h> #include <asm/rtas.h> +#include <asm/mpic.h> -#include "mpic.h" #include "pci.h" /* RTAS tokens */ diff --git a/arch/ppc64/kernel/smp.c b/arch/ppc64/kernel/smp.c index 793b562da653..6f4f3da12a63 100644 --- a/arch/ppc64/kernel/smp.c +++ b/arch/ppc64/kernel/smp.c @@ -45,8 +45,7 @@ #include <asm/cputable.h> #include <asm/system.h> #include <asm/abs_addr.h> - -#include "mpic.h" +#include <asm/mpic.h> #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) diff --git a/arch/ppc64/kernel/traps.c b/arch/ppc64/kernel/traps.c index 5c4647b2c5f3..a728c9f0b53f 100644 --- a/arch/ppc64/kernel/traps.c +++ b/arch/ppc64/kernel/traps.c @@ -62,7 +62,7 @@ EXPORT_SYMBOL(__debugger_dabr_match); EXPORT_SYMBOL(__debugger_fault_handler); #endif -struct notifier_block *ppc64_die_chain; +struct notifier_block *powerpc_die_chain; static DEFINE_SPINLOCK(die_notifier_lock); int register_die_notifier(struct notifier_block *nb) @@ -71,7 +71,7 @@ int register_die_notifier(struct notifier_block *nb) unsigned long flags; spin_lock_irqsave(&die_notifier_lock, flags); - err = notifier_chain_register(&ppc64_die_chain, nb); + err = notifier_chain_register(&powerpc_die_chain, nb); spin_unlock_irqrestore(&die_notifier_lock, flags); return err; } |