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-rw-r--r--arch/arm/mach-imx/hotplug.c16
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c1
-rw-r--r--arch/arm/mach-imx/platsmp.c18
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h4
4 files changed, 20 insertions, 19 deletions
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index f8f7437c83b8..b07b778dc9a8 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -15,11 +15,6 @@
#include <asm/cp15.h>
#include <mach/common.h>
-int platform_cpu_kill(unsigned int cpu)
-{
- return 1;
-}
-
static inline void cpu_enter_lowpower(void)
{
unsigned int v;
@@ -47,7 +42,7 @@ static inline void cpu_enter_lowpower(void)
*
* Called with IRQs disabled
*/
-void platform_cpu_die(unsigned int cpu)
+void imx_cpu_die(unsigned int cpu)
{
cpu_enter_lowpower();
imx_enable_cpu(cpu, false);
@@ -56,12 +51,3 @@ void platform_cpu_die(unsigned int cpu)
while (1)
;
}
-
-int platform_cpu_disable(unsigned int cpu)
-{
- /*
- * we don't allow CPU 0 to be shutdown (it is still too special
- * e.g. clock tick interrupts)
- */
- return cpu == 0 ? -EPERM : 0;
-}
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 045b3f6a387d..9591b4d6df12 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -226,6 +226,7 @@ static const char *imx6q_dt_compat[] __initdata = {
};
DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
+ .smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
.handle_irq = imx6q_handle_irq,
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index ab98c6fec9eb..2ac43e1a2dfd 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -41,7 +41,7 @@ void __init imx_scu_map_io(void)
scu_base = IMX_IO_ADDRESS(base);
}
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit imx_secondary_init(unsigned int cpu)
{
/*
* if any interrupts are already enabled for the primary
@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
gic_secondary_init(0);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
imx_set_cpu_jump(cpu, v7_secondary_startup);
imx_enable_cpu(cpu, true);
@@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init imx_smp_init_cpus(void)
{
int i, ncores;
@@ -79,7 +79,17 @@ void imx_smp_prepare(void)
scu_enable(scu_base);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
{
imx_smp_prepare();
}
+
+struct smp_operations imx_smp_ops __initdata = {
+ .smp_init_cpus = imx_smp_init_cpus,
+ .smp_prepare_cpus = imx_smp_prepare_cpus,
+ .smp_secondary_init = imx_secondary_init,
+ .smp_boot_secondary = imx_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_die = imx_cpu_die,
+#endif
+};
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 7128e9710417..e8b51502e32e 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -145,6 +145,8 @@ extern void imx53_smd_common_init(void);
extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
extern void imx6q_clock_map_io(void);
+extern void imx_cpu_die(unsigned int cpu);
+
#ifdef CONFIG_PM
extern void imx6q_pm_init(void);
extern void imx51_pm_init(void);
@@ -161,4 +163,6 @@ extern int mx51_neon_fixup(void);
static inline int mx51_neon_fixup(void) { return 0; }
#endif
+extern struct smp_operations imx_smp_ops;
+
#endif