diff options
Diffstat (limited to 'drivers/clk/ingenic')
| -rw-r--r-- | drivers/clk/ingenic/cgu.c | 3 | ||||
| -rw-r--r-- | drivers/clk/ingenic/cgu.h | 4 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 75524c606a90..1f7ba30f5a1b 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -232,6 +232,9 @@ ingenic_pll_set_rate(struct clk_hw *hw, unsigned long req_rate, writel(ctl, cgu->base + pll_info->reg); + if (pll_info->set_rate_hook) + pll_info->set_rate_hook(pll_info, rate, parent_rate); + /* If the PLL is enabled, verify that it's stable */ if (pll_info->enable_bit >= 0 && (ctl & BIT(pll_info->enable_bit))) ret = ingenic_pll_check_stable(cgu, pll_info); diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h index a5e44ca7f969..99da9bd86e63 100644 --- a/drivers/clk/ingenic/cgu.h +++ b/drivers/clk/ingenic/cgu.h @@ -46,6 +46,8 @@ * -1 if there is no enable bit (ie, the PLL is always on) * @stable_bit: the index of the stable bit in the PLL control register, or * -1 if there is no stable bit + * @set_rate_hook: hook called immediately after updating the CGU register, + * before releasing the spinlock */ struct ingenic_cgu_pll_info { unsigned reg; @@ -61,6 +63,8 @@ struct ingenic_cgu_pll_info { void (*calc_m_n_od)(const struct ingenic_cgu_pll_info *pll_info, unsigned long rate, unsigned long parent_rate, unsigned int *m, unsigned int *n, unsigned int *od); + void (*set_rate_hook)(const struct ingenic_cgu_pll_info *pll_info, + unsigned long rate, unsigned long parent_rate); }; /** |