diff options
Diffstat (limited to 'drivers/clk/meson/clk-pll.c')
-rw-r--r-- | drivers/clk/meson/clk-pll.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 9e55617bc3b4..5dfb7d38f452 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -277,15 +277,15 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); - int delay = 24000000; + int delay = 5000; do { - /* Is the clock locked now ? */ + /* Is the clock locked now ? Time out after 100ms. */ if (meson_parm_read(clk->map, &pll->l)) return 0; - delay--; - } while (delay > 0); + udelay(20); + } while (--delay); return -ETIMEDOUT; } @@ -320,12 +320,16 @@ static int meson_clk_pll_is_enabled(struct clk_hw *hw) static int meson_clk_pcie_pll_enable(struct clk_hw *hw) { - meson_clk_pll_init(hw); + int retries = 10; - if (meson_clk_pll_wait_lock(hw)) - return -EIO; + do { + meson_clk_pll_init(hw); + if (!meson_clk_pll_wait_lock(hw)) + return 0; + pr_info("Retry enabling PCIe PLL clock\n"); + } while (--retries); - return 0; + return -EIO; } static int meson_clk_pll_enable(struct clk_hw *hw) |