diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/cpufreq/intel_pstate.c | 14 | ||||
| -rw-r--r-- | drivers/powercap/intel_rapl.c | 1 |
2 files changed, 8 insertions, 7 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index c5b81beccc8e..6414661ac1c4 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -31,6 +31,7 @@ #include <asm/div64.h> #include <asm/msr.h> #include <asm/cpu_device_id.h> +#include <asm/cpufeature.h> #define BYT_RATIOS 0x66a #define BYT_VIDS 0x66b @@ -649,7 +650,7 @@ static struct cpu_defaults byt_params = { .pid_policy = { .sample_rate_ms = 10, .deadband = 0, - .setpoint = 97, + .setpoint = 60, .p_gain_pct = 14, .d_gain_pct = 0, .i_gain_pct = 4, @@ -1200,8 +1201,7 @@ static int __init intel_pstate_init(void) { int cpu, rc = 0; const struct x86_cpu_id *id; - struct cpu_defaults *cpu_info; - struct cpuinfo_x86 *c = &boot_cpu_data; + struct cpu_defaults *cpu_def; if (no_load) return -ENODEV; @@ -1217,10 +1217,10 @@ static int __init intel_pstate_init(void) if (intel_pstate_platform_pwr_mgmt_exists()) return -ENODEV; - cpu_info = (struct cpu_defaults *)id->driver_data; + cpu_def = (struct cpu_defaults *)id->driver_data; - copy_pid_params(&cpu_info->pid_policy); - copy_cpu_funcs(&cpu_info->funcs); + copy_pid_params(&cpu_def->pid_policy); + copy_cpu_funcs(&cpu_def->funcs); if (intel_pstate_msrs_not_valid()) return -ENODEV; @@ -1231,7 +1231,7 @@ static int __init intel_pstate_init(void) if (!all_cpu_data) return -ENOMEM; - if (cpu_has(c,X86_FEATURE_HWP) && !no_hwp) + if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp) intel_pstate_hwp_enable(); if (!hwp_active && hwp_only) diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c index e03877c4b195..fd243231620a 100644 --- a/drivers/powercap/intel_rapl.c +++ b/drivers/powercap/intel_rapl.c @@ -1064,6 +1064,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */ RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */ RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ + RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */ RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */ RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */ RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */ |