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-rw-r--r--include/asm-mips/mach-ip27/kernel-entry-init.h9
-rw-r--r--include/asm-mips/time.h7
2 files changed, 14 insertions, 2 deletions
diff --git a/include/asm-mips/mach-ip27/kernel-entry-init.h b/include/asm-mips/mach-ip27/kernel-entry-init.h
index c1a10314b317..624d66c7f290 100644
--- a/include/asm-mips/mach-ip27/kernel-entry-init.h
+++ b/include/asm-mips/mach-ip27/kernel-entry-init.h
@@ -46,7 +46,14 @@
lh t1, KV_RO_NASID_OFFSET(t0)
lh t2, KV_RW_NASID_OFFSET(t0)
MAPPED_KERNEL_SETUP_TLB
- ARC64_TWIDDLE_PC
+
+ /*
+ * We might not get launched at the address the kernel is linked to,
+ * so we jump there.
+ */
+ PTR_LA t0, 0f
+ jr t0
+0:
.endm
#endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 35555bd5c52d..cf76f4f7435f 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -40,7 +40,6 @@ extern int rtc_mips_set_mmss(unsigned long);
* mips_timer_ack may be NULL if the interrupt is self-recoverable.
*/
extern int (*mips_timer_state)(void);
-extern void (*mips_timer_ack)(void);
/*
* High precision timer clocksource.
@@ -76,6 +75,12 @@ extern int (*perf_irq)(void);
/*
* Initialize the calling CPU's compare interrupt as clockevent device
*/
+#ifdef CONFIG_CEVT_R4K
extern void mips_clockevent_init(void);
+#else
+static inline void mips_clockevent_init(void)
+{
+}
+#endif
#endif /* _ASM_TIME_H */